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intel: drop incorrect MAYBE_UNUSED
All these are actually always used. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
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14be04fb2b
commit
e775b938b2
6 changed files with 9 additions and 9 deletions
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@ -1193,7 +1193,7 @@ isl_calc_phys_total_extent_el_gen9_1d(
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uint32_t *array_pitch_el_rows,
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struct isl_extent2d *phys_total_el)
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{
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MAYBE_UNUSED const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
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const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
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assert(phys_level0_sa->height == 1);
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assert(phys_level0_sa->depth == 1);
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@ -418,7 +418,7 @@ anv_batch_bo_link(struct anv_cmd_buffer *cmd_buffer,
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struct anv_batch_bo *next_bbo,
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uint32_t next_bbo_offset)
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{
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MAYBE_UNUSED const uint32_t bb_start_offset =
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const uint32_t bb_start_offset =
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prev_bbo->length - GEN8_MI_BATCH_BUFFER_START_length * 4;
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MAYBE_UNUSED const uint32_t *bb_start = prev_bbo->bo.map + bb_start_offset;
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@ -1731,7 +1731,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
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assert(!urb_low_bw || cfg->n[GEN_L3P_URB] == cfg->n[GEN_L3P_SLM]);
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/* Minimum number of ways that can be allocated to the URB. */
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MAYBE_UNUSED const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0;
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const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0;
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assert(cfg->n[GEN_L3P_URB] >= n0_urb);
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uint32_t l3sqcr1, l3cr2, l3cr3;
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@ -3540,7 +3540,7 @@ void
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genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
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{
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struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
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MAYBE_UNUSED VkResult result;
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VkResult result;
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assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT);
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@ -955,7 +955,7 @@ emit_ds_state(struct anv_pipeline *pipeline,
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#endif
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}
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MAYBE_UNUSED static bool
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static bool
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is_dual_src_blend_factor(VkBlendFactor factor)
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{
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return factor == VK_BLEND_FACTOR_SRC1_COLOR ||
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@ -74,7 +74,7 @@ KSP(UNUSED struct brw_context *brw, uint32_t offset)
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#endif
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#if GEN_GEN >= 7
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MAYBE_UNUSED static void
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static void
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emit_lrm(struct brw_context *brw, uint32_t reg, struct brw_address addr)
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{
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brw_batch_emit(brw, GENX(MI_LOAD_REGISTER_MEM), lrm) {
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@ -4941,7 +4941,7 @@ has_component(mesa_format format, int i)
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static void
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genX(upload_default_color)(struct brw_context *brw,
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const struct gl_sampler_object *sampler,
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MAYBE_UNUSED mesa_format format, GLenum base_format,
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mesa_format format, GLenum base_format,
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bool is_integer_format, bool is_stencil_sampling,
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uint32_t *sdc_offset)
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{
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@ -1577,7 +1577,7 @@ intel_miptree_alloc_aux(struct brw_context *brw,
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enum isl_aux_state initial_state;
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uint8_t memset_value;
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struct isl_surf aux_surf;
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MAYBE_UNUSED bool aux_surf_ok = false;
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bool aux_surf_ok = false;
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switch (mt->aux_usage) {
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case ISL_AUX_USAGE_NONE:
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@ -2963,7 +2963,7 @@ intel_miptree_unmap_tiled_memcpy(struct brw_context *brw,
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*
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* \return true if the format and type combination are valid
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*/
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MAYBE_UNUSED isl_memcpy_type
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isl_memcpy_type
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intel_miptree_get_memcpy_type(mesa_format tiledFormat, GLenum format, GLenum type,
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uint32_t *cpp)
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{
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