From e6e305988c769c7db0da5fdad7fdc7638a84b1df Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 26 Feb 2026 18:35:09 +0100 Subject: [PATCH] ac,radv,radeonsi: merge tiled/linear surfaces into one struct This will be used to rework/fix metadata config on SDMA7. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/common/ac_cmdbuf_sdma.c | 20 ++-- src/amd/common/ac_cmdbuf_sdma.h | 94 +++++++++---------- src/amd/vulkan/radv_sdma.c | 46 ++++++--- .../drivers/radeonsi/si_sdma_copy_image.c | 29 ++++-- 4 files changed, 108 insertions(+), 81 deletions(-) diff --git a/src/amd/common/ac_cmdbuf_sdma.c b/src/amd/common/ac_cmdbuf_sdma.c index 2d6076a316b..392c569da4d 100644 --- a/src/amd/common/ac_cmdbuf_sdma.c +++ b/src/amd/common/ac_cmdbuf_sdma.c @@ -145,8 +145,8 @@ ac_sdma_check_pitches(enum sdma_version sdma_ip_version, uint32_t pitch, void ac_emit_sdma_copy_linear_sub_window(struct ac_cmdbuf *cs, enum sdma_version sdma_ip_version, - const struct ac_sdma_surf_linear *src, - const struct ac_sdma_surf_linear *dst, + const struct ac_sdma_surf *src, + const struct ac_sdma_surf *dst, uint32_t width, uint32_t height, uint32_t depth) { /* This packet is the same since SDMA v2.4, haven't bothered to check older versions. @@ -189,7 +189,7 @@ ac_emit_sdma_copy_linear_sub_window(struct ac_cmdbuf *cs, enum sdma_version sdma static uint32_t ac_sdma_get_tiled_header_dword(enum sdma_version sdma_ip_version, - const struct ac_sdma_surf_tiled *tiled) + const struct ac_sdma_surf *tiled) { if (sdma_ip_version >= SDMA_5_0) { return 0; @@ -205,7 +205,7 @@ ac_sdma_get_tiled_header_dword(enum sdma_version sdma_ip_version, static enum gfx9_resource_type ac_sdma_get_tiled_resource_dim(enum sdma_version sdma_ip_version, - const struct ac_sdma_surf_tiled *tiled) + const struct ac_sdma_surf *tiled) { if (sdma_ip_version >= SDMA_5_0) { /* Use the 2D resource type for rotated or Z swizzles. */ @@ -221,7 +221,7 @@ ac_sdma_get_tiled_resource_dim(enum sdma_version sdma_ip_version, static uint32_t ac_sdma_get_tiled_info_dword(const struct radeon_info *info, - const struct ac_sdma_surf_tiled *tiled) + const struct ac_sdma_surf *tiled) { const uint32_t swizzle_mode = tiled->is_stencil ? tiled->surf->u.gfx9.zs.stencil_swizzle_mode @@ -268,7 +268,7 @@ ac_sdma_get_tiled_info_dword(const struct radeon_info *info, static uint32_t ac_sdma_get_tiled_metadata_config(const struct radeon_info *info, - const struct ac_sdma_surf_tiled *tiled, + const struct ac_sdma_surf *tiled, bool detile, bool tmz) { const uint32_t data_format = ac_get_cb_format(info->gfx_level, tiled->format); @@ -303,8 +303,8 @@ ac_sdma_get_tiled_metadata_config(const struct radeon_info *info, void ac_emit_sdma_copy_tiled_sub_window(struct ac_cmdbuf *cs, const struct radeon_info *info, - const struct ac_sdma_surf_linear *linear, - const struct ac_sdma_surf_tiled *tiled, + const struct ac_sdma_surf *linear, + const struct ac_sdma_surf *tiled, bool detile, uint32_t width, uint32_t height, uint32_t depth, bool tmz) { @@ -362,8 +362,8 @@ ac_emit_sdma_copy_tiled_sub_window(struct ac_cmdbuf *cs, const struct radeon_inf void ac_emit_sdma_copy_t2t_sub_window(struct ac_cmdbuf *cs, const struct radeon_info *info, - const struct ac_sdma_surf_tiled *src, - const struct ac_sdma_surf_tiled *dst, + const struct ac_sdma_surf *src, + const struct ac_sdma_surf *dst, uint32_t width, uint32_t height, uint32_t depth) { const uint32_t src_header_dword = diff --git a/src/amd/common/ac_cmdbuf_sdma.h b/src/amd/common/ac_cmdbuf_sdma.h index 621fc1e5084..8480506e777 100644 --- a/src/amd/common/ac_cmdbuf_sdma.h +++ b/src/amd/common/ac_cmdbuf_sdma.h @@ -17,6 +17,46 @@ struct ac_cmdbuf; extern "C" { #endif +struct ac_sdma_surf { + const struct radeon_surf *surf; + uint64_t va; + + enum pipe_format format; + uint32_t bpp; + + struct { + uint32_t x; + uint32_t y; + uint32_t z; + } offset; + + bool is_compressed; + + /* Linear */ + struct { + uint32_t pitch; + uint32_t slice_pitch; + }; + + /* Tiled */ + struct { + bool is_stencil; + + struct { + uint32_t width; + uint32_t height; + uint32_t depth; + } extent; + + uint32_t first_level; + uint32_t num_levels; + + uint64_t meta_va; + uint32_t surf_type; + bool htile_enabled; + }; +}; + void ac_emit_sdma_nop(struct ac_cmdbuf *cs); void ac_emit_sdma_write_timestamp(struct ac_cmdbuf *cs, uint64_t va); @@ -36,65 +76,23 @@ ac_emit_sdma_copy_linear(struct ac_cmdbuf *cs, enum sdma_version sdma_ip_version uint64_t src_va, uint64_t dst_va, uint64_t size, bool tmz); -struct ac_sdma_surf_linear { - uint64_t va; - - struct { - uint32_t x; - uint32_t y; - uint32_t z; - } offset; - - uint32_t bpp; - uint32_t pitch; - uint32_t slice_pitch; -}; - void ac_emit_sdma_copy_linear_sub_window(struct ac_cmdbuf *cs, enum sdma_version sdma_ip_version, - const struct ac_sdma_surf_linear *src, - const struct ac_sdma_surf_linear *dst, + const struct ac_sdma_surf *src, + const struct ac_sdma_surf *dst, uint32_t width, uint32_t height, uint32_t depth); -struct ac_sdma_surf_tiled { - const struct radeon_surf *surf; - uint64_t va; - enum pipe_format format; - uint32_t bpp; - bool is_stencil; - - struct { - uint32_t x; - uint32_t y; - uint32_t z; - } offset; - - struct { - uint32_t width; - uint32_t height; - uint32_t depth; - } extent; - - uint32_t first_level; - uint32_t num_levels; - - bool is_compressed; - uint64_t meta_va; - uint32_t surf_type; - bool htile_enabled; -}; - void ac_emit_sdma_copy_tiled_sub_window(struct ac_cmdbuf *cs, const struct radeon_info *info, - const struct ac_sdma_surf_linear *linear, - const struct ac_sdma_surf_tiled *tiled, + const struct ac_sdma_surf *linear, + const struct ac_sdma_surf *tiled, bool detile, uint32_t width, uint32_t height, uint32_t depth, bool tmz); void ac_emit_sdma_copy_t2t_sub_window(struct ac_cmdbuf *cs, const struct radeon_info *info, - const struct ac_sdma_surf_tiled *src, - const struct ac_sdma_surf_tiled *dst, + const struct ac_sdma_surf *src, + const struct ac_sdma_surf *dst, uint32_t width, uint32_t height, uint32_t depth); #ifdef __cplusplus diff --git a/src/amd/vulkan/radv_sdma.c b/src/amd/vulkan/radv_sdma.c index 673524e18ba..d3dd7f1e140 100644 --- a/src/amd/vulkan/radv_sdma.c +++ b/src/amd/vulkan/radv_sdma.c @@ -313,28 +313,34 @@ radv_sdma_emit_copy_linear_sub_window(const struct radv_device *device, struct r dst_off.x *= texel_scale; ext.width *= texel_scale; - const struct ac_sdma_surf_linear surf_src = { + const struct ac_sdma_surf surf_src = { + .surf = src->surf, .va = src->va, + .format = radv_format_to_pipe_format(src->aspect_format), + .bpp = src->bpp, .offset = { .x = src_off.x, .y = src_off.y, .z = src_off.z, }, - .bpp = src->bpp, + .is_compressed = src->is_compressed, .pitch = src_pitch, .slice_pitch = src_slice_pitch, }; - const struct ac_sdma_surf_linear surf_dst = { + const struct ac_sdma_surf surf_dst = { + .surf = dst->surf, .va = dst->va, + .format = radv_format_to_pipe_format(dst->aspect_format), + .bpp = dst->bpp, .offset = { .x = dst_off.x, .y = dst_off.y, .z = dst_off.z, }, - .bpp = dst->bpp, + .is_compressed = dst->is_compressed, .pitch = dst_pitch, .slice_pitch = dst_slice_pitch, }; @@ -358,30 +364,34 @@ radv_sdma_emit_copy_tiled_sub_window(const struct radv_device *device, struct ra const unsigned linear_pitch = radv_sdma_pixels_to_blocks(linear->pitch, tiled->blk_w); const unsigned linear_slice_pitch = radv_sdma_pixel_area_to_blocks(linear->slice_pitch, tiled->blk_w, tiled->blk_h); - const struct ac_sdma_surf_linear surf_linear = { + const struct ac_sdma_surf surf_linear = { + .surf = linear->surf, .va = linear->va, + .format = radv_format_to_pipe_format(linear->aspect_format), .offset = { .x = linear_off.x, .y = linear_off.y, .z = linear_off.z, }, + .is_compressed = linear->is_compressed, .pitch = linear_pitch, .slice_pitch = linear_slice_pitch, }; - const struct ac_sdma_surf_tiled surf_tiled = { + const struct ac_sdma_surf surf_tiled = { .surf = tiled->surf, .va = tiled->va, .format = radv_format_to_pipe_format(tiled->aspect_format), .bpp = tiled->bpp, - .is_stencil = tiled->is_stencil, .offset = { .x = tiled_off.x, .y = tiled_off.y, .z = tiled_off.z, }, + .is_compressed = tiled->is_compressed, + .is_stencil = tiled->is_stencil, .extent = { .width = tiled_ext.width, @@ -390,11 +400,9 @@ radv_sdma_emit_copy_tiled_sub_window(const struct radv_device *device, struct ra }, .first_level = tiled->first_level, .num_levels = tiled->mip_levels, - .is_compressed = tiled->is_compressed, .surf_type = tiled->surface_type, .meta_va = tiled->meta_va, .htile_enabled = tiled->htile_enabled, - }; radeon_check_space(device->ws, cs->b, 17); @@ -414,18 +422,19 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv const VkExtent3D dst_ext = radv_sdma_pixel_extent_to_blocks(dst->extent, dst->blk_w, dst->blk_h); const VkExtent3D ext = radv_sdma_pixel_extent_to_blocks(px_extent, src->blk_w, src->blk_h); - const struct ac_sdma_surf_tiled surf_src = { + const struct ac_sdma_surf surf_src = { .surf = src->surf, .va = src->va, .format = radv_format_to_pipe_format(src->aspect_format), .bpp = src->bpp, - .is_stencil = src->is_stencil, .offset = { .x = src_off.x, .y = src_off.y, .z = src_off.z, }, + .is_compressed = src->is_compressed, + .is_stencil = src->is_stencil, .extent = { .width = src_ext.width, @@ -434,24 +443,24 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv }, .first_level = src->first_level, .num_levels = src->mip_levels, - .is_compressed = src->is_compressed, .surf_type = src->surface_type, .meta_va = src->meta_va, .htile_enabled = src->htile_enabled, }; - const struct ac_sdma_surf_tiled surf_dst = { + const struct ac_sdma_surf surf_dst = { .surf = dst->surf, .va = dst->va, .format = radv_format_to_pipe_format(dst->aspect_format), .bpp = dst->bpp, - .is_stencil = dst->is_stencil, .offset = { .x = dst_off.x, .y = dst_off.y, .z = dst_off.z, }, + .is_compressed = dst->is_compressed, + .is_stencil = dst->is_stencil, .extent = { .width = dst_ext.width, @@ -460,7 +469,6 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv }, .first_level = dst->first_level, .num_levels = dst->mip_levels, - .is_compressed = dst->is_compressed, .surf_type = dst->surface_type, .meta_va = dst->meta_va, .htile_enabled = dst->htile_enabled, @@ -511,7 +519,9 @@ radv_sdma_copy_buffer_image_unaligned(const struct radv_device *device, struct r const struct radv_sdma_chunked_copy_info info = radv_sdma_get_chunked_copy_info(device, img_in, base_extent); struct radv_sdma_surf img = *img_in; struct radv_sdma_surf tmp = { + .surf = img.surf, .va = radv_buffer_get_va(temp_bo), + .aspect_format = img.aspect_format, .bpp = img.bpp, .blk_w = img.blk_w, .blk_h = img.blk_h, @@ -676,16 +686,22 @@ radv_sdma_copy_image_t2t_scanline(const struct radv_device *device, struct radv_ const struct radv_sdma_chunked_copy_info info = radv_sdma_get_chunked_copy_info(device, src, extent); struct radv_sdma_surf t2l_src = *src; struct radv_sdma_surf t2l_dst = { + .surf = src->surf, .va = radv_buffer_get_va(temp_bo), + .aspect_format = src->aspect_format, .bpp = src->bpp, + .is_compressed = src->is_compressed, .blk_w = src->blk_w, .blk_h = src->blk_h, .pitch = info.aligned_row_pitch * src->blk_w, }; struct radv_sdma_surf l2t_dst = *dst; struct radv_sdma_surf l2t_src = { + .surf = dst->surf, .va = radv_buffer_get_va(temp_bo), + .aspect_format = dst->aspect_format, .bpp = dst->bpp, + .is_compressed = dst->is_compressed, .blk_w = dst->blk_w, .blk_h = dst->blk_h, .pitch = info.aligned_row_pitch * dst->blk_w, diff --git a/src/gallium/drivers/radeonsi/si_sdma_copy_image.c b/src/gallium/drivers/radeonsi/si_sdma_copy_image.c index 0042102b65f..f44ee38b4e6 100644 --- a/src/gallium/drivers/radeonsi/si_sdma_copy_image.c +++ b/src/gallium/drivers/radeonsi/si_sdma_copy_image.c @@ -113,8 +113,11 @@ static bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_textur const uint64_t md_address = dcc ? tiled_address + tiled->surface.meta_offset : 0; const bool detile = linear == sdst; - const struct ac_sdma_surf_linear surf_linear = { + const struct ac_sdma_surf surf_linear = { + .surf = &linear->surface, .va = linear_address, + .format = linear->buffer.b.b.format, + .bpp = bpp, .offset = { .x = 0, @@ -125,7 +128,7 @@ static bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_textur .slice_pitch = linear_slice_pitch, }; - const struct ac_sdma_surf_tiled surf_tiled = { + const struct ac_sdma_surf surf_tiled = { .surf = &tiled->surface, .va = tiled_address | (tiled->surface.tile_swizzle << 8), .format = tiled->buffer.b.b.format, @@ -136,6 +139,7 @@ static bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_textur .y = 0, .z = 0, }, + .is_compressed = dcc, .extent = { .width = tiled_width, .height = tiled_height, @@ -143,7 +147,6 @@ static bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_textur }, .first_level = 0, .num_levels = tiled->buffer.b.b.last_level + 1, - .is_compressed = dcc, .surf_type = 0, .meta_va = md_address, .htile_enabled = false, @@ -203,8 +206,11 @@ bool cik_sdma_copy_texture(struct si_context *sctx, struct si_texture *sdst, str (copy_width != (1 << 14) && copy_height != (1 << 14)))) { struct radeon_cmdbuf *cs = sctx->sdma_cs; - const struct ac_sdma_surf_linear surf_src = { + const struct ac_sdma_surf surf_src = { + .surf = &ssrc->surface, .va = src_address, + .format = ssrc->buffer.b.b.format, + .bpp = bpp, .offset = { .x = 0, @@ -216,8 +222,11 @@ bool cik_sdma_copy_texture(struct si_context *sctx, struct si_texture *sdst, str .slice_pitch = src_slice_pitch, }; - const struct ac_sdma_surf_linear surf_dst = { + const struct ac_sdma_surf surf_dst = { + .surf = &sdst->surface, .va = dst_address, + .format = sdst->buffer.b.b.format, + .bpp = bpp, .offset = { .x = 0, @@ -333,8 +342,11 @@ bool cik_sdma_copy_texture(struct si_context *sctx, struct si_texture *sdst, str struct radeon_cmdbuf *cs = sctx->sdma_cs; const bool detile = linear == sdst; - const struct ac_sdma_surf_linear surf_linear = { + const struct ac_sdma_surf surf_linear = { + .surf = &linear->surface, .va = linear_address, + .format = linear->buffer.b.b.format, + .bpp = bpp, .offset = { .x = 0, @@ -345,8 +357,9 @@ bool cik_sdma_copy_texture(struct si_context *sctx, struct si_texture *sdst, str .slice_pitch = linear_slice_pitch, }; - const struct ac_sdma_surf_tiled surf_tiled = { + const struct ac_sdma_surf surf_tiled = { .surf = &tiled->surface, + .format = tiled->buffer.b.b.format, .va = tiled_address, .bpp = bpp, .offset = @@ -355,6 +368,7 @@ bool cik_sdma_copy_texture(struct si_context *sctx, struct si_texture *sdst, str .y = 0, .z = 0, }, + .is_compressed = false, .extent = { .width = pitch_tile_max + 1, @@ -363,7 +377,6 @@ bool cik_sdma_copy_texture(struct si_context *sctx, struct si_texture *sdst, str }, .first_level = 0, .num_levels = 1, - .is_compressed = false, .htile_enabled = false, };