diff --git a/src/freedreno/drm/freedreno_drmif.h b/src/freedreno/drm/freedreno_drmif.h
index 4abef176249..b0deb4b9a2a 100644
--- a/src/freedreno/drm/freedreno_drmif.h
+++ b/src/freedreno/drm/freedreno_drmif.h
@@ -98,21 +98,24 @@ struct fd_fence {
    uint32_t ufence;     /* userspace fence */
 };
 
-/* bo flags: */
+/*
+ * bo flags:
+ */
+
+#define FD_BO_CACHED_COHERENT     BITSET_BIT(0) /* Default caching is WRITECOMBINE */
 #define FD_BO_GPUREADONLY         BITSET_BIT(1)
-#define FD_BO_SCANOUT             BITSET_BIT(2)
-/* Default caching is WRITECOMBINE: */
-#define FD_BO_CACHED_COHERENT     BITSET_BIT(3)
-/* Hint that the bo will not be mmap'd: */
-#define FD_BO_NOMAP               BITSET_BIT(4)
+#define FD_BO_NOMAP               BITSET_BIT(2) /* Hint that the bo will not be mmap'd */
+
 /* Hint that the bo will be exported/shared: */
-#define FD_BO_SHARED              BITSET_BIT(5)
+#define FD_BO_SHARED              BITSET_BIT(4)
+#define FD_BO_SCANOUT             BITSET_BIT(5)
 
 /* internal bo flags: */
 #define _FD_BO_VIRTIO_SHM         BITSET_BIT(6)
-#define _FD_BO_RING               BITSET_BIT(7)
 
-/* bo access flags: (keep aligned to MSM_PREP_x) */
+/*
+ * bo access flags: (keep aligned to MSM_PREP_x)
+ */
 #define FD_BO_PREP_READ   BITSET_BIT(0)
 #define FD_BO_PREP_WRITE  BITSET_BIT(1)
 #define FD_BO_PREP_NOSYNC BITSET_BIT(2)
diff --git a/src/freedreno/drm/freedreno_priv.h b/src/freedreno/drm/freedreno_priv.h
index 684403d7c72..62fc182ba97 100644
--- a/src/freedreno/drm/freedreno_priv.h
+++ b/src/freedreno/drm/freedreno_priv.h
@@ -57,7 +57,7 @@ extern simple_mtx_t fence_lock;
 #define SUBALLOC_SIZE (32 * 1024)
 /* Maximum known alignment requirement is a6xx's TEX_CONST at 16 dwords */
 #define SUBALLOC_ALIGNMENT 64
-#define RING_FLAGS (FD_BO_GPUREADONLY | FD_BO_CACHED_COHERENT | _FD_BO_RING)
+#define RING_FLAGS (FD_BO_GPUREADONLY | FD_BO_CACHED_COHERENT)
 
 /*
  * Stupid/simple growable array implementation: