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asahi: Don't allow linear depth/stencil buffers

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We don't have a way to tell the ZLS hardware to use linear buffers, so if a
buffer could be used for depth/stencil, we have to twiddle. This isn't a problem
in practice, since depth/stencil buffers can't be shared across processes or
mapped directly as linear.

Fixes faults in depthstencil-render-miplevels, which was picking linear for one
buffer because of a STAGING bind flag. But that won't work :-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21753>
This commit is contained in:
Alyssa Rosenzweig 2023-03-04 13:16:54 -05:00 • committed by Marge Bot
parent e61d022313
commit e61d6540e6
1 changed files with 4 additions and 0 deletions
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4
src/gallium/drivers/asahi/agx_pipe.c
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@ -289,6 +289,10 @@ agx_linear_allowed(const struct agx_resource *pres)
if (pres->base.last_level != 0)
return false;
/* Depth/stencil buffers must not be linear */
if (pres->base.bind & PIPE_BIND_DEPTH_STENCIL)
return false;
switch (pres->base.target) {
/* 1D is always linear */
case PIPE_BUFFER: