fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-14 07:58:16 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 3

nir: Work around MSVC x86 internal compiler error

Browse source 
Fixes: 1fd8b466 ("nir,spirv: add sparse image loads")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4108
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8581>
(cherry picked from commit 13b21156e4)
This commit is contained in:
Jesse Natalie 2021-01-19 11:23:39 -08:00 • committed by Dylan Baker
parent 06c9ae6d3f
commit e60e3ef841
2 changed files with 3 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -580,7 +580,7 @@
"description": "nir: Work around MSVC x86 internal compiler error",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": "1fd8b466672b76ad206af8aac6002e8a658db9fb"
},

3
src/compiler/nir/nir_lower_input_attachments.c
View file

@ -151,8 +151,9 @@ try_lower_input_load(nir_function_impl *impl, nir_intrinsic_instr *load,
if (tex->is_sparse) {
unsigned load_result_size = load->dest.ssa.num_components - 1;
unsigned load_result_mask = BITFIELD_MASK(load_result_size);
nir_ssa_def *res = nir_channels(
&b, &tex->dest.ssa, BITFIELD_MASK(load_result_size) | 0x10);
&b, &tex->dest.ssa, load_result_mask | 0x10);
nir_ssa_def_rewrite_uses(&load->dest.ssa, nir_src_for_ssa(res));
} else {