From e5e7fc17f90bfdb13209d6f3e2a1b864110edb7e Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Sat, 24 Jan 2026 20:40:53 +0100 Subject: [PATCH] r600/sfn: implement minimal 16bit f2f32 support Part-of: --- src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp b/src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp index 4eeb2b0cfd6..fd1a0617172 100644 --- a/src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp @@ -1788,6 +1788,12 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader) return emit_alu_b2x(*alu, ALU_SRC_1, shader); case nir_op_b2i32: return emit_alu_b2x(*alu, ALU_SRC_1_INT, shader); + case nir_op_u2u16: + assert(alu->src[0].src.ssa->bit_size == 32); + return emit_alu_op1(*alu, op1_mov, shader); + case nir_op_f2f32: + assert(alu->src[0].src.ssa->bit_size == 16); + return emit_alu_op1(*alu, op1_flt16_to_flt32, shader); case nir_op_bfm: return emit_alu_op2_int(*alu, op2_bfm_int, shader, op2_opt_none);