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intel/compiler: fix register allocation in opt_peephole_sel

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This wasn't handling 64-bit cases properly. Found by inspection.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
This commit is contained in:
Iago Toral Quiroga 2018-11-27 08:57:13 +01:00
parent 6f737b9207
commit e55cbf26ea
1 changed files with 1 additions and 2 deletions
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3
src/intel/compiler/brw_fs_sel_peephole.cpp
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@ -198,8 +198,7 @@ fs_visitor::opt_peephole_sel()
*/
fs_reg src0(then_mov[i]->src[0]);
if (src0.file == IMM) {
src0 = vgrf(glsl_type::float_type);
src0.type = then_mov[i]->src[0].type;
src0 = ibld.vgrf(then_mov[i]->src[0].type);
ibld.MOV(src0, then_mov[i]->src[0]);
}