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radv: update conformance version
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A lot of people (including me) misinterpreted the conformanceVersion
field for so long. The Vulkan spec wasn't very clear either but it's
going to be clarified soon.

VkConformanceVersion is actually unrelated to the official CTS
conformance process in Khronos. It just reports the latest CTS version
that the driver can pass, not more.

For GFX8+, RADV should be passing CTS 1.4.0.0 on all GPUs because we
validated this CTS version recently for Vulkan 1.4.

For GFX6-7, which only suppports Vulkan 1.3, RADV should also be
passing CTS 1.4.0.0, because newer versions of the CTS can be used
to validate a driver against an older version of the spec, so
it's perfectly fine to report a higher CTS version than the Vulkan version.

Newer CTS versions likely can't pass 100% due to a DGC bug that I still
need to fix.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12799
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34018>
This commit is contained in:
Samuel Pitoiset 2025-03-12 08:40:22 +01:00 • committed by Marge Bot
parent 3ea479c584
commit e519e0b9e6
1 changed files with 7 additions and 59 deletions
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66
src/amd/vulkan/radv_physical_device.c
View file

@ -133,64 +133,6 @@ radv_emulate_rt(const struct radv_physical_device *pdev)
return instance->perftest_flags & RADV_PERFTEST_EMULATE_RT;
}
static VkConformanceVersion
radv_get_conformance_version(const struct radv_physical_device *pdev)
{
VkConformanceVersion conformance_version = {0}; /* Non-conformant by default */
if (pdev->info.gfx_level >= GFX8 && pdev->info.gfx_level <= GFX11_5) {
switch (pdev->info.family) {
/* GFX8 */
case CHIP_TONGA:
case CHIP_FIJI:
case CHIP_POLARIS10:
/* GFX9 */
case CHIP_VEGA10:
case CHIP_RENOIR:
/* GFX10 */
case CHIP_NAVI14:
/* GFX10.3 */
case CHIP_NAVI21:
case CHIP_NAVI22:
case CHIP_VANGOGH:
/* GFX11 */
case CHIP_NAVI31:
/* GFX11.5 */
case CHIP_GFX1150:
conformance_version = (VkConformanceVersion){
.major = 1,
.minor = 4,
.subminor = 0,
.patch = 0,
};
break;
default:
break;
}
} else {
/* GFX6-7 */
switch (pdev->info.family) {
case CHIP_TAHITI:
case CHIP_PITCAIRN:
case CHIP_VERDE:
case CHIP_OLAND:
case CHIP_BONAIRE:
case CHIP_HAWAII:
conformance_version = (VkConformanceVersion){
.major = 1,
.minor = 3,
.subminor = 9,
.patch = 2,
};
break;
default:
break;
}
}
return conformance_version;
}
static void
parse_hex(char *out, const char *in, unsigned length)
{
@ -1558,7 +1500,6 @@ radv_get_physical_device_properties(struct radv_physical_device *pdev)
.maxMemoryAllocationSize = RADV_MAX_MEMORY_ALLOCATION_SIZE,
/* Vulkan 1.2 */
.conformanceVersion = radv_get_conformance_version(pdev),
/* On AMD hardware, denormals and rounding modes for fp16/fp64 are
* controlled by the same config register.
*/
@ -1975,6 +1916,13 @@ radv_get_physical_device_properties(struct radv_physical_device *pdev)
snprintf(p->driverInfo, VK_MAX_DRIVER_INFO_SIZE, "Mesa " PACKAGE_VERSION MESA_GIT_SHA1 "%s",
radv_get_compiler_string(pdev));
p->conformanceVersion = (VkConformanceVersion){
.major = 1,
.minor = 4,
.subminor = 0,
.patch = 0,
};
memset(p->optimalTilingLayoutUUID, 0, sizeof(p->optimalTilingLayoutUUID));
/* VK_EXT_physical_device_drm */