brw: only lower flrp once

No shader-db changes on any Intel platform.

fossil-db:

Lunar Lake
Totals:
Instrs: 926275147 -> 926273376 (-0.00%); split: -0.00%, +0.00%
Cycle count: 106012190597 -> 106011255305 (-0.00%); split: -0.00%, +0.00%
Spill count: 3424180 -> 3424168 (-0.00%)
Fill count: 4877035 -> 4877017 (-0.00%)
Max live registers: 193918196 -> 193918122 (-0.00%); split: -0.00%, +0.00%
Max dispatch width: 49106544 -> 49106448 (-0.00%); split: +0.00%, -0.00%
Non SSA regs after NIR: 231281721 -> 231281719 (-0.00%)

Totals from 1705 (0.08% of 2020028) affected shaders:
Instrs: 926974 -> 925203 (-0.19%); split: -0.28%, +0.09%
Cycle count: 39024288 -> 38088996 (-2.40%); split: -2.77%, +0.37%
Spill count: 2229 -> 2217 (-0.54%)
Fill count: 2977 -> 2959 (-0.60%)
Max live registers: 183056 -> 182982 (-0.04%); split: -0.20%, +0.16%
Max dispatch width: 46880 -> 46784 (-0.20%); split: +0.07%, -0.27%
Non SSA regs after NIR: 263520 -> 263518 (-0.00%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12526>
This commit is contained in:
Alyssa Rosenzweig 2025-11-12 13:47:57 -05:00 committed by Marge Bot
parent 92e609f4fe
commit e4b8b758b1

View file

@ -1215,11 +1215,6 @@ brw_nir_optimize(nir_shader *nir,
const struct intel_device_info *devinfo)
{
bool progress;
unsigned lower_flrp =
(nir->options->lower_flrp16 ? 16 : 0) |
(nir->options->lower_flrp32 ? 32 : 0) |
(nir->options->lower_flrp64 ? 64 : 0);
unsigned long opt_line = 0;
do {
progress = false;
@ -1296,15 +1291,6 @@ brw_nir_optimize(nir_shader *nir,
LOOP_OPT(nir_lower_constant_convert_alu_types);
LOOP_OPT(nir_opt_constant_folding);
if (lower_flrp != 0) {
LOOP_OPT(nir_lower_flrp, lower_flrp, false /* always_precise */);
/* Nothing should rematerialize any flrps, so we only need to do this
* lowering once.
*/
lower_flrp = 0;
}
LOOP_OPT(nir_opt_dead_cf);
if (LOOP_OPT(nir_opt_loop)) {
/* If nir_opt_loop makes progress, then we need to clean
@ -1551,6 +1537,13 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
brw_nir_optimize(nir, devinfo);
unsigned lower_flrp =
(nir->options->lower_flrp16 ? 16 : 0) |
(nir->options->lower_flrp32 ? 32 : 0) |
(nir->options->lower_flrp64 ? 64 : 0);
OPT(nir_lower_flrp, lower_flrp, false /* always_precise */);
struct nir_opt_16bit_tex_image_options options = {
.rounding_mode = nir_rounding_mode_undef,
.opt_tex_dest_types = nir_type_float | nir_type_int | nir_type_uint,