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intel/dev: Add support for pixel pipe subslice accounting on multi-slice GPUs.

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Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14436>
This commit is contained in:
Francisco Jerez 2021-06-08 23:53:54 +00:00 • committed by Marge Bot
parent f3274e94fd
commit e48c29acca
4 changed files with 29 additions and 12 deletions
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10
src/gallium/drivers/iris/iris_state.c
View file

@ -831,7 +831,10 @@ static void
gfx11_upload_pixel_hashing_tables(struct iris_batch *batch)
{
const struct intel_device_info *devinfo = &batch->screen->devinfo;
assert(devinfo->ppipe_subslices[2] == 0);
/* Gfx11 hardware has two pixel pipes at most. */
for (unsigned i = 2; i < ARRAY_SIZE(devinfo->ppipe_subslices); i++)
assert(devinfo->ppipe_subslices[i] == 0);
if (devinfo->ppipe_subslices[0] == devinfo->ppipe_subslices[1])
return;
@ -873,12 +876,13 @@ gfx12_upload_pixel_hashing_tables(struct iris_batch *batch)
unsigned ppipes_of[3] = {};
for (unsigned n = 0; n < ARRAY_SIZE(ppipes_of); n++) {
for (unsigned p = 0; p < ARRAY_SIZE(devinfo->ppipe_subslices); p++)
for (unsigned p = 0; p < 3; p++)
ppipes_of[n] += (devinfo->ppipe_subslices[p] == n);
}
/* Gfx12 has three pixel pipes. */
assert(ppipes_of[0] + ppipes_of[1] + ppipes_of[2] == 3);
for (unsigned p = 3; p < ARRAY_SIZE(devinfo->ppipe_subslices); p++)
assert(devinfo->ppipe_subslices[p] == 0);
if (ppipes_of[2] == 3 || ppipes_of[0] == 2) {
/* All three pixel pipes have the maximum number of active dual

20
src/intel/dev/intel_device_info.c
View file

@ -1084,8 +1084,13 @@ update_from_topology(struct intel_device_info *devinfo,
assert(n_subslices > 0);
if (devinfo->ver >= 11) {
/* On current ICL+ hardware we only have one slice. */
assert(devinfo->slice_masks == 1);
/* The kernel only reports one slice on all existing ICL+
* platforms, even if multiple slices are present. The slice
* mask is allowed to have the accurate value greater than 1 on
* gfx12.5+ platforms though, in order to be tolerant with the
* behavior of our simulation environment.
*/
assert(devinfo->slice_masks == 1 || devinfo->verx10 >= 125);
/* Count the number of subslices on each pixel pipe. Assume that every
* contiguous group of 4 subslices in the mask belong to the same pixel
@ -1096,9 +1101,14 @@ update_from_topology(struct intel_device_info *devinfo,
*/
const unsigned ppipe_bits = devinfo->ver >= 12 ? 2 : 4;
for (unsigned p = 0; p < INTEL_DEVICE_MAX_PIXEL_PIPES; p++) {
const unsigned ppipe_mask = BITFIELD_RANGE(p * ppipe_bits, ppipe_bits);
devinfo->ppipe_subslices[p] =
__builtin_popcount(devinfo->subslice_masks[0] & ppipe_mask);
const unsigned offset = p * ppipe_bits;
const unsigned ppipe_mask = BITFIELD_RANGE(offset % 8, ppipe_bits);
if (offset / 8 < ARRAY_SIZE(devinfo->subslice_masks))
devinfo->ppipe_subslices[p] =
__builtin_popcount(devinfo->subslice_masks[offset / 8] & ppipe_mask);
else
devinfo->ppipe_subslices[p] = 0;
}
}

2
src/intel/dev/intel_device_info.h
View file

@ -41,7 +41,7 @@ struct drm_i915_query_topology_info;
#define INTEL_DEVICE_MAX_SLICES 8
#define INTEL_DEVICE_MAX_SUBSLICES (8) /* Maximum on gfx11 */
#define INTEL_DEVICE_MAX_EUS_PER_SUBSLICE (16) /* Maximum on gfx12 */
#define INTEL_DEVICE_MAX_PIXEL_PIPES (3) /* Maximum on gfx12 */
#define INTEL_DEVICE_MAX_PIXEL_PIPES (16) /* Maximum on DG2 */
#define INTEL_PLATFORM_GROUP_START(group, new_enum) \
new_enum, INTEL_PLATFORM_ ## group ## _START = new_enum

9
src/intel/vulkan/genX_state.c
View file

@ -80,7 +80,9 @@ genX(emit_slice_hashing_state)(struct anv_device *device,
struct anv_batch *batch)
{
#if GFX_VER == 11
assert(device->info.ppipe_subslices[2] == 0);
/* Gfx11 hardware has two pixel pipes at most. */
for (unsigned i = 2; i < ARRAY_SIZE(device->info.ppipe_subslices); i++)
assert(device->info.ppipe_subslices[i] == 0);
if (device->info.ppipe_subslices[0] == device->info.ppipe_subslices[1])
return;
@ -113,12 +115,13 @@ genX(emit_slice_hashing_state)(struct anv_device *device,
unsigned ppipes_of[3] = {};
for (unsigned n = 0; n < ARRAY_SIZE(ppipes_of); n++) {
for (unsigned p = 0; p < ARRAY_SIZE(device->info.ppipe_subslices); p++)
for (unsigned p = 0; p < 3; p++)
ppipes_of[n] += (device->info.ppipe_subslices[p] == n);
}
/* Gfx12 has three pixel pipes. */
assert(ppipes_of[0] + ppipes_of[1] + ppipes_of[2] == 3);
for (unsigned p = 3; p < ARRAY_SIZE(device->info.ppipe_subslices); p++)
assert(device->info.ppipe_subslices[p] == 0);
if (ppipes_of[2] == 3 || ppipes_of[0] == 2) {
/* All three pixel pipes have the maximum number of active dual