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swr: simd16 shaders work in progress

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Start building vertex shaders as simd16.

Disabled by default, set USE_SIMD16_SHADERS in knobs.h to experiment.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
This commit is contained in:
Tim Rowley 2017-10-10 11:08:29 -05:00
parent 9cad9cbaf8
commit e484805352
3 changed files with 21 additions and 2 deletions
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6
src/gallium/drivers/swr/swr_screen.cpp
View file

@ -1058,6 +1058,9 @@ swr_destroy_screen(struct pipe_screen *p_screen)
swr_fence_reference(p_screen, &screen->flush_fence, NULL);
JitDestroyContext(screen->hJitMgr);
#if USE_SIMD16_SHADERS
JitDestroyContext(screen->hJitMgr16);
#endif
if (winsys->destroy)
winsys->destroy(winsys);
@ -1141,6 +1144,9 @@ swr_create_screen_internal(struct sw_winsys *winsys)
// Pass in "" for architecture for run-time determination
screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, "", "swr");
#if USE_SIMD16_SHADERS
screen->hJitMgr16 = JitCreateContext(16, "", "swr");
#endif
swr_fence_init(&screen->base);

3
src/gallium/drivers/swr/swr_screen.h
View file

@ -49,6 +49,9 @@ struct swr_screen {
uint32_t client_copy_limit;
HANDLE hJitMgr;
#if USE_SIMD16_SHADERS
HANDLE hJitMgr16;
#endif
PFNSwrGetInterface pfnSwrGetInterface;
};

14
src/gallium/drivers/swr/swr_shader.cpp
View file

@ -693,7 +693,7 @@ swr_compile_gs(struct swr_context *ctx, swr_jit_gs_key &key)
void
BuilderSWR::WriteVS(Value *pVal, Value *pVsContext, Value *pVtxOutput, unsigned slot, unsigned channel)
{
#if USE_SIMD16_FRONTEND
#if USE_SIMD16_FRONTEND && !USE_SIMD16_SHADERS
// interleave the simdvertex components into the dest simd16vertex
// slot16offset = slot8offset * 2
// comp16offset = comp8offset * 2 + alternateOffset
@ -756,6 +756,9 @@ BuilderSWR::CompileVS(struct swr_context *ctx, swr_jit_vs_key &key)
const_sizes_ptr->setName("num_vs_constants");
Value *vtxInput = LOAD(pVsCtx, {0, SWR_VS_CONTEXT_pVin});
#if USE_SIMD16_SHADERS
vtxInput = BITCAST(vtxInput, PointerType::get(Gen_simd16vertex(JM()), 0));
#endif
for (uint32_t attrib = 0; attrib < PIPE_MAX_SHADER_INPUTS; attrib++) {
const unsigned mask = swr_vs->info.base.input_usage_mask[attrib];
@ -777,7 +780,7 @@ BuilderSWR::CompileVS(struct swr_context *ctx, swr_jit_vs_key &key)
lp_build_tgsi_soa(gallivm,
swr_vs->pipe.tokens,
lp_type_float_vec(32, 32 * 8),
lp_type_float_vec(32, 32 * mVWidth),
NULL, // mask
wrap(consts_ptr),
wrap(const_sizes_ptr),
@ -795,6 +798,9 @@ BuilderSWR::CompileVS(struct swr_context *ctx, swr_jit_vs_key &key)
IRB()->SetInsertPoint(unwrap(LLVMGetInsertBlock(gallivm->builder)));
Value *vtxOutput = LOAD(pVsCtx, {0, SWR_VS_CONTEXT_pVout});
#if USE_SIMD16_SHADERS
vtxOutput = BITCAST(vtxOutput, PointerType::get(Gen_simd16vertex(JM()), 0));
#endif
for (uint32_t channel = 0; channel < TGSI_NUM_CHANNELS; channel++) {
for (uint32_t attrib = 0; attrib < PIPE_MAX_SHADER_OUTPUTS; attrib++) {
@ -905,7 +911,11 @@ swr_compile_vs(struct swr_context *ctx, swr_jit_vs_key &key)
return NULL;
BuilderSWR builder(
#if USE_SIMD16_SHADERS
reinterpret_cast<JitManager *>(swr_screen(ctx->pipe.screen)->hJitMgr16),
#else
reinterpret_cast<JitManager *>(swr_screen(ctx->pipe.screen)->hJitMgr),
#endif
"VS");
PFN_VERTEX_FUNC func = builder.CompileVS(ctx, key);