From e46efe260dcce93e5a6488ec0bc76f130a87ec38 Mon Sep 17 00:00:00 2001 From: Icecream95 Date: Fri, 23 Jul 2021 12:14:32 +1200 Subject: [PATCH] pan/mdg: Use the correct swizzle for condition moves Fixes: 70072a20e00 ("pan/midgard: Refactor swizzles") Part-of: (cherry picked from commit ad60fffd49db1c1a1089e8dd697a48c3537504cf) --- .pick_status.json | 2 +- src/panfrost/midgard/midgard_schedule.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index f95b0e88b2e..211b2eb4445 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -517,7 +517,7 @@ "description": "pan/mdg: Use the correct swizzle for condition moves", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "70072a20e0086ad2d3714216a2b8fb4a97776385" }, diff --git a/src/panfrost/midgard/midgard_schedule.c b/src/panfrost/midgard/midgard_schedule.c index a371f6eef05..1b91d128207 100644 --- a/src/panfrost/midgard/midgard_schedule.c +++ b/src/panfrost/midgard/midgard_schedule.c @@ -978,7 +978,7 @@ mir_schedule_condition(compiler_context *ctx, midgard_instruction *cond = mir_schedule_comparison( ctx, instructions, predicate, worklist, count, last->src[condition_index], - vector, last->swizzle[2], last); + vector, last->swizzle[condition_index], last); /* We have exclusive reign over this (possibly move) conditional * instruction. We can rewrite into a pipeline conditional register */