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ir3/compiler: Handle new alu opcodes 'umul_low' and 'imadsh_mix16'

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They directly emit ir3_MULL_U and ir3_MADSH_M16 respectively.

Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Eduardo Lima Mitev 2019-05-12 21:12:59 +02:00
parent c27b3758fa
commit e45de3a6c3
1 changed files with 6 additions and 0 deletions
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6
src/freedreno/ir3/ir3_compiler_nir.c
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@ -559,6 +559,12 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
dst[0] = ir3_MUL_S(b, src[0], 0, src[1], 0);
}
break;
case nir_op_umul_low:
dst[0] = ir3_MULL_U(b, src[0], 0, src[1], 0);
break;
case nir_op_imadsh_mix16:
dst[0] = ir3_MADSH_M16(b, src[0], 0, src[1], 0, src[2], 0);
break;
case nir_op_ineg:
dst[0] = ir3_ABSNEG_S(b, src[0], IR3_REG_SNEG);
break;