anv/brw: fix output tcs vertices

brw_prog_tcs_data::instances can be divided by vertices per threads on
earlier generations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a91e0e0d61 ("brw: add support for separate tessellation shader compilation")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38036>

src/intel/compiler/brw/brw_compile_tcs.cpp

@@ -224,6 +224,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
       BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID);
 
    prog_data->input_vertices = key->input_vertices;
+   prog_data->output_vertices = nir->info.tess.tcs_vertices_out;
    prog_data->patch_count_threshold = get_patch_count_threshold(key->input_vertices);
 
    if (compiler->use_tcs_multi_patch) {

src/intel/compiler/brw/brw_compiler.h

@@ -1175,6 +1175,9 @@ struct brw_tcs_prog_data
    /** Number of input vertices, 0 means dynamic */
    unsigned input_vertices;
 
+   /** Number of output vertices */
+   unsigned output_vertices;
+
    /** Should the non-SINGLE_PATCH payload provide primitive ID? */
    bool include_primitive_id;
 

src/intel/vulkan/genX_gfx_state.c

@@ -2550,7 +2550,7 @@ cmd_buffer_flush_gfx_runtime_state(struct anv_gfx_dynamic_state *hw_state,
 
       SET(TESS_CONFIG, tess_config,
           intel_tess_config(dyn->ts.patch_control_points,
-                            tcs_prog_data->instances,
+                            tcs_prog_data->output_vertices,
                             brw_tess_info_domain(tess_info),
                             tcs_prog_data->base.vue_map.num_per_patch_slots,
                             tcs_prog_data->base.vue_map.num_per_vertex_slots,