diff --git a/src/intel/compiler/jay/jay_from_nir.c b/src/intel/compiler/jay/jay_from_nir.c
index 4921db56e4a..eacd0588f97 100644
--- a/src/intel/compiler/jay/jay_from_nir.c
+++ b/src/intel/compiler/jay/jay_from_nir.c
@@ -1501,8 +1501,8 @@ jay_emit_intrinsic(struct nir_to_jay_state *nj, nir_intrinsic_instr *intr)
       break;
 
    case nir_intrinsic_load_layer_id:
-      jay_EXTRACT_LAYER(b, dst, jay_extract(nj->payload.u0, 9),
-                        payload_u1(nj, 9, 1));
+      jay_EXTRACT_SUBSPAN_INFO(b, dst, jay_extract(nj->payload.u0, 9),
+                               payload_u1(nj, 9, 1), 0x7ff);
       break;
 
    case nir_intrinsic_load_front_face: {
diff --git a/src/intel/compiler/jay/jay_opcodes.py b/src/intel/compiler/jay/jay_opcodes.py
index 84be0303ffe..4e4ac7055e6 100644
--- a/src/intel/compiler/jay/jay_opcodes.py
+++ b/src/intel/compiler/jay/jay_opcodes.py
@@ -174,7 +174,7 @@ op('and_u32_u16', 2, 'u32')
 # 2x16-bit offset within each quad, giving 2x16-bit per-lane coordinates.
 op('expand_quad', 2, 'u32')
 op('offset_packed_pixel_coords', 1, 'u32')
-op('extract_layer', 2, 'u32')
+op('extract_subspan_info', 2, 'u32', Props.CMOD, ['uint16_t mask'])
 
 # Phi function representations
 #
diff --git a/src/intel/compiler/jay/jay_simd_width.c b/src/intel/compiler/jay/jay_simd_width.c
index 0064d6335ba..8987a50af87 100644
--- a/src/intel/compiler/jay/jay_simd_width.c
+++ b/src/intel/compiler/jay/jay_simd_width.c
@@ -18,7 +18,7 @@ max_simd_width(const jay_shader *shader, const jay_inst *I)
 
    /* These special instructions need to be split for various reasons. */
    if (I->op == JAY_OPCODE_EXPAND_QUAD ||
-       I->op == JAY_OPCODE_EXTRACT_LAYER ||
+       I->op == JAY_OPCODE_EXTRACT_SUBSPAN_INFO ||
        I->op == JAY_OPCODE_EXTRACT_BYTE_PER_8LANES ||
        I->op == JAY_OPCODE_OFFSET_PACKED_PIXEL_COORDS ||
        I->op == JAY_OPCODE_DESWIZZLE_ODD ||
diff --git a/src/intel/compiler/jay/jay_to_binary.c b/src/intel/compiler/jay/jay_to_binary.c
index 45918476fca..c9cdf1fa81f 100644
--- a/src/intel/compiler/jay/jay_to_binary.c
+++ b/src/intel/compiler/jay/jay_to_binary.c
@@ -260,7 +260,7 @@ static const struct {
    OP(ENDIF, ENDIF, 0),
    OP(EXPAND_QUAD, MOV, 2),
    OP(EXTRACT_BYTE_PER_8LANES, MOV, 2),
-   OP(EXTRACT_LAYER, AND, 2),
+   OP(EXTRACT_SUBSPAN_INFO, AND, 2),
    OP(FBH, FBH, 1),
    OP(FBL, FBL, 1),
    OP(FRC, FRC, 1),
@@ -503,14 +503,16 @@ emit(struct jay_codegen *jc,
       break;
    }
 
-   /* Gfx20+ has separate Render Target Array indices for each pair of subspans
-    * in order to support multiple polygons, so we need to use a <1;8,0> region
-    * in order to select the word for each channel.
+   /* On Gfx20+, the viewport index, render target array index, and facing
+    * fields come together in consecutive words for each pair of subspans.
+    * We use a <1;8,0>W region so that each pair of 4-lane subspans reads
+    * the right value, and split to SIMD16 since the high subspans come
+    * in a separate register.
     */
-   case JAY_OPCODE_EXTRACT_LAYER:
+   case JAY_OPCODE_EXTRACT_SUBSPAN_INFO:
       gen->src[0] =
          gen_restride(gen_retype(gen->src[simd_offs], GEN_TYPE_UW), 1, 8, 0);
-      gen->src[1] = gen_imm_uw(0x7ff);
+      gen->src[1] = gen_imm_uw(jay_extract_subspan_info_mask(I));
       break;
 
    case JAY_OPCODE_EXPAND_QUAD: