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radeonsi: add an emulated image descriptor for gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
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parent
96913bbf3e
commit
e3c6ed0685
4 changed files with 127 additions and 10 deletions
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@ -309,6 +309,13 @@ void si_set_mutable_tex_desc_fields(struct si_screen *sscreen, struct si_texture
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va += (uint64_t)base_level_info->offset_256B * 256;
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}
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if (!sscreen->info.has_image_opcodes) {
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/* Set it as a buffer descriptor. */
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state[0] = va;
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state[1] |= S_008F04_BASE_ADDRESS_HI(va >> 32);
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return;
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}
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state[0] = va >> 8;
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state[1] |= S_008F14_BASE_ADDRESS_HI(va >> 40);
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@ -822,7 +829,8 @@ static void si_set_shader_image_desc(struct si_context *ctx, const struct pipe_i
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screen->make_texture_descriptor(
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screen, tex, false, res->b.b.target, view->format, swizzle, hw_level, hw_level,
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view->u.tex.first_layer, view->u.tex.last_layer, width, height, depth, desc, fmask_desc);
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view->u.tex.first_layer, view->u.tex.last_layer, width, height, depth, false,
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desc, fmask_desc);
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si_set_mutable_tex_desc_fields(screen, tex, &tex->surface.u.legacy.level[level], level, level,
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util_format_get_blockwidth(view->format),
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false, access, desc);
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@ -561,8 +561,8 @@ struct si_screen {
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enum pipe_texture_target target, enum pipe_format pipe_format,
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const unsigned char state_swizzle[4], unsigned first_level,
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unsigned last_level, unsigned first_layer, unsigned last_layer,
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unsigned width, unsigned height, unsigned depth, uint32_t *state,
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uint32_t *fmask_state);
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unsigned width, unsigned height, unsigned depth,
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bool get_bo_metadata, uint32_t *state, uint32_t *fmask_state);
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unsigned max_memory_usage_kb;
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unsigned pa_sc_raster_config;
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@ -4047,6 +4047,101 @@ static unsigned gfx9_border_color_swizzle(const unsigned char swizzle[4])
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return bc_swizzle;
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}
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/**
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* Translate the parameters to an image descriptor for CDNA image emulation.
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* In this function, we choose our own image descriptor format because we emulate image opcodes
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* using buffer opcodes.
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*/
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static void cdna_emu_make_image_descriptor(struct si_screen *screen, struct si_texture *tex,
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bool sampler, enum pipe_texture_target target,
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enum pipe_format pipe_format,
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const unsigned char state_swizzle[4], unsigned first_level,
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unsigned last_level, unsigned first_layer,
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unsigned last_layer, unsigned width, unsigned height,
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unsigned depth, uint32_t *state, uint32_t *fmask_state)
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{
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const struct util_format_description *desc = util_format_description(pipe_format);
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/* We don't need support these. We only need enough to support VAAPI and OpenMAX. */
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if (target == PIPE_TEXTURE_CUBE ||
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target == PIPE_TEXTURE_CUBE_ARRAY ||
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tex->buffer.b.b.last_level > 0 ||
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tex->buffer.b.b.nr_samples >= 2 ||
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desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB ||
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desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED ||
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util_format_is_compressed(pipe_format)) {
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assert(!"unexpected texture type");
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memset(state, 0, 8 * 4);
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return;
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}
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/* Adjust the image parameters according to the texture type. */
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switch (target) {
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case PIPE_TEXTURE_1D:
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height = 1;
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FALLTHROUGH;
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case PIPE_TEXTURE_2D:
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case PIPE_TEXTURE_RECT:
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depth = 1;
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break;
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case PIPE_TEXTURE_1D_ARRAY:
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height = 1;
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FALLTHROUGH;
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case PIPE_TEXTURE_2D_ARRAY:
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first_layer = MIN2(first_layer, tex->buffer.b.b.array_size - 1);
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last_layer = MIN2(last_layer, tex->buffer.b.b.array_size - 1);
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last_layer = MAX2(last_layer, first_layer);
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depth = last_layer - first_layer + 1;
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break;
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case PIPE_TEXTURE_3D:
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first_layer = 0;
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break;
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default:
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unreachable("invalid texture target");
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}
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unsigned stride = desc->block.bits / 8;
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uint64_t num_records = tex->surface.surf_size / stride;
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assert(num_records <= UINT32_MAX);
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/* Prepare the format fields. */
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unsigned char swizzle[4];
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util_format_compose_swizzles(desc->swizzle, state_swizzle, swizzle);
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/* Buffer descriptor */
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state[0] = 0;
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state[1] = S_008F04_STRIDE(stride);
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state[2] = num_records;
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state[3] = S_008F0C_DST_SEL_X(si_map_swizzle(swizzle[0])) |
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S_008F0C_DST_SEL_Y(si_map_swizzle(swizzle[1])) |
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S_008F0C_DST_SEL_Z(si_map_swizzle(swizzle[2])) |
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S_008F0C_DST_SEL_W(si_map_swizzle(swizzle[3]));
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if (screen->info.gfx_level >= GFX10) {
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const struct gfx10_format *fmt = &ac_get_gfx10_format_table(&screen->info)[pipe_format];
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state[3] |= S_008F0C_FORMAT(fmt->img_format) |
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S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_STRUCTURED_WITH_OFFSET) |
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S_008F0C_RESOURCE_LEVEL(screen->info.gfx_level < GFX11);
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} else {
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int first_non_void = util_format_get_first_non_void_channel(pipe_format);
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unsigned num_format = si_translate_buffer_numformat(&screen->b, desc, first_non_void);
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unsigned data_format = si_translate_buffer_dataformat(&screen->b, desc, first_non_void);
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state[3] |= S_008F0C_NUM_FORMAT(num_format) |
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S_008F0C_DATA_FORMAT(data_format);
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}
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/* Additional fields used by image opcode emulation. */
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state[4] = width | (height << 16);
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state[5] = depth | (first_layer << 16);
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state[6] = tex->surface.u.gfx9.surf_pitch;
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state[7] = (uint32_t)tex->surface.u.gfx9.surf_pitch * tex->surface.u.gfx9.surf_height;
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}
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/**
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* Build the sampler view descriptor for a texture.
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*/
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@ -4054,8 +4149,15 @@ static void gfx10_make_texture_descriptor(
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struct si_screen *screen, struct si_texture *tex, bool sampler, enum pipe_texture_target target,
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enum pipe_format pipe_format, const unsigned char state_swizzle[4], unsigned first_level,
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unsigned last_level, unsigned first_layer, unsigned last_layer, unsigned width, unsigned height,
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unsigned depth, uint32_t *state, uint32_t *fmask_state)
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unsigned depth, bool get_bo_metadata, uint32_t *state, uint32_t *fmask_state)
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{
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if (!screen->info.has_image_opcodes && !get_bo_metadata) {
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cdna_emu_make_image_descriptor(screen, tex, sampler, target, pipe_format, state_swizzle,
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first_level, last_level, first_layer, last_layer, width,
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height, depth, state, fmask_state);
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return;
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}
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struct pipe_resource *res = &tex->buffer.b.b;
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const struct util_format_description *desc;
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unsigned img_format;
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@ -4240,8 +4342,16 @@ static void si_make_texture_descriptor(struct si_screen *screen, struct si_textu
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const unsigned char state_swizzle[4], unsigned first_level,
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unsigned last_level, unsigned first_layer,
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unsigned last_layer, unsigned width, unsigned height,
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unsigned depth, uint32_t *state, uint32_t *fmask_state)
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unsigned depth, bool get_bo_metadata,
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uint32_t *state, uint32_t *fmask_state)
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{
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if (!screen->info.has_image_opcodes && !get_bo_metadata) {
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cdna_emu_make_image_descriptor(screen, tex, sampler, target, pipe_format, state_swizzle,
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first_level, last_level, first_layer, last_layer, width,
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height, depth, state, fmask_state);
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return;
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}
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struct pipe_resource *res = &tex->buffer.b.b;
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const struct util_format_description *desc;
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unsigned char swizzle[4];
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@ -4671,7 +4781,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
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sctx->screen, tex, true, state->target, pipe_format, state_swizzle,
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state->u.tex.first_level, state->u.tex.last_level,
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state->u.tex.first_layer, last_layer, texture->width0, texture->height0, texture->depth0,
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view->state, view->fmask_state);
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false, view->state, view->fmask_state);
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view->base_level_info = &surflevel[0];
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view->block_width = util_format_get_blockwidth(pipe_format);
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@ -5514,11 +5624,10 @@ void si_init_screen_state_functions(struct si_screen *sscreen)
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sscreen->b.create_vertex_state = si_pipe_create_vertex_state;
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sscreen->b.vertex_state_destroy = si_pipe_vertex_state_destroy;
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if (sscreen->info.gfx_level >= GFX10) {
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if (sscreen->info.gfx_level >= GFX10)
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sscreen->make_texture_descriptor = gfx10_make_texture_descriptor;
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} else {
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else
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sscreen->make_texture_descriptor = si_make_texture_descriptor;
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}
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util_vertex_state_cache_init(&sscreen->vertex_state_cache,
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si_create_vertex_state, si_vertex_state_destroy);
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@ -549,7 +549,7 @@ static void si_set_tex_bo_metadata(struct si_screen *sscreen, struct si_texture
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sscreen->make_texture_descriptor(sscreen, tex, true, res->target, res->format, swizzle, 0,
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res->last_level, 0, is_array ? res->array_size - 1 : 0,
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res->width0, res->height0, res->depth0, desc, NULL);
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res->width0, res->height0, res->depth0, true, desc, NULL);
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si_set_mutable_tex_desc_fields(sscreen, tex, &tex->surface.u.legacy.level[0], 0, 0,
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tex->surface.blk_w, false, 0, desc);
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