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pvr: Change CDM to compute, TA to geometry and 3D to fragment.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com> Reviewed-by: Frank Binns <frank.binns@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19371>
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1 changed files with 8 additions and 7 deletions
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@ -1163,9 +1163,9 @@ pvr_compute_flat_slot_size(const struct pvr_physical_device *pdevice,
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* number of coefficients allow us to have.
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*/
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if (coeff_regs_count > 0U) {
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/* If TA or 3D can overlap with CDM, or if the TA is running a geometry
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* shader then we need to consider this in calculating max allowed
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* work-groups.
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/* If the geometry or fragment jobs can overlap with the compute job, or
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* if there is a vertex shader already running then we need to consider
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* this in calculating max allowed work-groups.
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*/
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if (PVR_HAS_QUIRK(dev_info, 52354) &&
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(PVR_HAS_FEATURE(dev_info, compute_overlap) ||
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@ -6115,12 +6115,13 @@ void pvr_CmdPipelineBarrier2(VkCommandBuffer commandBuffer,
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}
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/* Multiple dispatches can be merged into a single job. When back to
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* back dispatches have a sequential dependency (CDM -> CDM pipeline
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* barrier) we need to do the following.
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* back dispatches have a sequential dependency (Compute -> compute
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* pipeline barrier) we need to do the following.
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* - Dispatch a kernel which fences all previous memory writes and
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* flushes the MADD cache.
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* - Issue a CDM fence which ensures all previous tasks emitted by
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* the CDM are completed before starting anything new.
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* - Issue a compute fence which ensures all previous tasks emitted
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* by the compute data master are completed before starting
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* anything new.
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*/
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/* Issue Data Fence, Wait for Data Fence (IDFWDF) makes the PDS wait
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