From fc16ba8553e239acf68c6ea5f9729c4f02b2ffc4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Fonseca?=
Date: Mon, 22 Dec 2008 20:20:58 +0000
Subject: [PATCH 001/199] softpipe: Call surface_alloc_storage to get the
pipebuffer for display targets.
Otherwise blitting from display target surfaces to front screen fails in
several platforms.
---
src/gallium/drivers/softpipe/sp_texture.c | 47 ++++++++++++++++-------
1 file changed, 33 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c
index 0cb4b2f03c3..fbe73e69152 100644
--- a/src/gallium/drivers/softpipe/sp_texture.c
+++ b/src/gallium/drivers/softpipe/sp_texture.c
@@ -94,31 +94,50 @@ softpipe_texture_layout(struct pipe_screen *screen,
return spt->buffer != NULL;
}
+/* Hack it up to use the old winsys->surface_alloc_storage()
+ * method for now:
+ */
static boolean
softpipe_displaytarget_layout(struct pipe_screen *screen,
struct softpipe_texture * spt)
{
struct pipe_winsys *ws = screen->winsys;
- size_t tex_size;
- unsigned cpp;
+ struct pipe_surface surf;
+ unsigned flags = (PIPE_BUFFER_USAGE_CPU_READ |
+ PIPE_BUFFER_USAGE_CPU_WRITE |
+ PIPE_BUFFER_USAGE_GPU_READ |
+ PIPE_BUFFER_USAGE_GPU_WRITE);
+ int ret;
- switch (spt->base.format) {
- case PIPE_FORMAT_R5G6B5_UNORM:
- cpp = 2;
- break;
- case PIPE_FORMAT_Z24S8_UNORM:
- case PIPE_FORMAT_A8R8G8B8_UNORM:
- default:
- cpp = 4;
- break;
+
+ memset(&surf, 0, sizeof(surf));
+
+ ret =ws->surface_alloc_storage( ws,
+ &surf,
+ spt->base.width[0],
+ spt->base.height[0],
+ spt->base.format,
+ flags,
+ spt->base.tex_usage);
+ if(ret != 0)
+ return FALSE;
+
+ if (!surf.buffer) {
+ /* allocation failed */
+ return FALSE;
}
- tex_size = spt->base.width[0] * cpp * spt->base.height[0];
- spt->buffer = ws->buffer_create(ws, 64, PIPE_BUFFER_USAGE_PIXEL, tex_size);
+
/* Now extract the goodies:
*/
spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width[0]);
spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height[0]);
- spt->stride[0] = spt->base.width[0] * cpp;
+ spt->stride[0] = surf.stride;
+
+ /* Transfer the reference:
+ */
+ spt->buffer = surf.buffer;
+ surf.buffer = NULL;
+
return spt->buffer != NULL;
}
From 417a78bdad11976f89e7bb12e3de0138995a2b1f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Fonseca?=
Date: Mon, 22 Dec 2008 20:23:59 +0000
Subject: [PATCH 002/199] softpipe: Don't fill surfaces's winsys fields.
This is sometimes checked to distinguish between texture views and
(deprecated) standalone surfaces.
---
src/gallium/drivers/softpipe/sp_texture.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c
index fbe73e69152..a64dc89f432 100644
--- a/src/gallium/drivers/softpipe/sp_texture.c
+++ b/src/gallium/drivers/softpipe/sp_texture.c
@@ -239,10 +239,8 @@ softpipe_get_tex_surface(struct pipe_screen *screen,
ps = CALLOC_STRUCT(pipe_surface);
ps->refcount = 1;
- ps->winsys = ws;
if (ps) {
assert(ps->refcount);
- assert(ps->winsys);
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(screen, &ps->buffer, spt->buffer);
ps->format = pt->format;
From b8e68f2e55ed22a97b7f976fe9556b2abcc49ea9 Mon Sep 17 00:00:00 2001
From: Michal Krol
Date: Fri, 14 Nov 2008 13:26:01 +0100
Subject: [PATCH 003/199] tgsi: Keep address register as a floating point.
---
src/gallium/auxiliary/tgsi/tgsi_exec.c | 29 ++++++++------------------
1 file changed, 9 insertions(+), 20 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 65a0f39fdb4..0756d7db176 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -466,17 +466,6 @@ micro_exp2(
#endif
}
-static void
-micro_f2it(
- union tgsi_exec_channel *dst,
- const union tgsi_exec_channel *src )
-{
- dst->i[0] = (int) src->f[0];
- dst->i[1] = (int) src->f[1];
- dst->i[2] = (int) src->f[2];
- dst->i[3] = (int) src->f[3];
-}
-
static void
micro_f2ut(
union tgsi_exec_channel *dst,
@@ -1075,10 +1064,10 @@ fetch_source(
&indir_index );
/* add value of address register to the offset */
- index.i[0] += indir_index.i[0];
- index.i[1] += indir_index.i[1];
- index.i[2] += indir_index.i[2];
- index.i[3] += indir_index.i[3];
+ index.i[0] += (int) indir_index.f[0];
+ index.i[1] += (int) indir_index.f[1];
+ index.i[2] += (int) indir_index.f[2];
+ index.i[3] += (int) indir_index.f[3];
/* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value.
@@ -1131,10 +1120,10 @@ fetch_source(
&index2,
&indir_index );
- index.i[0] += indir_index.i[0];
- index.i[1] += indir_index.i[1];
- index.i[2] += indir_index.i[2];
- index.i[3] += indir_index.i[3];
+ index.i[0] += (int) indir_index.f[0];
+ index.i[1] += (int) indir_index.f[1];
+ index.i[2] += (int) indir_index.f[2];
+ index.i[3] += (int) indir_index.f[3];
/* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value.
@@ -1754,7 +1743,7 @@ exec_instruction(
case TGSI_OPCODE_ARL:
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
FETCH( &r[0], 0, chan_index );
- micro_f2it( &r[0], &r[0] );
+ micro_trunc( &r[0], &r[0] );
STORE( &r[0], 0, chan_index );
}
break;
From 4b3c74b4d6786475bc45f883612e76069e722cbd Mon Sep 17 00:00:00 2001
From: Michal Krol
Date: Fri, 14 Nov 2008 13:31:06 +0100
Subject: [PATCH 004/199] tgsi: Return 0.0 for negative constant register
indices.
---
src/gallium/auxiliary/tgsi/tgsi_exec.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 0756d7db176..d55c3372077 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -958,14 +958,22 @@ fetch_src_file_channel(
switch( file ) {
case TGSI_FILE_CONSTANT:
assert(mach->Consts);
- assert(index->i[0] >= 0);
- assert(index->i[1] >= 0);
- assert(index->i[2] >= 0);
- assert(index->i[3] >= 0);
- chan->f[0] = mach->Consts[index->i[0]][swizzle];
- chan->f[1] = mach->Consts[index->i[1]][swizzle];
- chan->f[2] = mach->Consts[index->i[2]][swizzle];
- chan->f[3] = mach->Consts[index->i[3]][swizzle];
+ if (index->i[0] < 0)
+ chan->f[0] = 0.0f;
+ else
+ chan->f[0] = mach->Consts[index->i[0]][swizzle];
+ if (index->i[1] < 0)
+ chan->f[1] = 0.0f;
+ else
+ chan->f[1] = mach->Consts[index->i[1]][swizzle];
+ if (index->i[2] < 0)
+ chan->f[2] = 0.0f;
+ else
+ chan->f[2] = mach->Consts[index->i[2]][swizzle];
+ if (index->i[3] < 0)
+ chan->f[3] = 0.0f;
+ else
+ chan->f[3] = mach->Consts[index->i[3]][swizzle];
break;
case TGSI_FILE_INPUT:
From ed7ba03256fc4503d5d7483d032014ac9e8242fe Mon Sep 17 00:00:00 2001
From: Michal Krol
Date: Tue, 23 Dec 2008 15:13:59 +0100
Subject: [PATCH 005/199] tgsi: Dump indirect register swizzle.
---
src/gallium/auxiliary/tgsi/tgsi_dump.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c
index 3177f549523..485e96379c0 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c
@@ -180,14 +180,16 @@ _dump_register_ind(
uint file,
int index,
uint ind_file,
- int ind_index )
+ int ind_index,
+ uint ind_swizzle )
{
ENM( file, file_names );
CHR( '[' );
ENM( ind_file, file_names );
CHR( '[' );
SID( ind_index );
- CHR( ']' );
+ TXT( "]." );
+ ENM( ind_swizzle, swizzle_names );
if (index != 0) {
if (index > 0)
CHR( '+' );
@@ -377,7 +379,8 @@ iter_instruction(
src->SrcRegister.File,
src->SrcRegister.Index,
src->SrcRegisterInd.File,
- src->SrcRegisterInd.Index );
+ src->SrcRegisterInd.Index,
+ src->SrcRegisterInd.SwizzleX );
}
else {
_dump_register(
From f5d4274b4a8effc70c238060c3728aea629663df Mon Sep 17 00:00:00 2001
From: Keith Whitwell
Date: Tue, 23 Dec 2008 13:26:25 +0000
Subject: [PATCH 006/199] draw: allow driver-override of draw_need_pipeline()
---
.../auxiliary/draw/draw_pipe_validate.c | 21 +++++++++++++++----
src/gallium/auxiliary/draw/draw_vbuf.h | 11 ++++++++++
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_pipe_validate.c b/src/gallium/auxiliary/draw/draw_pipe_validate.c
index f34c68728ef..03e842ce082 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_validate.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_validate.c
@@ -33,6 +33,7 @@
#include "draw_private.h"
#include "draw_pipe.h"
#include "draw_context.h"
+#include "draw_vbuf.h"
static boolean points( unsigned prim )
{
@@ -52,16 +53,28 @@ static boolean triangles( unsigned prim )
}
/**
- * Check if we need any special pipeline stages, or whether
- * prims/verts can go through untouched. Don't test for bypass
- * clipping or vs modes, this function is just about the primitive
- * pipeline stages.
+ * Default version of a function to check if we need any special
+ * pipeline stages, or whether prims/verts can go through untouched.
+ * Don't test for bypass clipping or vs modes, this function is just
+ * about the primitive pipeline stages.
+ *
+ * This can be overridden by the driver.
*/
boolean
draw_need_pipeline(const struct draw_context *draw,
const struct pipe_rasterizer_state *rasterizer,
unsigned int prim )
{
+ /* If the driver has overridden this, use that version:
+ */
+ if (draw->render &&
+ draw->render->need_pipeline)
+ {
+ return draw->render->need_pipeline( draw->render,
+ rasterizer,
+ prim );
+ }
+
/* Don't have to worry about triangles turning into lines/points
* and triggering the pipeline, because we have to trigger the
* pipeline *anyway* if unfilled mode is active.
diff --git a/src/gallium/auxiliary/draw/draw_vbuf.h b/src/gallium/auxiliary/draw/draw_vbuf.h
index b0aa2df3099..9ac068c47b8 100644
--- a/src/gallium/auxiliary/draw/draw_vbuf.h
+++ b/src/gallium/auxiliary/draw/draw_vbuf.h
@@ -54,6 +54,17 @@ struct vbuf_render {
unsigned max_indices;
unsigned max_vertex_buffer_bytes;
+ /**
+ * Query if the hardware driver needs assistance for a particular
+ * combination of rasterizer state and primitive.
+ *
+ * Currently optional.
+ */
+ boolean (*need_pipeline)(const struct vbuf_render *render,
+ const struct pipe_rasterizer_state *rasterizer,
+ unsigned int prim );
+
+
/**
* Get the hardware vertex format.
*
From fc4cea08fe8320438c72de7f4af2d7091681dca3 Mon Sep 17 00:00:00 2001
From: Keith Whitwell
Date: Tue, 23 Dec 2008 18:16:49 +0000
Subject: [PATCH 007/199] tgsi: fix incomplete rename of loop counter variable
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index cfc7ea8e898..1239f6c0765 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -124,7 +124,7 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
/* only first 32 regs will appear in this bitfield */
info->file_mask[file] |= (1 << reg);
info->file_count[file]++;
- info->file_max[file] = MAX2(info->file_max[file], (int)i);
+ info->file_max[file] = MAX2(info->file_max[file], (int)reg);
if (file == TGSI_FILE_INPUT) {
info->input_semantic_name[reg] = (ubyte)fulldecl->Semantic.SemanticName;
From b359350017a8f0328912f19d233bcdcc256aded1 Mon Sep 17 00:00:00 2001
From: Dave Airlie
Date: Fri, 19 Dec 2008 17:38:23 -0800
Subject: [PATCH 008/199] Remove third buffer support from Mesa.
This is part of the deprecated pageflipping infrastructure.
---
src/mesa/drivers/dri/intel/intel_buffers.c | 2 +-
src/mesa/drivers/dri/intel/intel_context.c | 10 ++--------
src/mesa/drivers/dri/intel/intel_context.h | 1 -
src/mesa/drivers/dri/intel/intel_regions.c | 9 ---------
src/mesa/drivers/dri/intel/intel_screen.c | 15 ---------------
src/mesa/drivers/dri/intel/intel_screen.h | 1 -
6 files changed, 3 insertions(+), 35 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index f8f009c6a30..4d036dee42e 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -181,7 +181,7 @@ intelUpdatePageFlipping(struct intel_context *intel,
intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
(intel_fb->pf_planes & 0x2)) & 0x3;
- intel_fb->pf_num_pages = intel->intelScreen->third.handle ? 3 : 2;
+ intel_fb->pf_num_pages = 2;
pf_active = pf_planes && (pf_planes & intel->sarea->pf_active) == pf_planes;
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 6c625b428c0..6ff98e9c525 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -775,7 +775,6 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv)
intel_region_release(&intel->front_region);
intel_region_release(&intel->back_region);
- intel_region_release(&intel->third_region);
intel_region_release(&intel->depth_region);
driDestroyOptionCache(&intel->optionCache);
@@ -825,12 +824,7 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
intel_renderbuffer_set_region(intel_fb->color_rb[1],
intel->back_region);
}
-#if 0
- if (intel_fb->color_rb[2]) {
- intel_renderbuffer_set_region(intel_fb->color_rb[2],
- intel->third_region);
- }
-#endif
+
if (irbDepth) {
intel_renderbuffer_set_region(irbDepth, intel->depth_region);
}
@@ -867,7 +861,7 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
driDrawableInitVBlank(driDrawPriv);
intel_fb->vbl_waited = driDrawPriv->vblSeq;
- for (i = 0; i < (intel->intelScreen->third.handle ? 3 : 2); i++) {
+ for (i = 0; i < 2; i++) {
if (intel_fb->color_rb[i])
intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
}
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index ee43ed7e833..ac08117bb4c 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -166,7 +166,6 @@ struct intel_context
struct intel_region *front_region;
struct intel_region *back_region;
- struct intel_region *third_region;
struct intel_region *depth_region;
/**
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 8dbcc3050ee..51ce32a9679 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -550,15 +550,6 @@ intel_recreate_static_regions(struct intel_context *intel)
intel->back_region,
&intelScreen->back);
-#ifdef I915
- if (intelScreen->third.handle) {
- intel->third_region =
- intel_recreate_static(intel, "third",
- intel->third_region,
- &intelScreen->third);
- }
-#endif /* I915 */
-
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 61b55b97b51..fc4e82b56c9 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -177,13 +177,6 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
intelScreen->back.size = sarea->back_size;
intelScreen->back.tiled = sarea->back_tiled;
- if (intelScreen->driScrnPriv->ddx_version.minor >= 8) {
- intelScreen->third.offset = sarea->third_offset;
- intelScreen->third.handle = sarea->third_handle;
- intelScreen->third.size = sarea->third_size;
- intelScreen->third.tiled = sarea->third_tiled;
- }
-
intelScreen->depth.offset = sarea->depth_offset;
intelScreen->depth.handle = sarea->depth_handle;
intelScreen->depth.size = sarea->depth_size;
@@ -192,12 +185,10 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
if (intelScreen->driScrnPriv->ddx_version.minor >= 9) {
intelScreen->front.bo_handle = sarea->front_bo_handle;
intelScreen->back.bo_handle = sarea->back_bo_handle;
- intelScreen->third.bo_handle = sarea->third_bo_handle;
intelScreen->depth.bo_handle = sarea->depth_bo_handle;
} else {
intelScreen->front.bo_handle = -1;
intelScreen->back.bo_handle = -1;
- intelScreen->third.bo_handle = -1;
intelScreen->depth.bo_handle = -1;
}
@@ -353,12 +344,6 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv,
_mesa_add_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT,
&intel_fb->color_rb[1]->Base);
- if (screen->third.handle) {
- struct gl_renderbuffer *tmp_rb = NULL;
-
- intel_fb->color_rb[2] = intel_create_renderbuffer(rgbFormat);
- _mesa_reference_renderbuffer(&tmp_rb, &intel_fb->color_rb[2]->Base);
- }
}
if (mesaVis->depthBits == 24) {
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 91f0d6d1ae8..cf5359baaeb 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -56,7 +56,6 @@ typedef struct
{
intelRegion front;
intelRegion back;
- intelRegion third;
intelRegion depth;
intelRegion tex;
From 15b2e0d13873fb3b55af414285d74f4489dd2e13 Mon Sep 17 00:00:00 2001
From: Eric Anholt
Date: Tue, 23 Dec 2008 14:45:37 -0800
Subject: [PATCH 009/199] intel: Fix glBitmap clipping for DRI1.
---
src/mesa/drivers/dri/intel/intel_pixel_bitmap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index fb1a051cdc8..5e0e0d29ca5 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -244,8 +244,8 @@ do_blit_bitmap( GLcontext *ctx,
/* Clip to drawable cliprect */
if (!_mesa_clip_to_region(cliprects[i].x1,
cliprects[i].y1,
- cliprects[i].x2 - cliprects[i].x1,
- cliprects[i].y2 - cliprects[i].y1,
+ cliprects[i].x2,
+ cliprects[i].y2,
&box_x, &box_y, &box_w, &box_h))
continue;
From 129b6bc4e33257dd27aa9b50c6fa934ccb14376e Mon Sep 17 00:00:00 2001
From: "Xiang, Haihao"
Date: Wed, 24 Dec 2008 09:26:46 +0800
Subject: [PATCH 010/199] i915: separate the fog term from the specular color
term.
Previously fog parameter and specular color are packed into the
same dword. Note specular color should be packed in BGRA for device,
so if fog parameter and specular color all are present, fog parameter
will dirty the alpha term of specular color. This fixes rendering
issue when playing 'Yo Frankie' on 915/945.
---
src/mesa/drivers/dri/i915/i915_fragprog.c | 22 +++-------------------
1 file changed, 3 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 8bd761ec6a1..4760906a7ed 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -1105,30 +1105,14 @@ i915ValidateFragmentProgram(struct i915_context *i915)
EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4);
}
- if ((inputsRead & (FRAG_BIT_COL1 | FRAG_BIT_FOGC)) ||
- i915->vertex_fog != I915_FOG_NONE) {
-
- if (inputsRead & FRAG_BIT_COL1) {
- intel->specoffset = offset / 4;
- EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3);
- }
- else
- EMIT_PAD(3);
-
- if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE)
- EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1);
- else
- EMIT_PAD(1);
+ if (inputsRead & FRAG_BIT_COL1) {
+ intel->specoffset = offset / 4;
+ EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_4UB_4F_BGRA, S4_VFMT_SPEC_FOG, 4);
}
- /* XXX this was disabled, but enabling this code helped fix the Glean
- * tfragprog1 fog tests.
- */
-#if 1
if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) {
EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1F, S4_VFMT_FOG_PARAM, 4);
}
-#endif
for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
if (inputsRead & FRAG_BIT_TEX(i)) {
From 49c40b10c72e64977971ccb96abfc8767ed4c6ea Mon Sep 17 00:00:00 2001
From: Brian Paul
Date: Fri, 7 Nov 2008 13:02:43 -0700
Subject: [PATCH 011/199] gallium: implement TGSI_OPCODE_DP2A, add sqrt to
NRM3/NRM4
---
src/gallium/auxiliary/tgsi/tgsi_exec.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index d55c3372077..f98b66dc0b4 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -2041,7 +2041,21 @@ exec_instruction(
case TGSI_OPCODE_DOT2ADD:
/* TGSI_OPCODE_DP2A */
- assert (0);
+ FETCH( &r[0], 0, CHAN_X );
+ FETCH( &r[1], 1, CHAN_X );
+ micro_mul( &r[0], &r[0], &r[1] );
+
+ FETCH( &r[1], 0, CHAN_Y );
+ FETCH( &r[2], 1, CHAN_Y );
+ micro_mul( &r[1], &r[1], &r[2] );
+ micro_add( &r[0], &r[0], &r[1] );
+
+ FETCH( &r[2], 2, CHAN_X );
+ micro_add( &r[0], &r[0], &r[2] );
+
+ FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
+ STORE( &r[0], 0, chan_index );
+ }
break;
case TGSI_OPCODE_INDEX:
@@ -2488,7 +2502,8 @@ exec_instruction(
micro_mul( &dot, &r[2], &r[2] );
micro_add( &tmp, &tmp, &dot );
- /* tmp = 1 / tmp */
+ /* tmp = 1 / sqrt(tmp) */
+ micro_sqrt( &tmp, &tmp );
micro_div( &tmp, &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &tmp );
/* note: w channel is undefined */
@@ -2521,7 +2536,8 @@ exec_instruction(
micro_mul( &dot, &r[3], &r[3] );
micro_add( &tmp, &tmp, &dot );
- /* tmp = 1 / tmp */
+ /* tmp = 1 / sqrt(tmp) */
+ micro_sqrt( &tmp, &tmp );
micro_div( &tmp, &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &tmp );
FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
From 0d1f90c75e39191f1824b382dfb8d709a3e70d01 Mon Sep 17 00:00:00 2001
From: Dave Airlie
Date: Sun, 28 Dec 2008 16:48:36 +1000
Subject: [PATCH 012/199] r300: remove the unknowns from the indx_buffer code
---
src/mesa/drivers/dri/r300/r300_reg.h | 8 ++++----
src/mesa/drivers/dri/r300/r300_render.c | 3 ++-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index 778db96cc1f..7c6485ef60b 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -64,7 +64,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R300_SE_VPORT_ZSCALE 0x1DA8
#define R300_SE_VPORT_ZOFFSET 0x1DAC
-
+#define R300_VAP_PORT_IDX0 0x2040
/*
* Vertex Array Processing (VAP) Control
*/
@@ -3201,9 +3201,9 @@ enum {
#define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00
#define R300_PACKET3_INDX_BUFFER 0x00003300
-# define R300_EB_UNK1_SHIFT 24
-# define R300_EB_UNK1 (0x80<<24)
-# define R300_EB_UNK2 0x0810
+# define R300_INDX_BUFFER_DST_SHIFT 0
+# define R300_INDX_BUFFER_SKIP_SHIFT 16
+# define R300_INDX_BUFFER_ONE_REG_WR (1<<31)
/* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */
#define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 292f87a2b1b..3a29b4d2880 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -208,7 +208,8 @@ static void r300FireEB(r300ContextPtr rmesa, unsigned long addr,
e32(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (vertex_count << 16) | type | R300_VAP_VF_CNTL__INDEX_SIZE_32bit);
start_packet3(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2), 2);
- e32(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2);
+ e32(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
+ (R300_VAP_PORT_IDX0 >> 2))
e32(addr);
e32(vertex_count);
}
From 0674a238547f9f4f9de9c6cf5d72015e5960aa9e Mon Sep 17 00:00:00 2001
From: "Xiang, Haihao"
Date: Mon, 29 Dec 2008 09:30:41 +0800
Subject: [PATCH 013/199] intel: enable ATI_texture_env_combine3. Fixes #17707
---
src/mesa/drivers/dri/intel/intel_context.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 6ff98e9c525..83661dfef9b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -388,6 +388,7 @@ static const struct dri_extension card_extensions[] = {
{ "GL_NV_vertex_program", GL_NV_vertex_program_functions },
{ "GL_NV_vertex_program1_1", NULL },
{ "GL_SGIS_generate_mipmap", NULL },
+ { "GL_ATI_texture_env_combine3", NULL },
{ NULL, NULL }
};
From c40cd2ccdd8ce7f749d03e66bcca297c2366c1f9 Mon Sep 17 00:00:00 2001
From: Alex Deucher
Date: Mon, 29 Dec 2008 12:28:12 -0500
Subject: [PATCH 014/199] R300: missing semicolon
---
src/mesa/drivers/dri/r300/r300_render.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 3a29b4d2880..f9266e44c13 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -209,7 +209,7 @@ static void r300FireEB(r300ContextPtr rmesa, unsigned long addr,
start_packet3(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2), 2);
e32(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
- (R300_VAP_PORT_IDX0 >> 2))
+ (R300_VAP_PORT_IDX0 >> 2));
e32(addr);
e32(vertex_count);
}
From 6c01500228014a6cfa133b5dbba8c6d024833e84 Mon Sep 17 00:00:00 2001
From: Eric Anholt
Date: Tue, 23 Dec 2008 16:08:40 -0800
Subject: [PATCH 015/199] dri: Fix driWaitForMSC32 when divisor >= 2 and msc <
0.
We'd come up with a negative remainder, while we were looking for the positive
version of it in the loop conditional. And, since the "did we hit our target"
break was disabled for the target_msc == 0 ("Just make the divisor/remainder
work") path, we'd never exit.
Simplify the code by just using int64_t all over instead of trying to do it
in a u32 space.
---
src/mesa/drivers/dri/common/vblank.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/common/vblank.c b/src/mesa/drivers/dri/common/vblank.c
index d610253fe6f..12aeaa108f7 100644
--- a/src/mesa/drivers/dri/common/vblank.c
+++ b/src/mesa/drivers/dri/common/vblank.c
@@ -130,9 +130,8 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
if ( divisor != 0 ) {
- unsigned int target = (unsigned int)target_msc;
- unsigned int next = target;
- unsigned int r;
+ int64_t next = target_msc;
+ int64_t r;
int dont_wait = (target_msc == 0);
do {
@@ -154,9 +153,9 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
*msc = vblank_to_msc(priv, vbl.reply.sequence);
- dont_wait = 0;
- if (target_msc != 0 && *msc == target)
+ if (!dont_wait && *msc == next)
break;
+ dont_wait = 0;
/* Assuming the wait-done test fails, the next refresh to wait for
* will be one that satisfies (MSC % divisor) == remainder. The
@@ -165,11 +164,12 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
* If this refresh has already happened, we add divisor to obtain
* the next refresh after the current one that will satisfy it.
*/
- r = (*msc % (unsigned int)divisor);
- next = (*msc - r + (unsigned int)remainder);
- if (next <= *msc) next += (unsigned int)divisor;
+ r = ((uint64_t)*msc % divisor);
+ next = (*msc - r + remainder);
+ if (next <= *msc)
+ next += divisor;
- } while ( r != (unsigned int)remainder );
+ } while (r != remainder);
}
else {
/* If the \c divisor is zero, just wait until the MSC is greater
From 0c4346e63258bcaaae6f3045bc44d0e24073dd0e Mon Sep 17 00:00:00 2001
From: "Xiang, Haihao"
Date: Tue, 30 Dec 2008 11:25:45 +0800
Subject: [PATCH 016/199] intel: disable ATI_texture_env_combine3 for i830( and
related device).
Thanks to Eric for pointing it out.
---
src/mesa/drivers/dri/i915/i915_context.c | 1 +
src/mesa/drivers/dri/intel/intel_context.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index e0ddc7fd613..9bff74294d8 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -55,6 +55,7 @@ static const struct dri_extension i915_extensions[] = {
{"GL_ARB_fragment_program", NULL},
{"GL_ARB_shadow", NULL},
{"GL_ARB_texture_non_power_of_two", NULL},
+ {"GL_ATI_texture_env_combine3", NULL},
{"GL_EXT_shadow_funcs", NULL},
{NULL, NULL}
};
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 83661dfef9b..44b276a123e 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -388,7 +388,6 @@ static const struct dri_extension card_extensions[] = {
{ "GL_NV_vertex_program", GL_NV_vertex_program_functions },
{ "GL_NV_vertex_program1_1", NULL },
{ "GL_SGIS_generate_mipmap", NULL },
- { "GL_ATI_texture_env_combine3", NULL },
{ NULL, NULL }
};
@@ -413,6 +412,7 @@ static const struct dri_extension brw_extensions[] = {
{ "GL_EXT_shadow_funcs", NULL },
{ "GL_EXT_texture_sRGB", NULL },
{ "GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions },
+ { "GL_ATI_texture_env_combine3", NULL },
{ NULL, NULL }
};
From c9122072fc5377ee6a174d2b0bde7345d08aeedd Mon Sep 17 00:00:00 2001
From: Brian Paul
Date: Thu, 18 Dec 2008 16:08:42 -0700
Subject: [PATCH 017/199] demos: minor fixes to twoside.c glsl demo
---
progs/glsl/twoside.c | 44 ++++++++++++++++++++++++++++----------------
1 file changed, 28 insertions(+), 16 deletions(-)
diff --git a/progs/glsl/twoside.c b/progs/glsl/twoside.c
index 672a00491e6..06488bd1759 100644
--- a/progs/glsl/twoside.c
+++ b/progs/glsl/twoside.c
@@ -26,27 +26,39 @@ static GLuint fragShader;
static GLuint vertShader;
static GLuint program;
static GLint win = 0;
-static GLboolean anim = 0*GL_TRUE;
-static GLboolean DetermineInFragProg = GL_TRUE;
-static GLfloat Xrot = 30.0f;
+static GLboolean anim;
+static GLboolean DetermineFacingInFragProg;
+static GLfloat Xrot;
static GLint u_fragface;
-static GLenum FrontWinding = GL_CCW;
+static GLenum FrontWinding;
static int prevTime = 0;
-static const GLfloat Red[4] = {1, 0, 0, 0};
+static const GLfloat Red[4] = {1, 0, 0, 1};
static const GLfloat Green[4] = {0, 1, 0, 0};
+static void
+SetDefaults(void)
+{
+ DetermineFacingInFragProg = GL_TRUE;
+ FrontWinding = GL_CCW;
+ Xrot = 30;
+ anim = 0;
+ glutIdleFunc(NULL);
+}
+
+
static void
Redisplay(void)
{
+ const int sections = 20;
int i;
float radius = 2;
glFrontFace(FrontWinding);
- if (DetermineInFragProg) {
+ if (DetermineFacingInFragProg) {
glUniform1i_func(u_fragface, 1);
glDisable(GL_VERTEX_PROGRAM_TWO_SIDE);
}
@@ -64,8 +76,8 @@ Redisplay(void)
glBegin(GL_TRIANGLE_STRIP);
glColor4fv(Red);
glSecondaryColor3fv_func(Green);
- for (i = 0; i < 20; i++) {
- float a = i / 19.0 * M_PI * 2.0;
+ for (i = 0; i <= sections; i++) {
+ float a = (float) i / (sections) * M_PI * 2.0;
float x = radius * cos(a);
float y = radius * sin(a);
glVertex3f(x, -1, y);
@@ -139,17 +151,15 @@ Key(unsigned char key, int x, int y)
break;
case 'f':
printf("Using frag shader gl_FrontFacing\n");
- DetermineInFragProg = GL_TRUE;
+ DetermineFacingInFragProg = GL_TRUE;
break;
case 'v':
printf("Using vert shader Two-sided lighting\n");
- DetermineInFragProg = GL_FALSE;
+ DetermineFacingInFragProg = GL_FALSE;
break;
case 'r':
/* reset */
- Xrot = 30;
- anim = 0;
- glutIdleFunc(NULL);
+ SetDefaults();
break;
case 's':
Xrot += 5;
@@ -182,14 +192,16 @@ Init(void)
static const char *fragShaderText =
"uniform bool fragface; \n"
"void main() { \n"
-#if 0
+#if 1
" if (!fragface || gl_FrontFacing) { \n"
" gl_FragColor = gl_Color; \n"
" } \n"
" else { \n"
+ " // note: dim green to help debug \n"
" gl_FragColor = 0.8 * gl_SecondaryColor; \n"
" } \n"
#else
+ /* DEBUG CODE */
" bool f = gl_FrontFacing; \n"
" if (f) { \n"
" gl_FragColor = vec4(1.0, 0.0, 0.0, 0.0); \n"
@@ -197,8 +209,6 @@ Init(void)
" else { \n"
" gl_FragColor = vec4(0.0, 1.0, 0.0, 0.0); \n"
" } \n"
- " //float g = float(gl_FrontFacing) * 0.5 + 0.5; \n"
- " //gl_FragColor = vec4(g); \n"
#endif
"} \n";
static const char *vertShaderText =
@@ -241,6 +251,8 @@ Init(void)
assert(glIsShader_func(vertShader));
glEnable(GL_DEPTH_TEST);
+
+ SetDefaults();
}
From 49a3fabed8a8b6993efb2616c56e362bf3518ac8 Mon Sep 17 00:00:00 2001
From: Brian Paul
Date: Tue, 30 Dec 2008 07:57:16 -0700
Subject: [PATCH 018/199] mesa: updated compilation documentation
---
docs/contents.html | 4 +--
docs/install.html | 66 ++++++++++++++++++++++++++--------------------
2 files changed, 39 insertions(+), 31 deletions(-)
diff --git a/docs/contents.html b/docs/contents.html
index 257b13f68a7..b348d3d17f3 100644
--- a/docs/contents.html
+++ b/docs/contents.html
@@ -37,8 +37,8 @@ a:visited {
Download / Install
diff --git a/docs/install.html b/docs/install.html
index 16ef013688a..2d72506f67d 100644
--- a/docs/install.html
+++ b/docs/install.html
@@ -1,58 +1,72 @@
-Compilation and Installation
+Compiling and Installing
-Compilation and Installation
+Compiling and Installing
Unix / X11
+
Windows
-VMS
Other
-
+
-
-
+1.3 Building with traditional Makefiles
The traditional Mesa build system is based on a collection of pre-defined
system configurations.
-To see the list of configurations, type make alone.
-Then choose a configuration from the list and type make configname .
+To see the list of configurations, just type make.
+Then choose a configuration from the list and type make
+configname .
@@ -66,7 +80,7 @@ allow you to run OpenGL/GLX applications on any X server (regardless of
whether it supports the GLX X server extension).
You will not be able to use hardware 3D acceleration.
-To compile stand-alone Mesa type make in the top-level directory.
+To compile stand-alone Mesa type make in the top-level directory.
You'll see a list of supported system configurations.
Choose one from the list (such as linux-x86), and type:
@@ -109,6 +123,7 @@ Later, if you want to rebuild for a different configuration run
+