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intel/brw/xe2+: Adjust size_read() for DPAS

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v2: Remov "DG2" from a comment because it applies to DG2 and
Xe2. Suggested by Caio.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28834>
This commit is contained in:
Ian Romanick 2024-04-12 16:23:49 -07:00
parent b051602754
commit e368b8e01b
1 changed files with 18 additions and 6 deletions
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24
src/intel/compiler/brw_fs.cpp
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@ -936,25 +936,37 @@ fs_inst::size_read(int arg) const
}
break;
case BRW_OPCODE_DPAS:
case BRW_OPCODE_DPAS: {
/* This is a little bit sketchy. There's no way to get at devinfo from
* here, so the regular reg_unit() cannot be used. However, on
* reg_unit() == 1 platforms, DPAS exec_size must be 8, and on known
* reg_unit() == 2 platforms, DPAS exec_size must be 16. This is not a
* coincidence, so this isn't so bad.
*/
const unsigned reg_unit = this->exec_size / 8;
switch (arg) {
case 0:
if (src[0].type == BRW_TYPE_HF) {
return rcount * REG_SIZE / 2;
return rcount * reg_unit * REG_SIZE / 2;
} else {
return rcount * REG_SIZE;
return rcount * reg_unit * REG_SIZE;
}
case 1:
return sdepth * REG_SIZE;
return sdepth * reg_unit * REG_SIZE;
case 2:
/* This is simpler than the formula described in the Bspec, but it
* covers all of the cases that we support on DG2.
* covers all of the cases that we support. Each inner sdepth
* iteration of the DPAS consumes a single dword for int8, uint8, or
* float16 types. These are the one source types currently
* supportable through Vulkan. This is independent of reg_unit.
*/
return rcount * REG_SIZE;
return rcount * sdepth * 4;
default:
unreachable("Invalid source number.");
}
break;
}
default:
break;