From e35ff669b59ca2ee2ce19bdcdb90eafe1a0de67b Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Wed, 11 May 2022 15:11:27 +0800 Subject: [PATCH] ac/llvm: get back nir_intrinsic_load_tess_rel_patch_id_amd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit radeonsi will use it. This can be removed again after radeonsi support radv_nir_lower_abi like lower pass. Reviewed-by: Marek Olšák Acked-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Timur Kristóf Signed-off-by: Qiang Yu Part-of: --- src/amd/llvm/ac_nir_to_llvm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index e3d7a398b58..94972fd6bdf 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -4053,6 +4053,10 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins result = ac_build_gather_values(&ctx->ac, coord, 3); break; } + case nir_intrinsic_load_tess_rel_patch_id_amd: + assert(ctx->stage == MESA_SHADER_TESS_CTRL); + result = ac_unpack_param(&ctx->ac, ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids), 0, 8); + break; case nir_intrinsic_vote_all: { result = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0])); break;