radv: add radv_disable_hiz_his_gfx12 and enable for Mafia Definitive Edition

This is a workaround for random GPU hangs with HiZ/HiS on GFX12
because the correct fix is complex and it will take time to be
implemented properly.

Mafia Definitive Edition is the first known game affected by this.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13222
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35182>
(cherry picked from commit 2ebfa64be7)
This commit is contained in:
Samuel Pitoiset 2025-05-27 16:04:00 +02:00 committed by Eric Engestrom
parent a186710269
commit e35c5d643b
11 changed files with 31 additions and 15 deletions

View file

@ -3104,7 +3104,7 @@
"description": "radv: add radv_disable_hiz_his_gfx12 and enable for Mafia Definitive Edition",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

View file

@ -6928,7 +6928,6 @@ radv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBegi
if (resume_info) {
radv_CmdBeginRendering(commandBuffer, resume_info);
} else {
const struct radv_instance *instance = radv_physical_device_instance(pdev);
const VkCommandBufferInheritanceRenderingInfo *inheritance_info =
vk_get_command_buffer_inheritance_rendering_info(cmd_buffer->vk.level, pBeginInfo);
@ -6957,7 +6956,7 @@ radv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBegi
if (vk_format_has_stencil(render->ds_att.format))
render->ds_att_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT;
if (pdev->info.gfx_level >= GFX12 && render->ds_att.format && !(instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
if (pdev->info.gfx_level >= GFX12 && pdev->use_hiz && render->ds_att.format) {
/* For inherited rendering with secondary commands buffers, assume HiZ/HiS is enabled if
* there is a depth/stencil attachment. This is required to apply hardware workarounds
* on GFX12.

View file

@ -206,7 +206,6 @@ radv_get_sequence_size_graphics(const struct radv_indirect_command_layout *layou
{
const struct radv_device *device = container_of(layout->vk.base.device, struct radv_device, vk);
const struct radv_physical_device *pdev = radv_device_physical(device);
const struct radv_instance *instance = radv_physical_device_instance(pdev);
const VkGeneratedCommandsPipelineInfoEXT *pipeline_info =
vk_find_struct_const(pNext, GENERATED_COMMANDS_PIPELINE_INFO_EXT);
@ -288,7 +287,7 @@ radv_get_sequence_size_graphics(const struct radv_indirect_command_layout *layou
}
}
if (pdev->info.gfx_level == GFX12 && !(instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
if (pdev->info.gfx_level == GFX12 && pdev->use_hiz) {
/* HiZ/HiS hw workaround */
*cmd_size += 8 * 4;
}
@ -1141,9 +1140,8 @@ dgc_gfx12_emit_hiz_his_wa(struct dgc_cmdbuf *cs)
{
const struct radv_device *device = cs->dev;
const struct radv_physical_device *pdev = radv_device_physical(device);
const struct radv_instance *instance = radv_physical_device_instance(pdev);
if (pdev->info.gfx_level == GFX12 && !(instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
if (pdev->info.gfx_level == GFX12 && pdev->use_hiz) {
dgc_cs_begin(cs);
dgc_cs_emit_imm(PKT3(PKT3_RELEASE_MEM, 6, 0));
dgc_cs_emit_imm(S_490_EVENT_TYPE(V_028A90_BOTTOM_OF_PIPE_TS) | S_490_EVENT_INDEX(5));

View file

@ -1251,9 +1251,8 @@ radv_GetPhysicalDeviceImageFormatProperties2(VkPhysicalDevice physicalDevice,
image_compression_props->imageCompressionFixedRateFlags = VK_IMAGE_COMPRESSION_FIXED_RATE_NONE_EXT;
if (vk_format_is_depth_or_stencil(format)) {
image_compression_props->imageCompressionFlags = (instance->debug_flags & RADV_DEBUG_NO_HIZ)
? VK_IMAGE_COMPRESSION_DISABLED_EXT
: VK_IMAGE_COMPRESSION_DEFAULT_EXT;
image_compression_props->imageCompressionFlags =
pdev->use_hiz ? VK_IMAGE_COMPRESSION_DEFAULT_EXT : VK_IMAGE_COMPRESSION_DISABLED_EXT;
} else {
image_compression_props->imageCompressionFlags =
((instance->debug_flags & RADV_DEBUG_NO_DCC) || pdev->info.gfx_level < GFX8)

View file

@ -381,11 +381,12 @@ radv_use_htile_for_image(const struct radv_device *device, const struct radv_ima
const struct radv_instance *instance = radv_physical_device_instance(pdev);
const enum amd_gfx_level gfx_level = pdev->info.gfx_level;
if (!pdev->use_hiz)
return false;
const VkImageCompressionControlEXT *compression =
vk_find_struct_const(pCreateInfo->pNext, IMAGE_COMPRESSION_CONTROL_EXT);
if (instance->debug_flags & RADV_DEBUG_NO_HIZ ||
(compression && compression->flags == VK_IMAGE_COMPRESSION_DISABLED_EXT))
if (compression && compression->flags == VK_IMAGE_COMPRESSION_DISABLED_EXT)
return false;
/* HTILE compression is only useful for depth/stencil attachments. */

View file

@ -195,6 +195,7 @@ static const driOptionDescription radv_dri_options[] = {
DRI_CONF_RADV_EMULATE_RT(false)
DRI_CONF_RADV_ENABLE_FLOAT16_GFX8(false)
DRI_CONF_RADV_FORCE_64K_SPARSE_ALIGNMENT(false)
DRI_CONF_RADV_DISABLE_HIZ_HIS_GFX12(false)
DRI_CONF_SECTION_END
};
// clang-format on
@ -301,6 +302,8 @@ radv_init_dri_options(struct radv_instance *instance)
instance->drirc.expose_float16_gfx8 = driQueryOptionb(&instance->drirc.options, "radv_enable_float16_gfx8");
instance->drirc.force_64k_sparse_alignment = driQueryOptionb(&instance->drirc.options, "radv_force_64k_sparse_alignment");
instance->drirc.disable_hiz_his_gfx12 = driQueryOptionb(&instance->drirc.options, "radv_disable_hiz_his_gfx12");
}
static const struct vk_instance_extension_table radv_instance_extensions_supported = {

View file

@ -75,6 +75,7 @@ struct radv_instance {
bool emulate_rt;
bool expose_float16_gfx8;
bool force_64k_sparse_alignment;
bool disable_hiz_his_gfx12;
char *app_layer;
uint8_t override_graphics_shader_version;
uint8_t override_compute_shader_version;

View file

@ -109,8 +109,7 @@ radv_compute_queue_enabled(const struct radv_physical_device *pdev)
static bool
radv_vrs_attachment_enabled(const struct radv_physical_device *pdev)
{
const struct radv_instance *instance = radv_physical_device_instance(pdev);
return pdev->info.gfx_level >= GFX11 || !(instance->debug_flags & RADV_DEBUG_NO_HIZ);
return pdev->info.gfx_level >= GFX11 || pdev->use_hiz;
}
static bool
@ -2158,6 +2157,10 @@ radv_physical_device_try_create(struct radv_instance *instance, drmDevicePtr drm
pdev->use_fmask = pdev->info.gfx_level < GFX11 && !(instance->debug_flags & RADV_DEBUG_NO_FMASK);
pdev->use_hiz = !(instance->debug_flags & RADV_DEBUG_NO_HIZ);
if (pdev->info.gfx_level == GFX12 && instance->drirc.disable_hiz_his_gfx12)
pdev->use_hiz = false;
pdev->use_ngg = (pdev->info.gfx_level >= GFX10 && pdev->info.family != CHIP_NAVI14 &&
!(instance->debug_flags & RADV_DEBUG_NO_NGG)) ||
pdev->info.gfx_level >= GFX11;

View file

@ -99,6 +99,9 @@ struct radv_physical_device {
/* Whether to enable FMASK compression for MSAA textures (GFX6-GFX10.3) */
bool use_fmask;
/* Whether to enable HTILE compression for depth/stencil images. */
bool use_hiz;
/* Whether to enable NGG. */
bool use_ngg;

View file

@ -184,6 +184,10 @@ Application bugs worked around in this file:
<option name="radv_disable_dcc" value="true" />
</application>
<application name="Mafia Definitive Edition" application_name_match="mafiadefinitiveedition.exe">
<option name="radv_disable_hiz_his_gfx12" value="true" />
</application>
<!-- OpenGL Game workarounds (zink) -->
<application name="Black Geyser: Couriers of Darkness" executable="BlackGeyser.x86_64">
<option name="radv_zero_vram" value="true" />

View file

@ -840,6 +840,11 @@
#define DRI_CONF_RADV_FORCE_64K_SPARSE_ALIGNMENT(def) \
DRI_CONF_OPT_B(radv_force_64k_sparse_alignment, def, \
"Force the alignment of sparse buffers to 64KiB")
#define DRI_CONF_RADV_DISABLE_HIZ_HIS_GFX12(def) \
DRI_CONF_OPT_B(radv_disable_hiz_his_gfx12, def, \
"Disable HiZ/HiS on GFX12 (RDNA4) to workaround a hw bug that causes random GPU hangs")
/**
* \brief ANV specific configuration options
*/