mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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anv/blit2d: Add support for W-tiled destinations
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Chad Versace <chad.versace@intel.com>
This commit is contained in:
Jason Ekstrand
parent
0a6842c1bd
commit
e3312644cb
1 changed files with 322 additions and 44 deletions
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@ -514,6 +514,149 @@ anv_meta_blit2d_normal_dst(struct anv_cmd_buffer *cmd_buffer,
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}
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}
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static void
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anv_meta_blit2d_w_tiled_dst(struct anv_cmd_buffer *cmd_buffer,
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struct anv_meta_blit2d_surf *src,
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enum blit2d_src_type src_type,
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struct anv_meta_blit2d_surf *dst,
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unsigned num_rects,
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struct anv_meta_blit2d_rect *rects)
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{
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struct anv_device *device = cmd_buffer->device;
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for (unsigned r = 0; r < num_rects; ++r) {
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struct blit2d_src_temps src_temps;
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blit2d_bind_src(cmd_buffer, src, src_type, &rects[r], &src_temps);
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assert(dst->bs == 1);
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uint32_t offset;
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isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev,
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ISL_TILING_W, 1, dst->pitch,
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rects[r].dst_x, rects[r].dst_y,
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&offset,
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&rects[r].dst_x, &rects[r].dst_y);
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/* The original coordinates were in terms of an actual W-tiled offset
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* but we are binding this image as Y-tiled. We need to adjust our
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* rectangle accordingly.
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*/
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uint32_t xmin_Y, xmax_Y, ymin_Y, ymax_Y;
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xmin_Y = (rects[r].dst_x / 8) * 16;
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xmax_Y = DIV_ROUND_UP(rects[r].dst_x + rects[r].width, 8) * 16;
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ymin_Y = (rects[r].dst_y / 4) * 2;
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ymax_Y = DIV_ROUND_UP(rects[r].dst_y + rects[r].height, 4) * 2;
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struct anv_meta_blit2d_surf dst_Y = {
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.bo = dst->bo,
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.tiling = ISL_TILING_Y0,
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.base_offset = dst->base_offset,
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.bs = 1,
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.pitch = dst->pitch * 2,
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};
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struct blit2d_dst_temps dst_temps;
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blit2d_bind_dst(cmd_buffer, &dst_Y, offset, xmax_Y, ymax_Y, &dst_temps);
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struct blit_vb_header {
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struct anv_vue_header vue;
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int32_t tex_offset[2];
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uint32_t tex_pitch;
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uint32_t bounds[4];
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} *vb_header;
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struct blit_vb_data {
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float pos[2];
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} *vb_data;
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unsigned vb_size = sizeof(*vb_header) + 3 * sizeof(*vb_data);
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struct anv_state vb_state =
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anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16);
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vb_header = vb_state.map;
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*vb_header = (struct blit_vb_header) {
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.tex_offset = {
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rects[r].src_x - rects[r].dst_x,
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rects[r].src_y - rects[r].dst_y,
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},
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.tex_pitch = src->pitch,
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.bounds = {
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rects[r].dst_x,
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rects[r].dst_y,
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rects[r].dst_x + rects[r].width,
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rects[r].dst_y + rects[r].height,
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},
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};
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vb_data = (void *)(vb_header + 1);
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vb_data[0] = (struct blit_vb_data) {
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.pos = {
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xmax_Y,
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ymax_Y,
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},
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};
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vb_data[1] = (struct blit_vb_data) {
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.pos = {
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xmin_Y,
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ymax_Y,
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},
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};
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vb_data[2] = (struct blit_vb_data) {
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.pos = {
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xmin_Y,
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ymin_Y,
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},
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};
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anv_state_clflush(vb_state);
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struct anv_buffer vertex_buffer = {
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.device = device,
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.size = vb_size,
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.bo = &device->dynamic_state_block_pool.bo,
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.offset = vb_state.offset,
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};
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anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2,
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(VkBuffer[]) {
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anv_buffer_to_handle(&vertex_buffer),
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anv_buffer_to_handle(&vertex_buffer)
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},
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(VkDeviceSize[]) {
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0,
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(void *)vb_data - vb_state.map,
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});
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ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
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&(VkRenderPassBeginInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
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.renderPass = device->meta_state.blit2d.render_pass,
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.framebuffer = dst_temps.fb,
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.renderArea = {
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.offset = { xmin_Y, ymin_Y, },
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.extent = { xmax_Y - xmin_Y, ymax_Y - ymin_Y },
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},
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.clearValueCount = 0,
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.pClearValues = NULL,
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}, VK_SUBPASS_CONTENTS_INLINE);
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bind_pipeline(cmd_buffer, src_type, BLIT2D_DST_TYPE_W_TILE);
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ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
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ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
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/* At the point where we emit the draw call, all data from the
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* descriptor sets, etc. has been used. We are free to delete it.
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*/
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blit2d_unbind_src(cmd_buffer, src_type, &src_temps);
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blit2d_unbind_dst(cmd_buffer, &dst_temps);
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}
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}
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void
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anv_meta_blit2d(struct anv_cmd_buffer *cmd_buffer,
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struct anv_meta_blit2d_surf *src,
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@ -529,8 +672,8 @@ anv_meta_blit2d(struct anv_cmd_buffer *cmd_buffer,
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}
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if (dst->tiling == ISL_TILING_W) {
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assert(dst->bs == 1);
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anv_finishme("Blitting to w-tiled destinations not yet supported");
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anv_meta_blit2d_w_tiled_dst(cmd_buffer, src, src_type, dst,
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num_rects, rects);
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return;
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} else if (dst->bs % 3 == 0) {
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anv_finishme("Blitting to RGB destinations not yet supported");
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@ -688,6 +831,47 @@ build_nir_texel_fetch(struct nir_builder *b, struct anv_device *device,
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return &tex->dest.ssa;
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}
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static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 2,
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.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
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{
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.binding = 0,
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.stride = 0,
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.inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
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},
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{
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.binding = 1,
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.stride = 5 * sizeof(float),
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.inputRate = VK_VERTEX_INPUT_RATE_VERTEX
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},
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},
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.vertexAttributeDescriptionCount = 3,
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.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
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{
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/* VUE Header */
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.location = 0,
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.binding = 0,
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.format = VK_FORMAT_R32G32B32A32_UINT,
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.offset = 0
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},
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{
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/* Position */
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.location = 1,
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.binding = 1,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = 0
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},
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{
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/* Texture Coordinate */
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.location = 2,
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.binding = 1,
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.format = VK_FORMAT_R32G32B32_SFLOAT,
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.offset = 8
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},
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},
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};
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static nir_shader *
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build_nir_copy_fragment_shader(struct anv_device *device,
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texel_fetch_build_func txf_func)
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@ -718,6 +902,136 @@ build_nir_copy_fragment_shader(struct anv_device *device,
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return b.shader;
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}
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static const VkPipelineVertexInputStateCreateInfo w_tiled_vi_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 2,
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.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
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{
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.binding = 0,
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.stride = 0,
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.inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
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},
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{
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.binding = 1,
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.stride = 2 * sizeof(float),
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.inputRate = VK_VERTEX_INPUT_RATE_VERTEX
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},
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},
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.vertexAttributeDescriptionCount = 4,
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.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
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{
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/* VUE Header */
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.location = 0,
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.binding = 0,
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.format = VK_FORMAT_R32G32B32A32_UINT,
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.offset = 0
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},
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{
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/* Position */
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.location = 1,
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.binding = 1,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = 0
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},
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{
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/* Texture Offset */
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.location = 2,
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.binding = 0,
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.format = VK_FORMAT_R32G32B32_UINT,
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.offset = 16
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},
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{
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/* Destination bounds */
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.location = 3,
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.binding = 0,
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.format = VK_FORMAT_R32G32B32A32_UINT,
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.offset = 28
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},
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},
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};
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static nir_shader *
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build_nir_w_tiled_fragment_shader(struct anv_device *device,
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texel_fetch_build_func txf_func)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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const struct glsl_type *ivec3 = glsl_vector_type(GLSL_TYPE_INT, 3);
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const struct glsl_type *uvec4 = glsl_vector_type(GLSL_TYPE_UINT, 4);
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nir_builder b;
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
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b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs");
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/* We need gl_FragCoord so we know our Y-tiled position */
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nir_variable *frag_coord_in = nir_variable_create(b.shader,
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nir_var_shader_in,
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vec4, "gl_FragCoord");
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frag_coord_in->data.location = VARYING_SLOT_POS;
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frag_coord_in->data.origin_upper_left = true;
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/* In location 0 we have an ivec3 that has the offset from dest to
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* source in the first two components and the stride in the third.
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*/
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nir_variable *tex_off_in = nir_variable_create(b.shader, nir_var_shader_in,
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ivec3, "v_tex_off");
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tex_off_in->data.location = VARYING_SLOT_VAR0;
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tex_off_in->data.interpolation = INTERP_QUALIFIER_FLAT;
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/* In location 1 we have a uvec4 that gives us the bounds of the
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* destination. We need to discard if we get outside this boundary.
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*/
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nir_variable *bounds_in = nir_variable_create(b.shader, nir_var_shader_in,
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uvec4, "v_bounds");
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bounds_in->data.location = VARYING_SLOT_VAR1;
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bounds_in->data.interpolation = INTERP_QUALIFIER_FLAT;
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nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
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vec4, "f_color");
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color_out->data.location = FRAG_RESULT_DATA0;
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nir_ssa_def *frag_coord_int = nir_f2i(&b, nir_load_var(&b, frag_coord_in));
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nir_ssa_def *x_Y = nir_channel(&b, frag_coord_int, 0);
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nir_ssa_def *y_Y = nir_channel(&b, frag_coord_int, 1);
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/* Compute the W-tiled position from the Y-tiled position */
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nir_ssa_def *x_W = nir_iand(&b, x_Y, nir_imm_int(&b, 0xffffff80));
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x_W = nir_ushr(&b, x_W, nir_imm_int(&b, 1));
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x_W = nir_copy_bits(&b, x_W, 0, x_Y, 0, 1);
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x_W = nir_copy_bits(&b, x_W, 1, x_Y, 2, 1);
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x_W = nir_copy_bits(&b, x_W, 2, y_Y, 0, 1);
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x_W = nir_copy_bits(&b, x_W, 3, x_Y, 4, 3);
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nir_ssa_def *y_W = nir_iand(&b, y_Y, nir_imm_int(&b, 0xffffffe0));
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y_W = nir_ishl(&b, y_W, nir_imm_int(&b, 1));
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y_W = nir_copy_bits(&b, y_W, 0, x_Y, 1, 1);
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y_W = nir_copy_bits(&b, y_W, 1, x_Y, 3, 1);
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y_W = nir_copy_bits(&b, y_W, 2, y_Y, 1, 4);
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/* Figure out if we are out-of-bounds and discard */
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nir_ssa_def *bounds = nir_load_var(&b, bounds_in);
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nir_ssa_def *oob =
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nir_ior(&b, nir_ult(&b, x_W, nir_channel(&b, bounds, 0)),
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nir_ior(&b, nir_ult(&b, y_W, nir_channel(&b, bounds, 1)),
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nir_ior(&b, nir_uge(&b, x_W, nir_channel(&b, bounds, 2)),
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nir_uge(&b, y_W, nir_channel(&b, bounds, 3)))));
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nir_intrinsic_instr *discard =
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nir_intrinsic_instr_create(b.shader, nir_intrinsic_discard_if);
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discard->src[0] = nir_src_for_ssa(oob);
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nir_builder_instr_insert(&b, &discard->instr);
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unsigned swiz[4] = { 0, 1, 0, 0 };
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nir_ssa_def *tex_off =
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nir_swizzle(&b, nir_load_var(&b, tex_off_in), swiz, 2, false);
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nir_ssa_def *tex_pos = nir_iadd(&b, nir_vec2(&b, x_W, y_W), tex_off);
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nir_ssa_def *tex_pitch = nir_channel(&b, nir_load_var(&b, tex_off_in), 2);
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nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch);
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nir_store_var(&b, color_out, color, 0xf);
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return b.shader;
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}
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void
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anv_device_finish_meta_blit2d_state(struct anv_device *device)
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{
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@ -781,12 +1095,17 @@ blit2d_init_pipeline(struct anv_device *device,
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unreachable("Invalid blit2d source type");
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}
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const VkPipelineVertexInputStateCreateInfo *vi_create_info;
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struct anv_shader_module fs = { .nir = NULL };
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switch (dst_type) {
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case BLIT2D_DST_TYPE_NORMAL:
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fs.nir = build_nir_copy_fragment_shader(device, src_func);
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vi_create_info = &normal_vi_create_info;
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break;
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case BLIT2D_DST_TYPE_W_TILE:
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fs.nir = build_nir_w_tiled_fragment_shader(device, src_func);
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vi_create_info = &w_tiled_vi_create_info;
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break;
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case BLIT2D_DST_TYPE_RGB:
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/* Not yet supported */
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default:
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@ -802,47 +1121,6 @@ blit2d_init_pipeline(struct anv_device *device,
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.nir = build_nir_vertex_shader(),
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};
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VkPipelineVertexInputStateCreateInfo vi_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 2,
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.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
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{
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.binding = 0,
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.stride = 0,
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.inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
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},
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{
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.binding = 1,
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.stride = 5 * sizeof(float),
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.inputRate = VK_VERTEX_INPUT_RATE_VERTEX
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},
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},
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.vertexAttributeDescriptionCount = 3,
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.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
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{
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/* VUE Header */
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.location = 0,
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.binding = 0,
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.format = VK_FORMAT_R32G32B32A32_UINT,
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.offset = 0
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},
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{
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/* Position */
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.location = 1,
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.binding = 1,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = 0
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},
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{
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/* Texture Coordinate */
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.location = 2,
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.binding = 1,
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.format = VK_FORMAT_R32G32B32_SFLOAT,
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.offset = 8
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}
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}
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};
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VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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@ -863,7 +1141,7 @@ blit2d_init_pipeline(struct anv_device *device,
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = ARRAY_SIZE(pipeline_shader_stages),
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.pStages = pipeline_shader_stages,
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.pVertexInputState = &vi_create_info,
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||||
.pVertexInputState = vi_create_info,
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.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
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||||
.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
|
||||
.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
|
||||
|
|
|
|||
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