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intel/compiler: Fix destination type for CMP/CMPN

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For CMP/CMPN, use src0 type if destination is null otherwise get the
src0 type register with destination register size.

This fixes dEQP-VK.glsl.builtin_var.frontfacing.* tests cases on Xe2+.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28679>
This commit is contained in:
Sagar Ghuge 2024-04-29 10:55:09 -07:00 • committed by Marge Bot
parent 6c5acc6db7
commit e32828f5fc
1 changed files with 12 additions and 10 deletions
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22
src/intel/compiler/brw_fs_builder.h
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@ -679,13 +679,14 @@ namespace brw {
* Original gfx4 does type conversion to the destination type
* before comparison, producing garbage results for floating
* point comparisons.
*
* The destination type doesn't matter on newer generations,
* so we set the type to match src0 so we can compact the
* instruction.
*/
const enum brw_reg_type type =
dst.is_null() ?
src0.type :
brw_type_with_size(src0.type, brw_type_size_bits(dst.type));
return set_condmod(condition,
emit(BRW_OPCODE_CMP, retype(dst, src0.type),
emit(BRW_OPCODE_CMP, retype(dst, type),
fix_unsigned_negate(src0),
fix_unsigned_negate(src1)));
}
@ -704,13 +705,14 @@ namespace brw {
* Original gfx4 does type conversion to the destination type
* before comparison, producing garbage results for floating
* point comparisons.
*
* The destination type doesn't matter on newer generations,
* so we set the type to match src0 so we can compact the
* instruction.
*/
const enum brw_reg_type type =
dst.is_null() ?
src0.type :
brw_type_with_size(src0.type, brw_type_size_bits(dst.type));
return set_condmod(condition,
emit(BRW_OPCODE_CMPN, retype(dst, src0.type),
emit(BRW_OPCODE_CMPN, retype(dst, type),
fix_unsigned_negate(src0),
fix_unsigned_negate(src1)));
}