iris/l3: Enable L3 full way allocation when L3 config is NULL

Reworks:
 * Jordan: Check for cfg == NULL rather than is_dg1

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
This commit is contained in:
Jordan Justen 2019-08-02 00:32:17 -07:00
parent 6054b24f58
commit e2e0521ecb

View file

@ -744,6 +744,7 @@ iris_emit_l3_config(struct iris_batch *batch,
const struct gen_l3_config *cfg)
{
uint32_t reg_val;
assert(cfg || GEN_GEN >= 12);
#if GEN_GEN >= 12
#define L3_ALLOCATION_REG GENX(L3ALLOC)
@ -765,10 +766,16 @@ iris_emit_l3_config(struct iris_batch *batch,
reg.ErrorDetectionBehaviorControl = true;
reg.UseFullWays = true;
#endif
reg.URBAllocation = cfg->n[GEN_L3P_URB];
reg.ROAllocation = cfg->n[GEN_L3P_RO];
reg.DCAllocation = cfg->n[GEN_L3P_DC];
reg.AllAllocation = cfg->n[GEN_L3P_ALL];
if (GEN_GEN < 12 || cfg) {
reg.URBAllocation = cfg->n[GEN_L3P_URB];
reg.ROAllocation = cfg->n[GEN_L3P_RO];
reg.DCAllocation = cfg->n[GEN_L3P_DC];
reg.AllAllocation = cfg->n[GEN_L3P_ALL];
} else {
#if GEN_GEN >= 12
reg.L3FullWayAllocationEnable = true;
#endif
}
}
_iris_emit_lri(batch, L3_ALLOCATION_REG_num, reg_val);
}