fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-03 22:58:31 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

radv: use the SQTT enable bit for PKT3_DISPATCH_MESH_INDIRECT_MULTI

Browse source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39425>
This commit is contained in:
Samuel Pitoiset 2026-01-21 12:04:47 +01:00 • committed by Marge Bot
parent c7da19e2bf
commit e272c8062d
2 changed files with 14 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -10511,6 +10511,8 @@ radv_cs_emit_indirect_mesh_draw_packet(struct radv_cmd_buffer *cmd_buffer, uint3
struct radv_cmd_stream *cs = cmd_buffer->cs;
uint32_t base_reg = cmd_buffer->state.vtx_base_sgpr;
bool predicating = cmd_buffer->state.predicating;
const bool sqtt_en = !!device->sqtt.bo;
assert(base_reg || (!cmd_buffer->state.uses_drawid && !mesh_shader->info.cs.uses_grid_size));
/* Reset draw state. */
@ -10532,9 +10534,11 @@ radv_cs_emit_indirect_mesh_draw_packet(struct radv_cmd_buffer *cmd_buffer, uint3
radeon_emit(S_4C1_XYZ_DIM_REG(xyz_dim_reg) | S_4C1_DRAW_INDEX_REG(draw_id_reg));
if (pdev->info.gfx_level >= GFX11)
radeon_emit(S_4C2_DRAW_INDEX_ENABLE(draw_id_enable) | S_4C2_COUNT_INDIRECT_ENABLE(!!count_va) |
S_4C2_XYZ_DIM_ENABLE(xyz_dim_enable) | S_4C2_MODE1_ENABLE(mode1_enable));
S_4C2_XYZ_DIM_ENABLE(xyz_dim_enable) | S_4C2_MODE1_ENABLE(mode1_enable) |
S_4C2_THREAD_TRACE_MARKER_ENABLE(sqtt_en));
else
radeon_emit(S_4C2_DRAW_INDEX_ENABLE(draw_id_enable) | S_4C2_COUNT_INDIRECT_ENABLE(!!count_va));
radeon_emit(S_4C2_DRAW_INDEX_ENABLE(draw_id_enable) | S_4C2_COUNT_INDIRECT_ENABLE(!!count_va) |
S_4C2_THREAD_TRACE_MARKER_ENABLE(sqtt_en));
radeon_emit(draw_count);
radeon_emit(count_va);
radeon_emit(count_va >> 32);
@ -10989,7 +10993,6 @@ radv_emit_indirect_buffer(struct radv_cmd_stream *cs, uint64_t va, bool is_compu
ALWAYS_INLINE static void
radv_emit_indirect_mesh_draw_packets(struct radv_cmd_buffer *cmd_buffer, const struct radv_draw_info *info)
{
const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
const struct radv_cmd_state *state = &cmd_buffer->state;
struct radv_cmd_stream *cs = cmd_buffer->cs;
@ -11012,9 +11015,6 @@ radv_emit_indirect_mesh_draw_packets(struct radv_cmd_buffer *cmd_buffer, const s
radv_cs_emit_indirect_mesh_draw_packet(cmd_buffer, info->count, info->count_va, info->stride);
}
}
if (device->sqtt.bo)
radv_emit_thread_trace_marker(device, cmd_buffer->cs, cmd_buffer->state.predicating);
}
ALWAYS_INLINE static void

12
src/amd/vulkan/radv_dgc.c
View file

@ -2334,6 +2334,7 @@ dgc_emit_draw_mesh_tasks_with_count_gfx(struct dgc_cmdbuf *cs, nir_def *stream_a
const struct radv_indirect_command_layout *layout = cs->layout;
const struct radv_device *device = cs->dev;
const struct radv_physical_device *pdev = radv_device_physical(device);
const bool sqtt_en = !!device->sqtt.bo;
nir_builder *b = cs->b;
nir_push_if(b, nir_ieq_imm(b, load_param8(b, has_task_shader), 1));
@ -2379,10 +2380,12 @@ dgc_emit_draw_mesh_tasks_with_count_gfx(struct dgc_cmdbuf *cs, nir_def *stream_a
dgc_cs_emit(
nir_ior(b, nir_iand_imm(b, xyz_dim_reg, 0xFFFF), nir_ishl_imm(b, nir_iand_imm(b, draw_id_reg, 0xFFFF), 16)));
if (pdev->info.gfx_level >= GFX11) {
dgc_cs_emit(nir_ior_imm(b, nir_ior(b, draw_index_enable, xyz_dim_enable),
S_4C2_MODE1_ENABLE(!pdev->info.mesh_fast_launch_2)));
dgc_cs_emit(nir_ior_imm(b,
nir_ior_imm(b, nir_ior(b, draw_index_enable, xyz_dim_enable),
S_4C2_MODE1_ENABLE(!pdev->info.mesh_fast_launch_2)),
S_4C2_THREAD_TRACE_MARKER_ENABLE(sqtt_en)));
} else {
dgc_cs_emit(draw_index_enable);
dgc_cs_emit(nir_ior_imm(b, draw_index_enable, S_4C2_THREAD_TRACE_MARKER_ENABLE(sqtt_en)));
}
dgc_cs_emit(draw_count);
dgc_cs_emit_imm(0);
@ -2391,7 +2394,8 @@ dgc_emit_draw_mesh_tasks_with_count_gfx(struct dgc_cmdbuf *cs, nir_def *stream_a
dgc_cs_emit_imm(V_0287F0_DI_SRC_SEL_AUTO_INDEX);
dgc_cs_end();
dgc_emit_after_draw(cs, ApiCmdDrawMeshTasksIndirectCountEXT);
dgc_gfx12_emit_hiz_wa(cs);
dgc_emit_sqtt_end_api_marker(cs, ApiCmdDrawMeshTasksIndirectCountEXT);
}
nir_pop_if(b, NULL);
}