From e26a8be7af6998586947b90ca84f60a7c0508168 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Fri, 10 Oct 2025 19:06:39 +0200 Subject: [PATCH] ac/nir: enable nir atomic load/store opts MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Foz-DB GFX1201: Totals from 4 (0.00% of 80287) affected shaders: Instrs: 2928 -> 2920 (-0.27%); split: -0.31%, +0.03% CodeSize: 15424 -> 15392 (-0.21%); split: -0.23%, +0.03% Latency: 835578 -> 823220 (-1.48%) InvThroughput: 3307941 -> 3258515 (-1.49%) Copies: 459 -> 447 (-2.61%) VALU: 1297 -> 1291 (-0.46%) SALU: 595 -> 589 (-1.01%) Reviewed-by: Rhys Perry Reviewed-by: Marek Olšák Part-of: --- src/amd/common/nir/ac_nir.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/common/nir/ac_nir.c b/src/amd/common/nir/ac_nir.c index a0a536d00c2..358cf1cfe8c 100644 --- a/src/amd/common/nir/ac_nir.c +++ b/src/amd/common/nir/ac_nir.c @@ -91,6 +91,7 @@ void ac_nir_set_options(struct radeon_info *info, bool use_llvm, options->has_mul24_relaxed = true; options->has_f2e4m3fn_satfn = !use_llvm && info->gfx_level >= GFX12; options->has_atomic_isub = true; + options->has_atomic_load_store = true; options->lower_int64_options = nir_lower_imul64 | nir_lower_imul_high64 | nir_lower_imul_2x32_64 | nir_lower_divmod64 | nir_lower_minmax64 | nir_lower_iabs64 | nir_lower_iadd_sat64 | nir_lower_conv64 | nir_lower_bitfield_extract64;