diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 4836661b69b..02289085171 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -185,6 +185,9 @@ bool brw_nir_opt_peephole_ffma(nir_shader *shader);
 
 bool brw_nir_opt_peephole_imul32x16(nir_shader *shader);
 
+bool brw_nir_clamp_per_vertex_loads(nir_shader *shader,
+                                    unsigned input_vertices);
+
 void brw_nir_optimize(nir_shader *nir,
                       const struct brw_compiler *compiler,
                       bool is_scalar,
diff --git a/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c b/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c
new file mode 100644
index 00000000000..599de4888bd
--- /dev/null
+++ b/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2022 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/*
+ * Limit input per vertex input accesses. This is useful for the tesselation stages.
+ * On Gfx12.5+ out of bound accesses generate hangs.
+ */
+
+#include "brw_nir.h"
+#include "compiler/nir/nir_builder.h"
+
+static bool
+lower_instr(nir_builder *b, nir_instr *instr, void *cb_data)
+{
+   unsigned *input_vertices = cb_data;
+
+   if (instr->type != nir_instr_type_intrinsic)
+      return false;
+
+   nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
+   if (intrin->intrinsic != nir_intrinsic_load_per_vertex_input)
+      return false;
+
+   b->cursor = nir_before_instr(instr);
+
+   nir_instr_rewrite_src_ssa(instr,
+                             &intrin->src[0],
+                             nir_imin(b, intrin->src[0].ssa,
+                                         nir_imm_int(b, *input_vertices - 1)));
+
+   return true;
+}
+
+bool
+brw_nir_clamp_per_vertex_loads(nir_shader *shader,
+                               unsigned input_vertices)
+{
+   return nir_shader_instructions_pass(shader, lower_instr,
+                                       nir_metadata_block_index |
+                                       nir_metadata_dominance,
+                                       &input_vertices);
+}
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index ecb4775ab18..efb18592da9 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -365,6 +365,8 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    const bool debug_enabled = INTEL_DEBUG(DEBUG_TCS);
    const unsigned *assembly;
 
+   brw_nir_clamp_per_vertex_loads(nir, key->input_vertices);
+
    vue_prog_data->base.stage = MESA_SHADER_TESS_CTRL;
    prog_data->base.base.ray_queries = nir->info.ray_queries;
    prog_data->base.base.total_scratch = 0;
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index 9134614aa41..65250f59c95 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -86,6 +86,7 @@ libintel_compiler_files = files(
   'brw_nir_analyze_boolean_resolves.c',
   'brw_nir_analyze_ubo_ranges.c',
   'brw_nir_attribute_workarounds.c',
+  'brw_nir_clamp_per_vertex_loads.c',
   'brw_nir_lower_conversions.c',
   'brw_nir_lower_cs_intrinsics.c',
   'brw_nir_lower_alpha_to_coverage.c',