From e258492a8f697abea0549cb1f3aa24fe9fe430ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Tue, 1 Apr 2025 12:39:41 +0200 Subject: [PATCH] radv: Remove radv_streamout_info::num_outputs. This field was never used for determining the number of outputs, just for determining whether streamout was enabled, which makes it unnecessary. We can use enabled_stream_buffers_mask for that. Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_pipeline_graphics.c | 2 +- src/amd/vulkan/radv_shader.c | 2 +- src/amd/vulkan/radv_shader_args.c | 4 ++-- src/amd/vulkan/radv_shader_info.c | 8 +++----- src/amd/vulkan/radv_shader_info.h | 1 - 5 files changed, 7 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index fd88b7d6949..73b2b13acd8 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -3127,7 +3127,7 @@ radv_get_vgt_shader_key(const struct radv_device *device, struct radv_shader **s if (last_vgt_shader->info.is_ngg) { key.ngg = 1; key.ngg_passthrough = last_vgt_shader->info.is_ngg_passthrough; - key.ngg_streamout = last_vgt_shader->info.so.num_outputs > 0; + key.ngg_streamout = !!last_vgt_shader->info.so.enabled_stream_buffers_mask; } if (shaders[MESA_SHADER_MESH]) { key.mesh = 1; diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index badd0d2a740..7a8774026d9 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -2004,7 +2004,7 @@ radv_postprocess_binary_config(struct radv_device *device, struct radv_shader_bi if (!pdev->use_ngg_streamout) { config->rsrc2 |= S_00B12C_SO_BASE0_EN(!!info->so.strides[0]) | S_00B12C_SO_BASE1_EN(!!info->so.strides[1]) | S_00B12C_SO_BASE2_EN(!!info->so.strides[2]) | S_00B12C_SO_BASE3_EN(!!info->so.strides[3]) | - S_00B12C_SO_EN(!!info->so.num_outputs); + S_00B12C_SO_EN(!!info->so.enabled_stream_buffers_mask); } config->rsrc1 = S_00B848_VGPRS((num_vgprs - 1) / (info->wave_size == 32 ? 8 : 4)) | S_00B848_DX10_CLAMP(dx10_clamp) | diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c index 5b877ffafa1..39bba66f12e 100644 --- a/src/amd/vulkan/radv_shader_args.c +++ b/src/amd/vulkan/radv_shader_args.c @@ -111,7 +111,7 @@ declare_global_input_sgprs(const enum amd_gfx_level gfx_level, const struct radv } const bool needs_streamout_buffers = - info->so.num_outputs || + info->so.enabled_stream_buffers_mask || (info->merged_shader_compiled_separately && ((info->stage == MESA_SHADER_VERTEX && info->vs.as_es) || (info->stage == MESA_SHADER_TESS_EVAL && info->tes.as_es) || info->stage == MESA_SHADER_GEOMETRY)); @@ -202,7 +202,7 @@ declare_streamout_sgprs(const struct radv_shader_info *info, struct radv_shader_ int i; /* Streamout SGPRs. */ - if (info->so.num_outputs) { + if (info->so.enabled_stream_buffers_mask) { assert(stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_config); diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 845dc6ab18f..f2fdaed5262 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -372,8 +372,6 @@ gather_xfb_info(const nir_shader *nir, struct radv_shader_info *info) return; const nir_xfb_info *xfb = nir->xfb_info; - assert(xfb->output_count <= MAX_SO_OUTPUTS); - so->num_outputs = xfb->output_count; u_foreach_bit(output_buffer, xfb->buffers_written) { unsigned stream = xfb->buffer_to_stream[output_buffer]; @@ -535,7 +533,7 @@ gather_shader_info_ngg_query(struct radv_device *device, struct radv_shader_info const struct radv_physical_device *pdev = radv_device_physical(device); info->gs.has_pipeline_stat_query = pdev->emulate_ngg_gs_query_pipeline_stat && info->stage == MESA_SHADER_GEOMETRY; - info->has_xfb_query = info->so.num_outputs > 0; + info->has_xfb_query = !!info->so.enabled_stream_buffers_mask; info->has_prim_query = device->cache_key.primitives_generated_query || info->has_xfb_query; } @@ -1443,7 +1441,7 @@ gfx10_get_ngg_scratch_lds_base(const struct radv_device *device, const struct ra } else { const bool uses_instanceid = es_info->vs.needs_instance_id; const bool uses_primitive_id = es_info->uses_prim_id; - const bool streamout_enabled = es_info->so.num_outputs && pdev->use_ngg_streamout; + const bool streamout_enabled = es_info->so.enabled_stream_buffers_mask && pdev->use_ngg_streamout; const uint32_t num_outputs = es_info->stage == MESA_SHADER_VERTEX ? es_info->vs.num_outputs : es_info->tes.num_outputs; unsigned pervertex_lds_bytes = ac_ngg_nogs_get_pervertex_lds_size( @@ -1527,7 +1525,7 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_info *es /* LDS size for passing data from GS to ES. */ struct radv_streamout_info *so_info = &es_info->so; - if (so_info->num_outputs) { + if (so_info->enabled_stream_buffers_mask) { /* Compute the same pervertex LDS size as the NGG streamout lowering pass which allocates * space for all outputs. * TODO: only alloc space for outputs that really need streamout. diff --git a/src/amd/vulkan/radv_shader_info.h b/src/amd/vulkan/radv_shader_info.h index 43714e3592f..eb70b764ab5 100644 --- a/src/amd/vulkan/radv_shader_info.h +++ b/src/amd/vulkan/radv_shader_info.h @@ -53,7 +53,6 @@ struct radv_vs_output_info { }; struct radv_streamout_info { - uint16_t num_outputs; uint16_t strides[MAX_SO_BUFFERS]; uint32_t enabled_stream_buffers_mask; };