panfrost,panvk: Move lower_texture_late inside postproc

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40844>
This commit is contained in:
Lorenzo Rossi 2026-04-13 11:40:38 +02:00 committed by Marge Bot
parent d096a8e962
commit e24228e327
8 changed files with 15 additions and 24 deletions

View file

@ -188,7 +188,6 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
NIR_PASS(_, s, panfrost_nir_lower_res_indices, &inputs);
pan_postprocess_nir(s, panfrost_device_gpu_id(dev));
pan_nir_lower_texture_late(s, inputs.gpu_id);
if (s->info.stage == MESA_SHADER_VERTEX) {
NIR_PASS(_, s, nir_inline_sysval,

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@ -430,7 +430,6 @@ main(int argc, const char **argv)
nir_address_format_62bit_generic);
pan_postprocess_nir(s, inputs.gpu_id);
pan_nir_lower_texture_late(s, inputs.gpu_id);
NIR_PASS(_, s, nir_shader_intrinsics_pass, lower_sysvals,
nir_metadata_control_flow, NULL);

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@ -65,8 +65,6 @@ bifrost_precompiled_kernel_prepare_push_uniforms(
void bifrost_preprocess_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_optimize_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_postprocess_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_lower_texture_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_lower_texture_late_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_compile_shader_nir(nir_shader *nir,
const struct pan_compile_inputs *inputs,

View file

@ -714,6 +714,9 @@ mem_access_size_align_cb(nir_intrinsic_op intrin, uint8_t bytes,
};
}
static void bi_lower_texture_nir(nir_shader *nir, uint64_t gpu_id);
static void bi_lower_texture_late_nir(nir_shader *nir, uint64_t gpu_id);
void
bifrost_postprocess_nir(nir_shader *nir, uint64_t gpu_id)
{
@ -727,7 +730,7 @@ bifrost_postprocess_nir(nir_shader *nir, uint64_t gpu_id)
NIR_PASS(_, nir, nir_opt_sink, move_all);
NIR_PASS(_, nir, nir_opt_move, move_all);
bifrost_lower_texture_nir(nir, gpu_id);
bi_lower_texture_nir(nir, gpu_id);
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
NIR_PASS(_, nir, pan_nir_lower_noperspective_fs);
@ -816,10 +819,12 @@ bifrost_postprocess_nir(nir_shader *nir, uint64_t gpu_id)
NIR_PASS(_, nir, nir_lower_alu);
NIR_PASS(_, nir, nir_lower_frag_coord_to_pixel_coord);
NIR_PASS(_, nir, pan_nir_lower_var_special_pan);
bi_lower_texture_late_nir(nir, gpu_id);
}
void
bifrost_lower_texture_nir(nir_shader *nir, uint64_t gpu_id)
static void
bi_lower_texture_nir(nir_shader *nir, uint64_t gpu_id)
{
NIR_PASS(_, nir, nir_lower_image_atomics_to_global, NULL, NULL);
@ -964,8 +969,13 @@ pan_nir_lower_buf_image_access(nir_shader *shader, unsigned arch)
nir_metadata_control_flow, &arch);
}
void
bifrost_lower_texture_late_nir(nir_shader *nir, uint64_t gpu_id)
/* This must be called after any lowering of resource indices
* (panfrost_nir_lower_res_indices / panvk_per_arch(nir_lower_descriptors))
* and lowering of attribute indices (pan_nir_lower_image_index /
* pan_nir_lower_texel_buffer_fetch_index)
*/
static void
bi_lower_texture_late_nir(nir_shader *nir, uint64_t gpu_id)
{
NIR_PASS(_, nir, pan_nir_lower_texel_buffer_fetch, pan_arch(gpu_id));
NIR_PASS(_, nir, pan_nir_lower_buf_image_access, pan_arch(gpu_id));

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@ -101,18 +101,6 @@ pan_nir_lower_texture_early(nir_shader *nir, uint64_t gpu_id)
NIR_PASS(_, nir, nir_lower_tex, &lower_tex_options);
}
void
pan_nir_lower_texture_late(nir_shader *nir, uint64_t gpu_id)
{
/* This must be called after any lowering of resource indices
* (panfrost_nir_lower_res_indices / panvk_per_arch(nir_lower_descriptors))
* and lowering of attribute indices (pan_nir_lower_image_index /
* pan_nir_lower_texel_buffer_fetch_index) */
if (pan_arch(gpu_id) >= 6)
bifrost_lower_texture_late_nir(nir, gpu_id);
}
/** Converts a per-component mask to a byte mask */
uint16_t
pan_to_bytemask(unsigned bytes, unsigned mask)

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@ -73,7 +73,6 @@ bool pan_nir_lower_texel_buffer_fetch_index(nir_shader *shader,
unsigned attrib_offset);
void pan_nir_lower_texture_early(nir_shader *nir, uint64_t gpu_id);
void pan_nir_lower_texture_late(nir_shader *nir, uint64_t gpu_id);
nir_alu_type
pan_unpacked_type_for_format(const struct util_format_description *desc);

View file

@ -223,7 +223,6 @@ get_frame_shader(struct panvk_device *dev,
pan_preprocess_nir(nir, inputs.gpu_id);
pan_nir_lower_texture_early(nir, inputs.gpu_id);
pan_postprocess_nir(nir, inputs.gpu_id);
pan_nir_lower_texture_late(nir, inputs.gpu_id);
VkResult result = panvk_per_arch(create_internal_shader)(
dev, nir, &inputs, &shader);

View file

@ -981,7 +981,6 @@ panvk_compile_nir(struct panvk_device *dev, nir_shader *nir,
}
pan_postprocess_nir(nir, input.gpu_id);
pan_nir_lower_texture_late(nir, input.gpu_id);
if (noperspective_varyings && nir->info.stage == MESA_SHADER_VERTEX) {
NIR_PASS(_, nir, nir_inline_sysval,