ac/vcn: Add ac_vcn_sq_header/tail and use it for decode

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41743>
This commit is contained in:
David Rosca 2026-05-21 14:18:19 +02:00 committed by Marge Bot
parent f775ecb143
commit e1e65e47d4
4 changed files with 42 additions and 27 deletions

31
src/amd/common/ac_vcn.c Normal file
View file

@ -0,0 +1,31 @@
/*
* Copyright 2026 Advanced Micro Devices, Inc.
*
* SPDX-License-Identifier: MIT
*/
#include "ac_vcn.h"
#include "ac_cmdbuf.h"
void
ac_vcn_sq_header(struct ac_cmdbuf *cs, struct rvcn_sq_var *sq, unsigned type)
{
ac_cmdbuf_begin(cs);
ac_cmdbuf_emit(RADEON_VCN_ENGINE_INFO_SIZE);
ac_cmdbuf_emit(RADEON_VCN_ENGINE_INFO);
ac_cmdbuf_emit(type);
ac_cmdbuf_emit(0);
ac_cmdbuf_end();
sq->engine_ib_size_of_packages = &cs->buf[cs->cdw - 1];
}
void
ac_vcn_sq_tail(struct ac_cmdbuf *cs, struct rvcn_sq_var *sq)
{
uint32_t *end = &cs->buf[cs->cdw];
uint32_t size_in_dw = end - sq->engine_ib_size_of_packages + 3;
assert(cs->cdw <= cs->max_dw);
*sq->engine_ib_size_of_packages = size_in_dw * sizeof(uint32_t);
}

View file

@ -41,6 +41,8 @@
#define RADEON_VCN_RESOLVE_INPUT_PARAM_LAYOUT_TYPE_QPMAP_INT8 1
#define RADEON_VCN_RESOLVE_INPUT_PARAM_LAYOUT_TYPE_QPMAP_INT16 2
struct ac_cmdbuf;
struct rvcn_sq_var {
unsigned int *engine_ib_size_of_packages;
};
@ -68,4 +70,7 @@ struct rvcn_cmn_engine_op_resolveinputparamlayout {
unsigned int output_buffer_address_hi; /* High address of output buffer */
};
void ac_vcn_sq_header(struct ac_cmdbuf *cs, struct rvcn_sq_var *sq, unsigned type);
void ac_vcn_sq_tail(struct ac_cmdbuf *cs, struct rvcn_sq_var *sq);
#endif

View file

@ -929,29 +929,6 @@ stream_type(enum ac_video_codec codec)
}
}
static void
sq_header(struct ac_cmdbuf *cs, struct rvcn_sq_var *sq)
{
ac_cmdbuf_begin(cs);
ac_cmdbuf_emit(RADEON_VCN_ENGINE_INFO_SIZE);
ac_cmdbuf_emit(RADEON_VCN_ENGINE_INFO);
ac_cmdbuf_emit(RADEON_VCN_ENGINE_TYPE_DECODE);
ac_cmdbuf_emit(0);
ac_cmdbuf_end();
sq->engine_ib_size_of_packages = &cs->buf[cs->cdw - 1];
}
static void
sq_tail(struct ac_cmdbuf *cs, struct rvcn_sq_var *sq)
{
uint32_t *end = &cs->buf[cs->cdw];
uint32_t size_in_dw = end - sq->engine_ib_size_of_packages + 3;
assert(cs->cdw <= cs->max_dw);
*sq->engine_ib_size_of_packages = size_in_dw * sizeof(uint32_t);
}
static void
send_cmd(struct cmd_buffer *cmd_buf, uint32_t cmd, uint64_t va)
{
@ -1086,7 +1063,7 @@ vcn_build_create_cmd(struct ac_video_dec *decoder, struct ac_video_dec_create_cm
};
if (decoder->ip_type == AMD_IP_VCN_UNIFIED) {
sq_header(&cmd_buf.cs, &cmd_buf.sq);
ac_vcn_sq_header(&cmd_buf.cs, &cmd_buf.sq, RADEON_VCN_ENGINE_TYPE_DECODE);
cmd_buf.decode_buffer = add_ib_decode_buffer(&cmd_buf.cs);
}
@ -1095,7 +1072,7 @@ vcn_build_create_cmd(struct ac_video_dec *decoder, struct ac_video_dec_create_cm
if (decoder->ip_type == AMD_IP_VCN_UNIFIED) {
cmd_buf.decode_buffer->valid_buf_flag = cmd_buf.decode_buffer_flags;
sq_tail(&cmd_buf.cs, &cmd_buf.sq);
ac_vcn_sq_tail(&cmd_buf.cs, &cmd_buf.sq);
}
cmd->out.cmd_dw = cmd_buf.cs.cdw;
@ -1951,7 +1928,7 @@ vcn_build_decode_cmd(struct ac_video_dec *decoder, struct ac_video_dec_decode_cm
};
if (decoder->ip_type == AMD_IP_VCN_UNIFIED) {
sq_header(&cmd_buf.cs, &cmd_buf.sq);
ac_vcn_sq_header(&cmd_buf.cs, &cmd_buf.sq, RADEON_VCN_ENGINE_TYPE_DECODE);
cmd_buf.decode_buffer = add_ib_decode_buffer(&cmd_buf.cs);
}
@ -2183,7 +2160,7 @@ vcn_build_decode_cmd(struct ac_video_dec *decoder, struct ac_video_dec_decode_cm
if (decoder->ip_type == AMD_IP_VCN_UNIFIED) {
cmd_buf.decode_buffer->valid_buf_flag = cmd_buf.decode_buffer_flags;
sq_tail(&cmd_buf.cs, &cmd_buf.sq);
ac_vcn_sq_tail(&cmd_buf.cs, &cmd_buf.sq);
} else {
ac_cmdbuf_begin(&cmd_buf.cs);
ac_cmdbuf_emit(RDECODE_PKT0(dec->reg.cntl >> 2, 0));

View file

@ -141,6 +141,8 @@ amd_common_files = files(
'ac_perfcounter.h',
'ac_pm4.c',
'ac_pm4.h',
'ac_vcn.c',
'ac_vcn.h',
'ac_vcn_av1_default.h',
'ac_vcn_vp9_default.h',
'ac_vcn_dec.c',