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brw: Fix max_dispatch_width collection for CS with variable size

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The intention of the original commit was to make all the shaders report
the same max_dispatch_width.  When CS has multiple variants, this was
not happening as expected.

Fixes: 2acc2f18ea ("intel/compiler: report max dispatch width statistic")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41209>
This commit is contained in:
Caio Oliveira 2026-04-23 00:03:20 -07:00 • committed by Marge Bot
parent bdbf4ed739
commit e1745e0bd9
1 changed files with 2 additions and 3 deletions
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5
src/intel/compiler/brw/brw_compile_cs.cpp
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@ -261,7 +261,8 @@ brw_compile_cs(const struct brw_compiler *compiler,
g.enable_debug(name);
}
uint32_t max_dispatch_width = 8u << (util_last_bit(prog_data->prog_mask) - 1);
const uint32_t max_dispatch_width =
8u << (util_last_bit(prog_data->prog_mask) - 1);
struct genisa_stats *stats = params->base.stats;
for (unsigned simd = 0; simd < 3; simd++) {
@ -274,8 +275,6 @@ brw_compile_cs(const struct brw_compiler *compiler,
prog_data->base.grf_used = MAX2(prog_data->base.grf_used,
v[simd]->grf_used);
max_dispatch_width = 8u << simd;
}
}