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iris/icl: Set Enabled Texel Offset Precision Fix bit

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h/w specification requires this bit to be always set.
See Mesa commit 5eb173304b.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Anuj Phogat 2019-03-26 15:45:29 -07:00
parent 78825ca2d0
commit e0f4359ec1
1 changed files with 7 additions and 0 deletions
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7
src/gallium/drivers/iris/iris_state.c
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@ -707,6 +707,13 @@ iris_init_render_context(struct iris_screen *screen,
}
iris_emit_lri(batch, SAMPLER_MODE, reg_val);
/* Bit 1 must be set in HALF_SLICE_CHICKEN7. */
iris_pack_state(GENX(HALF_SLICE_CHICKEN7), &reg_val, reg) {
reg.EnabledTexelOffsetPrecisionFix = 1;
reg.EnabledTexelOffsetPrecisionFixMask = 1;
}
iris_emit_lri(batch, HALF_SLICE_CHICKEN7, reg_val);
// XXX: 3D_MODE?
#endif