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radeon/r200: remove ClearDepth() and ClearStencil() driver hooks

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The computed stencil.clear and depth.clear values aren't used anywhere.
Those fields have been removed too.

Reviewed-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Brian Paul 2012-03-11 18:31:32 -06:00
parent 5bb2059be7
commit e0ed951e13
5 changed files with 0 additions and 86 deletions
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28
src/mesa/drivers/dri/r200/r200_state.c
View file

@ -354,22 +354,6 @@ static void r200DepthFunc( struct gl_context *ctx, GLenum func )
}
}
static void r200ClearDepth( struct gl_context *ctx, GLclampd d )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLuint format = (rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &
R200_DEPTH_FORMAT_MASK);
switch ( format ) {
case R200_DEPTH_FORMAT_16BIT_INT_Z:
rmesa->radeon.state.depth.clear = d * 0x0000ffff;
break;
case R200_DEPTH_FORMAT_24BIT_INT_Z:
rmesa->radeon.state.depth.clear = d * 0x00ffffff;
break;
}
}
static void r200DepthMask( struct gl_context *ctx, GLboolean flag )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
@ -1547,16 +1531,6 @@ r200StencilOpSeparate( struct gl_context *ctx, GLenum face, GLenum fail,
}
}
static void r200ClearStencil( struct gl_context *ctx, GLint s )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
rmesa->radeon.state.stencil.clear =
((GLuint) (ctx->Stencil.Clear & 0xff) |
(0xff << R200_STENCIL_MASK_SHIFT) |
((ctx->Stencil.WriteMask[0] & 0xff) << R200_STENCIL_WRITEMASK_SHIFT));
}
/* =============================================================
* Window position and viewport transformation
@ -2479,8 +2453,6 @@ void r200InitStateFuncs( radeonContextPtr radeon, struct dd_function_table *func
functions->BlendEquationSeparate = r200BlendEquationSeparate;
functions->BlendFuncSeparate = r200BlendFuncSeparate;
functions->ClearColor = r200ClearColor;
functions->ClearDepth = r200ClearDepth;
functions->ClearStencil = r200ClearStencil;
functions->ClipPlane = r200ClipPlane;
functions->ColorMask = r200ColorMask;
functions->CullFace = r200CullFace;

12
src/mesa/drivers/dri/r200/r200_state_init.c
View file

@ -622,18 +622,6 @@ void r200InitState( r200ContextPtr rmesa )
rmesa->radeon.state.color.clear = 0x00000000;
switch ( ctx->Visual.depthBits ) {
case 16:
rmesa->radeon.state.depth.clear = 0x0000ffff;
rmesa->radeon.state.stencil.clear = 0x00000000;
break;
case 24:
default:
rmesa->radeon.state.depth.clear = 0x00ffffff;
rmesa->radeon.state.stencil.clear = 0xffff0000;
break;
}
rmesa->radeon.Fallback = 0;
rmesa->radeon.hw.max_state_size = 0;

6
src/mesa/drivers/dri/radeon/radeon_common_context.h
View file

@ -117,7 +117,6 @@ struct radeon_colorbuffer_state {
};
struct radeon_depthbuffer_state {
GLuint clear;
struct gl_renderbuffer *rb;
};
@ -130,10 +129,6 @@ struct radeon_scissor_state {
drm_clip_rect_t *pClipRects;
};
struct radeon_stencilbuffer_state {
GLuint clear; /* rb3d_stencilrefmask value */
};
struct radeon_state_atom {
struct radeon_state_atom *next, *prev;
const char *name; /* for debug */
@ -377,7 +372,6 @@ struct radeon_state {
struct radeon_colorbuffer_state color;
struct radeon_depthbuffer_state depth;
struct radeon_scissor_state scissor;
struct radeon_stencilbuffer_state stencil;
};
/**

27
src/mesa/drivers/dri/radeon/radeon_state.c
View file

@ -305,22 +305,6 @@ static void radeonDepthMask( struct gl_context *ctx, GLboolean flag )
}
}
static void radeonClearDepth( struct gl_context *ctx, GLclampd d )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint format = (rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &
RADEON_DEPTH_FORMAT_MASK);
switch ( format ) {
case RADEON_DEPTH_FORMAT_16BIT_INT_Z:
rmesa->radeon.state.depth.clear = d * 0x0000ffff;
break;
case RADEON_DEPTH_FORMAT_24BIT_INT_Z:
rmesa->radeon.state.depth.clear = d * 0x00ffffff;
break;
}
}
/* =============================================================
* Fog
@ -1346,15 +1330,6 @@ static void radeonStencilOpSeparate( struct gl_context *ctx, GLenum face, GLenum
}
}
static void radeonClearStencil( struct gl_context *ctx, GLint s )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
rmesa->radeon.state.stencil.clear =
((GLuint) (ctx->Stencil.Clear & 0xff) |
(0xff << RADEON_STENCIL_MASK_SHIFT) |
((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT));
}
/* =============================================================
@ -2234,8 +2209,6 @@ void radeonInitStateFuncs( struct gl_context *ctx )
ctx->Driver.BlendEquationSeparate = radeonBlendEquationSeparate;
ctx->Driver.BlendFuncSeparate = radeonBlendFuncSeparate;
ctx->Driver.ClearColor = radeonClearColor;
ctx->Driver.ClearDepth = radeonClearDepth;
ctx->Driver.ClearStencil = radeonClearStencil;
ctx->Driver.ClipPlane = radeonClipPlane;
ctx->Driver.ColorMask = radeonColorMask;
ctx->Driver.CullFace = radeonCullFace;

13
src/mesa/drivers/dri/radeon/radeon_state_init.c
View file

@ -508,19 +508,6 @@ void radeonInitState( r100ContextPtr rmesa )
rmesa->radeon.state.color.clear = 0x00000000;
switch ( ctx->Visual.depthBits ) {
case 16:
rmesa->radeon.state.depth.clear = 0x0000ffff;
rmesa->radeon.state.stencil.clear = 0x00000000;
break;
case 24:
rmesa->radeon.state.depth.clear = 0x00ffffff;
rmesa->radeon.state.stencil.clear = 0xffff0000;
break;
default:
break;
}
rmesa->radeon.Fallback = 0;