From e0c343888fd2c5d4ac602bee0ba9a0de4c4523e1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 24 May 2024 23:17:22 -0400 Subject: [PATCH] radeonsi: lower descriptors sooner to allow vectorizing descriptor loads The comment was wrong. Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_shader.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 7584d72817c..7ef4b21e599 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2600,6 +2600,7 @@ static struct nir_shader *si_get_nir_shader(struct si_shader *shader, struct si_ NIR_PASS(progress, nir, nir_lower_io_to_scalar, nir_var_mem_ubo | nir_var_mem_ssbo | nir_var_mem_shared | nir_var_mem_global, ac_nir_scalarize_overfetching_loads_callback, &sel->screen->info.gfx_level); + NIR_PASS(progress, nir, si_nir_lower_resource, shader, args); if (progress) { si_nir_opts(sel->screen, nir, false); @@ -2638,9 +2639,6 @@ static struct nir_shader *si_get_nir_shader(struct si_shader *shader, struct si_ } } - /* This must be after vectorization because it causes bindings_different_restrict() to fail. */ - NIR_PASS(progress, nir, si_nir_lower_resource, shader, args); - /* This must be after lowering resources to descriptor loads and before lowering intrinsics * to args and lowering int64. */