ac/nir: move store_var_components to common place

It will be shared by other nir lowering too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
This commit is contained in:
Qiang Yu 2023-02-14 10:19:44 +08:00 committed by Marge Bot
parent f2617944bf
commit e070a9e8d0
3 changed files with 31 additions and 27 deletions

View file

@ -45,6 +45,31 @@ ac_nir_unpack_arg(nir_builder *b, const struct ac_shader_args *ac_args, struct a
return nir_ubfe_imm(b, value, rshift, bitwidth);
}
void
ac_nir_store_var_components(nir_builder *b, nir_variable *var, nir_ssa_def *value,
unsigned component, unsigned writemask)
{
/* component store */
if (value->num_components != 4) {
nir_ssa_def *undef = nir_ssa_undef(b, 1, value->bit_size);
/* add undef component before and after value to form a vec4 */
nir_ssa_def *comp[4];
for (int i = 0; i < 4; i++) {
comp[i] = (i >= component && i < component + value->num_components) ?
nir_channel(b, value, i - component) : undef;
}
value = nir_vec(b, comp, 4);
writemask <<= component;
} else {
/* if num_component==4, there should be no component offset */
assert(component == 0);
}
nir_store_var(b, var, value, writemask);
}
void
ac_nir_export_primitive(nir_builder *b, nir_ssa_def *prim)
{

View file

@ -73,6 +73,10 @@ nir_ssa_def *
ac_nir_unpack_arg(nir_builder *b, const struct ac_shader_args *ac_args, struct ac_arg arg,
unsigned rshift, unsigned bitwidth);
void
ac_nir_store_var_components(nir_builder *b, nir_variable *var, nir_ssa_def *value,
unsigned component, unsigned writemask);
void
ac_nir_export_primitive(nir_builder *b, nir_ssa_def *prim);

View file

@ -606,31 +606,6 @@ emit_store_ngg_nogs_es_primitive_id(nir_builder *b, lower_ngg_nogs_state *st)
b->shader->info.outputs_written |= VARYING_BIT_PRIMITIVE_ID;
}
static void
store_var_components(nir_builder *b, nir_variable *var, nir_ssa_def *value,
unsigned component, unsigned writemask)
{
/* component store */
if (value->num_components != 4) {
nir_ssa_def *undef = nir_ssa_undef(b, 1, value->bit_size);
/* add undef component before and after value to form a vec4 */
nir_ssa_def *comp[4];
for (int i = 0; i < 4; i++) {
comp[i] = (i >= component && i < component + value->num_components) ?
nir_channel(b, value, i - component) : undef;
}
value = nir_vec(b, comp, 4);
writemask <<= component;
} else {
/* if num_component==4, there should be no component offset */
assert(component == 0);
}
nir_store_var(b, var, value, writemask);
}
static void
add_clipdist_bit(nir_builder *b, nir_ssa_def *dist, unsigned index, nir_variable *mask)
{
@ -671,7 +646,7 @@ remove_culling_shader_output(nir_builder *b, nir_instr *instr, void *state)
nir_io_semantics io_sem = nir_intrinsic_io_semantics(intrin);
switch (io_sem.location) {
case VARYING_SLOT_POS:
store_var_components(b, s->position_value_var, store_val, component, writemask);
ac_nir_store_var_components(b, s->position_value_var, store_val, component, writemask);
break;
case VARYING_SLOT_CLIP_DIST0:
case VARYING_SLOT_CLIP_DIST1: {
@ -688,7 +663,7 @@ remove_culling_shader_output(nir_builder *b, nir_instr *instr, void *state)
break;
}
case VARYING_SLOT_CLIP_VERTEX:
store_var_components(b, s->clip_vertex_var, store_val, component, writemask);
ac_nir_store_var_components(b, s->clip_vertex_var, store_val, component, writemask);
break;
default:
break;