diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 0a9156cdae0..69465c41707 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -718,7 +718,8 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
       unreachable("expecting only nir_intrinsic_scoped_barrier");
 
    case nir_intrinsic_scoped_barrier: {
-      assert(nir_intrinsic_execution_scope(instr) == NIR_SCOPE_NONE);
+      if (nir_intrinsic_memory_scope(instr) == NIR_SCOPE_NONE)
+         break;
       const vec4_builder bld =
          vec4_builder(this).at_end().annotate(current_annotation, base_ir);
       const dst_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD);
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index efb18592da9..2460227afb5 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -304,10 +304,16 @@ vec4_tcs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
       break;
    }
 
+   case nir_intrinsic_scoped_barrier:
    case nir_intrinsic_control_barrier: {
-      dst_reg header = dst_reg(this, glsl_type::uvec4_type);
-      emit(TCS_OPCODE_CREATE_BARRIER_HEADER, header);
-      emit(SHADER_OPCODE_BARRIER, dst_null_ud(), src_reg(header));
+      const bool scoped = instr->intrinsic == nir_intrinsic_scoped_barrier;
+      if (scoped && nir_intrinsic_memory_scope(instr) != NIR_SCOPE_NONE)
+         vec4_visitor::nir_emit_intrinsic(instr);
+      if (!scoped || nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP) {
+         dst_reg header = dst_reg(this, glsl_type::uvec4_type);
+         emit(TCS_OPCODE_CREATE_BARRIER_HEADER, header);
+         emit(SHADER_OPCODE_BARRIER, dst_null_ud(), src_reg(header));
+      }
       break;
    }