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radeonsi/gfx10: disable clear state

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Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Nicolai Hähnle 2019-05-08 03:06:15 +02:00 • committed by Marek Olšák
parent 0dd57f0fc0
commit dfa8e758c2
2 changed files with 5 additions and 8 deletions
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9
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -1082,10 +1082,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
}
/* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
* on GFX6. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
* SPI_VS_OUT_CONFIG. So only enable GFX7 CLEAR_STATE on amdgpu kernel.*/
sscreen->has_clear_state = sscreen->info.chip_class >= GFX7 &&
sscreen->info.is_amdgpu;
* on GFX6. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
* SPI_VS_OUT_CONFIG. So only enable GFX7 CLEAR_STATE on amdgpu kernel. */
sscreen->has_clear_state = sscreen->info.chip_class >= GFX7 &&
sscreen->info.chip_class <= GFX9 &&
sscreen->info.is_amdgpu;
sscreen->has_distributed_tess =
sscreen->info.chip_class >= GFX8 &&

4
src/gallium/drivers/radeonsi/si_state.c
View file

@ -5391,10 +5391,6 @@ static void si_init_config(struct si_context *sctx)
bool has_clear_state = sscreen->has_clear_state;
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
/* GFX6, radeon kernel disabled CLEAR_STATE. */
assert(has_clear_state || sscreen->info.chip_class == GFX6 ||
!sscreen->info.is_amdgpu);
if (!pm4)
return;