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ilo: add ilo_state_{vs,hs,ds,gs}
We want to make ilo_shader_cso a union of ilo_state_{vs,hs,ds,gs} and ps
payload.
This commit is contained in:
Chia-I Wu
parent
a0bb1c2d17
commit
df9f846ac6
3 changed files with 919 additions and 0 deletions
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@ -31,6 +31,8 @@ C_SOURCES := \
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core/ilo_state_sampler.h \
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core/ilo_state_sbe.c \
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core/ilo_state_sbe.h \
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core/ilo_state_shader.c \
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core/ilo_state_shader.h \
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core/ilo_state_sol.c \
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core/ilo_state_sol.h \
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core/ilo_state_surface.c \
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737
src/gallium/drivers/ilo/core/ilo_state_shader.c
Normal file
737
src/gallium/drivers/ilo/core/ilo_state_shader.c
Normal file
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@ -0,0 +1,737 @@
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/*
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* Mesa 3-D graphics library
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*
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* Copyright (C) 2012-2015 LunarG, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Chia-I Wu <olv@lunarg.com>
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*/
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#include "ilo_debug.h"
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#include "ilo_state_shader.h"
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enum vertex_stage {
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STAGE_VS,
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STAGE_HS,
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STAGE_DS,
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STAGE_GS,
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};
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struct vertex_ff {
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uint8_t grf_start;
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uint8_t scratch_space;
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uint8_t sampler_count;
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uint8_t surface_count;
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bool has_uav;
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uint8_t vue_read_offset;
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uint8_t vue_read_len;
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uint8_t user_clip_enables;
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};
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static bool
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vertex_validate_gen6_kernel(const struct ilo_dev *dev,
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enum vertex_stage stage,
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const struct ilo_state_shader_kernel_info *kernel)
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{
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/*
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* "Dispatch GRF Start Register for URB Data" is U4 for GS and U5 for
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* others.
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*/
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const uint8_t max_grf_start = (stage == STAGE_GS) ? 16 : 32;
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/*
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* From the Sandy Bridge PRM, volume 2 part 1, page 134:
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*
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* "(Per-Thread Scratch Space)
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* Range [0,11] indicating [1K Bytes, 2M Bytes]"
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*/
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const uint32_t max_scratch_size = 2 * 1024 * 1024;
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ILO_DEV_ASSERT(dev, 6, 8);
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/* we do not want to save it */
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assert(!kernel->offset);
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assert(kernel->grf_start < max_grf_start);
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assert(kernel->scratch_size <= max_scratch_size);
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return true;
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}
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static bool
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vertex_validate_gen6_urb(const struct ilo_dev *dev,
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enum vertex_stage stage,
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const struct ilo_state_shader_urb_info *urb)
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{
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/* "Vertex/Patch URB Entry Read Offset" is U6, in pairs */
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const uint8_t max_read_base = 63 * 2;
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/*
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* "Vertex/Patch URB Entry Read Length" is limited to 64 for DS and U6 for
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* others, in pairs
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*/
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const uint8_t max_read_count = ((stage == STAGE_DS) ? 64 : 63) * 2;
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ILO_DEV_ASSERT(dev, 6, 8);
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assert(urb->read_base + urb->read_count <= urb->cv_input_attr_count);
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assert(urb->read_base % 2 == 0 && urb->read_base <= max_read_base);
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/*
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* There is no need to worry about reading past entries, as URB entries are
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* aligned to 1024-bits (Gen6) or 512-bits (Gen7+).
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*/
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assert(urb->read_count <= max_read_count);
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return true;
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}
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static bool
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vertex_get_gen6_ff(const struct ilo_dev *dev,
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enum vertex_stage stage,
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const struct ilo_state_shader_kernel_info *kernel,
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const struct ilo_state_shader_resource_info *resource,
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const struct ilo_state_shader_urb_info *urb,
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struct vertex_ff *ff)
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{
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ILO_DEV_ASSERT(dev, 6, 8);
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if (!vertex_validate_gen6_kernel(dev, stage, kernel) ||
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!vertex_validate_gen6_urb(dev, stage, urb))
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return false;
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ff->grf_start = kernel->grf_start;
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/* next power of two, starting from 1KB */
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ff->scratch_space = (kernel->scratch_size > 1024) ?
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(util_last_bit(kernel->scratch_size - 1) - 10): 0;
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ff->sampler_count = (resource->sampler_count <= 12) ?
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(resource->sampler_count + 3) / 4 : 4;
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ff->surface_count = resource->surface_count;
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ff->has_uav = resource->has_uav;
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ff->vue_read_offset = urb->read_base / 2;
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ff->vue_read_len = (urb->read_count + 1) / 2;
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/* need to read something unless VUE handles are included */
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switch (stage) {
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case STAGE_VS:
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if (!ff->vue_read_len)
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ff->vue_read_len = 1;
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/* one GRF per attribute */
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assert(kernel->grf_start + urb->read_count * 2 <= 128);
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break;
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case STAGE_GS:
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if (ilo_dev_gen(dev) == ILO_GEN(6) && !ff->vue_read_len)
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ff->vue_read_len = 1;
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break;
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default:
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break;
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}
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ff->user_clip_enables = urb->user_clip_enables;
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return true;
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}
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static uint16_t
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vs_get_gen6_thread_count(const struct ilo_dev *dev,
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const struct ilo_state_vs_info *info)
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{
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uint16_t thread_count;
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ILO_DEV_ASSERT(dev, 6, 8);
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/* Maximum Number of Threads of 3DSTATE_VS */
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switch (ilo_dev_gen(dev)) {
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case ILO_GEN(8):
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thread_count = 504;
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break;
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case ILO_GEN(7.5):
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thread_count = (dev->gt >= 2) ? 280 : 70;
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break;
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case ILO_GEN(7):
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case ILO_GEN(6):
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default:
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thread_count = dev->thread_count;
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break;
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}
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return thread_count - 1;
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}
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static bool
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vs_set_gen6_3DSTATE_VS(struct ilo_state_vs *vs,
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const struct ilo_dev *dev,
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const struct ilo_state_vs_info *info)
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{
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struct vertex_ff ff;
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uint16_t thread_count;
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uint32_t dw2, dw3, dw4, dw5;
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ILO_DEV_ASSERT(dev, 6, 8);
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if (!vertex_get_gen6_ff(dev, STAGE_VS, &info->kernel,
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&info->resource, &info->urb, &ff))
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return false;
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thread_count = vs_get_gen6_thread_count(dev, info);
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dw2 = ff.sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT |
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ff.surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT;
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if (false)
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dw2 |= GEN6_THREADDISP_FP_MODE_ALT;
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if (ilo_dev_gen(dev) >= ILO_GEN(7.5) && ff.has_uav)
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dw2 |= GEN75_THREADDISP_ACCESS_UAV;
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dw3 = ff.scratch_space << GEN6_THREADSCRATCH_SPACE_PER_THREAD__SHIFT;
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dw4 = ff.grf_start << GEN6_VS_DW4_URB_GRF_START__SHIFT |
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ff.vue_read_len << GEN6_VS_DW4_URB_READ_LEN__SHIFT |
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ff.vue_read_offset << GEN6_VS_DW4_URB_READ_OFFSET__SHIFT;
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dw5 = 0;
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if (ilo_dev_gen(dev) >= ILO_GEN(7.5))
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dw5 |= thread_count << GEN75_VS_DW5_MAX_THREADS__SHIFT;
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else
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dw5 |= thread_count << GEN6_VS_DW5_MAX_THREADS__SHIFT;
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if (info->stats_enable)
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dw5 |= GEN6_VS_DW5_STATISTICS;
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if (info->dispatch_enable)
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dw5 |= GEN6_VS_DW5_VS_ENABLE;
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STATIC_ASSERT(ARRAY_SIZE(vs->vs) >= 5);
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vs->vs[0] = dw2;
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vs->vs[1] = dw3;
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vs->vs[2] = dw4;
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vs->vs[3] = dw5;
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if (ilo_dev_gen(dev) >= ILO_GEN(8))
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vs->vs[4] = ff.user_clip_enables << GEN8_VS_DW8_UCP_CLIP_ENABLES__SHIFT;
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return true;
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}
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static uint16_t
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hs_get_gen7_thread_count(const struct ilo_dev *dev,
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const struct ilo_state_hs_info *info)
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{
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uint16_t thread_count;
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ILO_DEV_ASSERT(dev, 7, 8);
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/* Maximum Number of Threads of 3DSTATE_HS */
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switch (ilo_dev_gen(dev)) {
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case ILO_GEN(8):
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thread_count = 504;
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break;
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case ILO_GEN(7.5):
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thread_count = (dev->gt >= 2) ? 256 : 70;
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break;
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case ILO_GEN(7):
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default:
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thread_count = dev->thread_count;
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break;
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}
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return thread_count - 1;
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}
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static bool
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hs_set_gen7_3DSTATE_HS(struct ilo_state_hs *hs,
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const struct ilo_dev *dev,
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const struct ilo_state_hs_info *info)
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{
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struct vertex_ff ff;
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uint16_t thread_count;
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uint32_t dw1, dw2, dw4, dw5;
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ILO_DEV_ASSERT(dev, 7, 8);
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if (!vertex_get_gen6_ff(dev, STAGE_HS, &info->kernel,
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&info->resource, &info->urb, &ff))
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return false;
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thread_count = hs_get_gen7_thread_count(dev, info);
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dw1 = ff.sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT |
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ff.surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT;
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if (ilo_dev_gen(dev) >= ILO_GEN(7.5))
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dw1 |= thread_count << GEN75_HS_DW1_DISPATCH_MAX_THREADS__SHIFT;
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else
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dw1 |= thread_count << GEN7_HS_DW1_DISPATCH_MAX_THREADS__SHIFT;
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dw2 = 0 << GEN7_HS_DW2_INSTANCE_COUNT__SHIFT;
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if (info->dispatch_enable)
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dw2 |= GEN7_HS_DW2_HS_ENABLE;
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if (info->stats_enable)
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dw2 |= GEN7_HS_DW2_STATISTICS;
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dw4 = ff.scratch_space << GEN6_THREADSCRATCH_SPACE_PER_THREAD__SHIFT;
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dw5 = GEN7_HS_DW5_INCLUDE_VERTEX_HANDLES |
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ff.grf_start << GEN7_HS_DW5_URB_GRF_START__SHIFT |
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ff.vue_read_len << GEN7_HS_DW5_URB_READ_LEN__SHIFT |
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ff.vue_read_offset << GEN7_HS_DW5_URB_READ_OFFSET__SHIFT;
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if (ilo_dev_gen(dev) >= ILO_GEN(7.5) && ff.has_uav)
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dw5 |= GEN75_HS_DW5_ACCESS_UAV;
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STATIC_ASSERT(ARRAY_SIZE(hs->hs) >= 4);
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hs->hs[0] = dw1;
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hs->hs[1] = dw2;
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hs->hs[2] = dw4;
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hs->hs[3] = dw5;
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return true;
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}
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static bool
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ds_set_gen7_3DSTATE_TE(struct ilo_state_ds *ds,
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const struct ilo_dev *dev,
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const struct ilo_state_ds_info *info)
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{
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uint32_t dw1;
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ILO_DEV_ASSERT(dev, 7, 8);
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dw1 = 0;
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if (info->dispatch_enable) {
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dw1 |= GEN7_TE_DW1_MODE_HW |
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GEN7_TE_DW1_TE_ENABLE;
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}
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STATIC_ASSERT(ARRAY_SIZE(ds->te) >= 3);
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ds->te[0] = dw1;
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ds->te[1] = fui(63.0f);
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ds->te[2] = fui(64.0f);
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return true;
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}
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static uint16_t
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ds_get_gen7_thread_count(const struct ilo_dev *dev,
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const struct ilo_state_ds_info *info)
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{
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uint16_t thread_count;
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ILO_DEV_ASSERT(dev, 7, 8);
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/* Maximum Number of Threads of 3DSTATE_DS */
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switch (ilo_dev_gen(dev)) {
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case ILO_GEN(8):
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thread_count = 504;
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break;
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case ILO_GEN(7.5):
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thread_count = (dev->gt >= 2) ? 280 : 70;
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break;
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case ILO_GEN(7):
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default:
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thread_count = dev->thread_count;
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break;
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}
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return thread_count - 1;
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}
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static bool
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ds_set_gen7_3DSTATE_DS(struct ilo_state_ds *ds,
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const struct ilo_dev *dev,
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const struct ilo_state_ds_info *info)
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{
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struct vertex_ff ff;
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uint16_t thread_count;
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uint32_t dw2, dw3, dw4, dw5;
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ILO_DEV_ASSERT(dev, 7, 8);
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if (!vertex_get_gen6_ff(dev, STAGE_DS, &info->kernel,
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&info->resource, &info->urb, &ff))
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return false;
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thread_count = ds_get_gen7_thread_count(dev, info);
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dw2 = ff.sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT |
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ff.surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT;
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if (ilo_dev_gen(dev) >= ILO_GEN(7.5) && ff.has_uav)
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dw2 |= GEN75_THREADDISP_ACCESS_UAV;
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dw3 = ff.scratch_space << GEN6_THREADSCRATCH_SPACE_PER_THREAD__SHIFT;
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dw4 = ff.grf_start << GEN7_DS_DW4_URB_GRF_START__SHIFT |
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ff.vue_read_len << GEN7_DS_DW4_URB_READ_LEN__SHIFT |
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ff.vue_read_offset << GEN7_DS_DW4_URB_READ_OFFSET__SHIFT;
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dw5 = 0;
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if (ilo_dev_gen(dev) >= ILO_GEN(7.5))
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dw5 |= thread_count << GEN75_DS_DW5_MAX_THREADS__SHIFT;
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else
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dw5 |= thread_count << GEN7_DS_DW5_MAX_THREADS__SHIFT;
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if (info->stats_enable)
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dw5 |= GEN7_DS_DW5_STATISTICS;
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if (info->dispatch_enable)
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dw5 |= GEN7_DS_DW5_DS_ENABLE;
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STATIC_ASSERT(ARRAY_SIZE(ds->ds) >= 5);
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ds->ds[0] = dw2;
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ds->ds[1] = dw3;
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ds->ds[2] = dw4;
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ds->ds[3] = dw5;
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if (ilo_dev_gen(dev) >= ILO_GEN(8))
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ds->ds[4] = ff.user_clip_enables << GEN8_DS_DW8_UCP_CLIP_ENABLES__SHIFT;
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return true;
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}
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static bool
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gs_get_gen6_ff(const struct ilo_dev *dev,
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const struct ilo_state_gs_info *info,
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struct vertex_ff *ff)
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{
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const struct ilo_state_shader_urb_info *urb = &info->urb;
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const struct ilo_state_gs_sol_info *sol = &info->sol;
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ILO_DEV_ASSERT(dev, 6, 8);
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if (!vertex_get_gen6_ff(dev, STAGE_GS, &info->kernel,
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&info->resource, &info->urb, ff))
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return false;
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/*
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* From the Ivy Bridge PRM, volume 2 part 1, page 168-169:
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*
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* "[0,62] indicating [1,63] 16B units"
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*
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* "Programming Restrictions: The vertex size must be programmed as a
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* multiple of 32B units with the following exception: Rendering is
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* disabled (as per SOL stage state) and the vertex size output by the
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* GS thread is 16B.
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*
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* If rendering is enabled (as per SOL state) the vertex size must be
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* programmed as a multiple of 32B units. In other words, the only
|
||||
* time software can program a vertex size with an odd number of 16B
|
||||
* units is when rendering is disabled."
|
||||
*/
|
||||
assert(urb->output_attr_count <= 63);
|
||||
if (!sol->render_disable)
|
||||
assert(urb->output_attr_count % 2 == 0);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static uint16_t
|
||||
gs_get_gen6_thread_count(const struct ilo_dev *dev,
|
||||
const struct ilo_state_gs_info *info)
|
||||
{
|
||||
const struct ilo_state_gs_sol_info *sol = &info->sol;
|
||||
uint16_t thread_count;
|
||||
|
||||
ILO_DEV_ASSERT(dev, 6, 8);
|
||||
|
||||
/* Maximum Number of Threads of 3DSTATE_GS */
|
||||
switch (ilo_dev_gen(dev)) {
|
||||
case ILO_GEN(8):
|
||||
thread_count = 504;
|
||||
break;
|
||||
case ILO_GEN(7.5):
|
||||
thread_count = (dev->gt >= 2) ? 256 : 70;
|
||||
break;
|
||||
case ILO_GEN(7):
|
||||
case ILO_GEN(6):
|
||||
default:
|
||||
thread_count = dev->thread_count;
|
||||
|
||||
/*
|
||||
* From the Sandy Bridge PRM, volume 2 part 1, page 154:
|
||||
*
|
||||
* "Maximum Number of Threads valid range is [0,27] when Rendering
|
||||
* Enabled bit is set."
|
||||
*
|
||||
* According to the classic driver, [0, 20] for GT1.
|
||||
*/
|
||||
if (!sol->render_disable)
|
||||
thread_count = (dev->gt == 2) ? 27 : 20;
|
||||
break;
|
||||
}
|
||||
|
||||
return thread_count - 1;
|
||||
}
|
||||
|
||||
static bool
|
||||
gs_set_gen6_3DSTATE_GS(struct ilo_state_gs *gs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_gs_info *info)
|
||||
{
|
||||
const struct ilo_state_gs_sol_info *sol = &info->sol;
|
||||
struct vertex_ff ff;
|
||||
uint16_t thread_count;
|
||||
uint32_t dw2, dw3, dw4, dw5, dw6;
|
||||
|
||||
ILO_DEV_ASSERT(dev, 6, 6);
|
||||
|
||||
if (!gs_get_gen6_ff(dev, info, &ff))
|
||||
return false;
|
||||
|
||||
thread_count = gs_get_gen6_thread_count(dev, info);
|
||||
|
||||
dw2 = GEN6_THREADDISP_SPF |
|
||||
ff.sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT |
|
||||
ff.surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT;
|
||||
|
||||
dw3 = ff.scratch_space << GEN6_THREADSCRATCH_SPACE_PER_THREAD__SHIFT;
|
||||
|
||||
dw4 = ff.vue_read_len << GEN6_GS_DW4_URB_READ_LEN__SHIFT |
|
||||
ff.vue_read_offset << GEN6_GS_DW4_URB_READ_OFFSET__SHIFT |
|
||||
ff.grf_start << GEN6_GS_DW4_URB_GRF_START__SHIFT;
|
||||
|
||||
dw5 = thread_count << GEN6_GS_DW5_MAX_THREADS__SHIFT;
|
||||
|
||||
if (info->stats_enable)
|
||||
dw5 |= GEN6_GS_DW5_STATISTICS;
|
||||
if (sol->stats_enable)
|
||||
dw5 |= GEN6_GS_DW5_SO_STATISTICS;
|
||||
if (!sol->render_disable)
|
||||
dw5 |= GEN6_GS_DW5_RENDER_ENABLE;
|
||||
|
||||
dw6 = 0;
|
||||
|
||||
/* GEN7_REORDER_TRAILING is handled by the kernel */
|
||||
if (sol->tristrip_reorder == GEN7_REORDER_LEADING)
|
||||
dw6 |= GEN6_GS_DW6_REORDER_LEADING_ENABLE;
|
||||
|
||||
if (sol->sol_enable) {
|
||||
dw6 |= GEN6_GS_DW6_SVBI_PAYLOAD_ENABLE;
|
||||
|
||||
if (sol->svbi_post_inc) {
|
||||
dw6 |= GEN6_GS_DW6_SVBI_POST_INC_ENABLE |
|
||||
sol->svbi_post_inc << GEN6_GS_DW6_SVBI_POST_INC_VAL__SHIFT;
|
||||
}
|
||||
}
|
||||
|
||||
if (info->dispatch_enable)
|
||||
dw6 |= GEN6_GS_DW6_GS_ENABLE;
|
||||
|
||||
STATIC_ASSERT(ARRAY_SIZE(gs->gs) >= 5);
|
||||
gs->gs[0] = dw2;
|
||||
gs->gs[1] = dw3;
|
||||
gs->gs[2] = dw4;
|
||||
gs->gs[3] = dw5;
|
||||
gs->gs[4] = dw6;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
gs_get_gen7_vertex_size(const struct ilo_dev *dev,
|
||||
const struct ilo_state_gs_info *info)
|
||||
{
|
||||
const struct ilo_state_shader_urb_info *urb = &info->urb;
|
||||
|
||||
ILO_DEV_ASSERT(dev, 7, 8);
|
||||
|
||||
return (urb->output_attr_count) ? urb->output_attr_count - 1 : 0;
|
||||
}
|
||||
|
||||
static bool
|
||||
gs_set_gen7_3DSTATE_GS(struct ilo_state_gs *gs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_gs_info *info)
|
||||
{
|
||||
struct vertex_ff ff;
|
||||
uint16_t thread_count;
|
||||
uint8_t vertex_size;
|
||||
uint32_t dw2, dw3, dw4, dw5;
|
||||
|
||||
ILO_DEV_ASSERT(dev, 7, 8);
|
||||
|
||||
if (!gs_get_gen6_ff(dev, info, &ff))
|
||||
return false;
|
||||
|
||||
thread_count = gs_get_gen6_thread_count(dev, info);
|
||||
vertex_size = gs_get_gen7_vertex_size(dev, info);
|
||||
|
||||
dw2 = ff.sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT |
|
||||
ff.surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT;
|
||||
|
||||
if (ilo_dev_gen(dev) >= ILO_GEN(7.5) && ff.has_uav)
|
||||
dw2 |= GEN75_THREADDISP_ACCESS_UAV;
|
||||
|
||||
dw3 = ff.scratch_space << GEN6_THREADSCRATCH_SPACE_PER_THREAD__SHIFT;
|
||||
|
||||
dw4 = vertex_size << GEN7_GS_DW4_OUTPUT_SIZE__SHIFT |
|
||||
0 << GEN7_GS_DW4_OUTPUT_TOPO__SHIFT |
|
||||
ff.vue_read_len << GEN7_GS_DW4_URB_READ_LEN__SHIFT |
|
||||
GEN7_GS_DW4_INCLUDE_VERTEX_HANDLES |
|
||||
ff.vue_read_offset << GEN7_GS_DW4_URB_READ_OFFSET__SHIFT |
|
||||
ff.grf_start << GEN7_GS_DW4_URB_GRF_START__SHIFT;
|
||||
|
||||
dw5 = 0;
|
||||
|
||||
if (ilo_dev_gen(dev) >= ILO_GEN(7.5))
|
||||
dw5 = thread_count << GEN75_GS_DW5_MAX_THREADS__SHIFT;
|
||||
else
|
||||
dw5 = thread_count << GEN7_GS_DW5_MAX_THREADS__SHIFT;
|
||||
|
||||
if (info->stats_enable)
|
||||
dw5 |= GEN7_GS_DW5_STATISTICS;
|
||||
if (info->dispatch_enable)
|
||||
dw5 |= GEN7_GS_DW5_GS_ENABLE;
|
||||
|
||||
STATIC_ASSERT(ARRAY_SIZE(gs->gs) >= 5);
|
||||
gs->gs[0] = dw2;
|
||||
gs->gs[1] = dw3;
|
||||
gs->gs[2] = dw4;
|
||||
gs->gs[3] = dw5;
|
||||
|
||||
if (ilo_dev_gen(dev) >= ILO_GEN(8))
|
||||
gs->gs[4] = ff.user_clip_enables << GEN8_GS_DW9_UCP_CLIP_ENABLES__SHIFT;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_vs_init(struct ilo_state_vs *vs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_vs_info *info)
|
||||
{
|
||||
bool ret = true;
|
||||
|
||||
assert(ilo_is_zeroed(vs, sizeof(*vs)));
|
||||
|
||||
ret &= vs_set_gen6_3DSTATE_VS(vs, dev, info);
|
||||
|
||||
assert(ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_vs_init_disabled(struct ilo_state_vs *vs,
|
||||
const struct ilo_dev *dev)
|
||||
{
|
||||
struct ilo_state_vs_info info;
|
||||
|
||||
memset(&info, 0, sizeof(info));
|
||||
|
||||
return ilo_state_vs_init(vs, dev, &info);
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_hs_init(struct ilo_state_hs *hs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_hs_info *info)
|
||||
{
|
||||
bool ret = true;
|
||||
|
||||
assert(ilo_is_zeroed(hs, sizeof(*hs)));
|
||||
|
||||
if (ilo_dev_gen(dev) >= ILO_GEN(7))
|
||||
ret &= hs_set_gen7_3DSTATE_HS(hs, dev, info);
|
||||
|
||||
assert(ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_hs_init_disabled(struct ilo_state_hs *hs,
|
||||
const struct ilo_dev *dev)
|
||||
{
|
||||
struct ilo_state_hs_info info;
|
||||
|
||||
memset(&info, 0, sizeof(info));
|
||||
|
||||
return ilo_state_hs_init(hs, dev, &info);
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_ds_init(struct ilo_state_ds *ds,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_ds_info *info)
|
||||
{
|
||||
bool ret = true;
|
||||
|
||||
assert(ilo_is_zeroed(ds, sizeof(*ds)));
|
||||
|
||||
if (ilo_dev_gen(dev) >= ILO_GEN(7)) {
|
||||
ret &= ds_set_gen7_3DSTATE_TE(ds, dev, info);
|
||||
ret &= ds_set_gen7_3DSTATE_DS(ds, dev, info);
|
||||
}
|
||||
|
||||
assert(ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_ds_init_disabled(struct ilo_state_ds *ds,
|
||||
const struct ilo_dev *dev)
|
||||
{
|
||||
struct ilo_state_ds_info info;
|
||||
|
||||
memset(&info, 0, sizeof(info));
|
||||
|
||||
return ilo_state_ds_init(ds, dev, &info);
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_gs_init(struct ilo_state_gs *gs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_gs_info *info)
|
||||
{
|
||||
bool ret = true;
|
||||
|
||||
assert(ilo_is_zeroed(gs, sizeof(*gs)));
|
||||
|
||||
if (ilo_dev_gen(dev) >= ILO_GEN(7))
|
||||
ret &= gs_set_gen7_3DSTATE_GS(gs, dev, info);
|
||||
else
|
||||
ret &= gs_set_gen6_3DSTATE_GS(gs, dev, info);
|
||||
|
||||
assert(ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool
|
||||
ilo_state_gs_init_disabled(struct ilo_state_gs *gs,
|
||||
const struct ilo_dev *dev)
|
||||
{
|
||||
struct ilo_state_gs_info info;
|
||||
|
||||
memset(&info, 0, sizeof(info));
|
||||
|
||||
return ilo_state_gs_init(gs, dev, &info);
|
||||
}
|
||||
180
src/gallium/drivers/ilo/core/ilo_state_shader.h
Normal file
180
src/gallium/drivers/ilo/core/ilo_state_shader.h
Normal file
|
|
@ -0,0 +1,180 @@
|
|||
/*
|
||||
* Mesa 3-D graphics library
|
||||
*
|
||||
* Copyright (C) 2015 LunarG, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Chia-I Wu <olv@lunarg.com>
|
||||
*/
|
||||
|
||||
#ifndef ILO_STATE_SHADER_H
|
||||
#define ILO_STATE_SHADER_H
|
||||
|
||||
#include "genhw/genhw.h"
|
||||
|
||||
#include "ilo_core.h"
|
||||
#include "ilo_dev.h"
|
||||
|
||||
/**
|
||||
* Kernel information.
|
||||
*/
|
||||
struct ilo_state_shader_kernel_info {
|
||||
/* usually 0 unless the shader has multiple kernels */
|
||||
uint32_t offset;
|
||||
|
||||
uint8_t grf_start;
|
||||
uint8_t pcb_attr_count;
|
||||
|
||||
uint32_t scratch_size;
|
||||
};
|
||||
|
||||
/**
|
||||
* Shader resources.
|
||||
*/
|
||||
struct ilo_state_shader_resource_info {
|
||||
/* for prefetches */
|
||||
uint8_t sampler_count;
|
||||
uint8_t surface_count;
|
||||
|
||||
bool has_uav;
|
||||
};
|
||||
|
||||
/**
|
||||
* URB inputs/outputs.
|
||||
*/
|
||||
struct ilo_state_shader_urb_info {
|
||||
uint8_t cv_input_attr_count;
|
||||
|
||||
uint8_t read_base;
|
||||
uint8_t read_count;
|
||||
|
||||
uint8_t output_attr_count;
|
||||
|
||||
uint8_t user_cull_enables;
|
||||
uint8_t user_clip_enables;
|
||||
};
|
||||
|
||||
struct ilo_state_vs_info {
|
||||
struct ilo_state_shader_kernel_info kernel;
|
||||
struct ilo_state_shader_resource_info resource;
|
||||
struct ilo_state_shader_urb_info urb;
|
||||
|
||||
bool dispatch_enable;
|
||||
bool stats_enable;
|
||||
};
|
||||
|
||||
struct ilo_state_hs_info {
|
||||
struct ilo_state_shader_kernel_info kernel;
|
||||
struct ilo_state_shader_resource_info resource;
|
||||
struct ilo_state_shader_urb_info urb;
|
||||
|
||||
bool dispatch_enable;
|
||||
bool stats_enable;
|
||||
};
|
||||
|
||||
struct ilo_state_ds_info {
|
||||
struct ilo_state_shader_kernel_info kernel;
|
||||
struct ilo_state_shader_resource_info resource;
|
||||
struct ilo_state_shader_urb_info urb;
|
||||
|
||||
bool dispatch_enable;
|
||||
bool stats_enable;
|
||||
};
|
||||
|
||||
/**
|
||||
* Stream output. Must be consistent with ilo_state_sol_info.
|
||||
*/
|
||||
struct ilo_state_gs_sol_info {
|
||||
bool sol_enable;
|
||||
bool stats_enable;
|
||||
bool render_disable;
|
||||
|
||||
uint16_t svbi_post_inc;
|
||||
|
||||
enum gen_reorder_mode tristrip_reorder;
|
||||
};
|
||||
|
||||
struct ilo_state_gs_info {
|
||||
struct ilo_state_shader_kernel_info kernel;
|
||||
struct ilo_state_shader_resource_info resource;
|
||||
struct ilo_state_shader_urb_info urb;
|
||||
|
||||
struct ilo_state_gs_sol_info sol;
|
||||
|
||||
bool dispatch_enable;
|
||||
bool stats_enable;
|
||||
};
|
||||
|
||||
struct ilo_state_vs {
|
||||
uint32_t vs[5];
|
||||
};
|
||||
|
||||
struct ilo_state_hs {
|
||||
uint32_t hs[4];
|
||||
};
|
||||
|
||||
struct ilo_state_ds {
|
||||
uint32_t te[3];
|
||||
uint32_t ds[5];
|
||||
};
|
||||
|
||||
struct ilo_state_gs {
|
||||
uint32_t gs[5];
|
||||
};
|
||||
|
||||
bool
|
||||
ilo_state_vs_init(struct ilo_state_vs *vs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_vs_info *info);
|
||||
|
||||
bool
|
||||
ilo_state_vs_init_disabled(struct ilo_state_vs *vs,
|
||||
const struct ilo_dev *dev);
|
||||
|
||||
bool
|
||||
ilo_state_hs_init(struct ilo_state_hs *hs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_hs_info *info);
|
||||
|
||||
bool
|
||||
ilo_state_hs_init_disabled(struct ilo_state_hs *hs,
|
||||
const struct ilo_dev *dev);
|
||||
|
||||
|
||||
bool
|
||||
ilo_state_ds_init(struct ilo_state_ds *ds,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_ds_info *info);
|
||||
|
||||
bool
|
||||
ilo_state_ds_init_disabled(struct ilo_state_ds *ds,
|
||||
const struct ilo_dev *dev);
|
||||
|
||||
bool
|
||||
ilo_state_gs_init(struct ilo_state_gs *gs,
|
||||
const struct ilo_dev *dev,
|
||||
const struct ilo_state_gs_info *info);
|
||||
|
||||
bool
|
||||
ilo_state_gs_init_disabled(struct ilo_state_gs *gs,
|
||||
const struct ilo_dev *dev);
|
||||
|
||||
#endif /* ILO_STATE_SHADER_H */
|
||||
Loading…
Add table
Reference in a new issue