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radeon/vcn: correct target buffer pitch calculation

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since the way should be as same as UVD

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
This commit is contained in:
Leo Liu 2017-08-21 11:50:38 -04:00
parent e29ccaac29
commit df6c087a38
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/radeon/radeon_vcn_dec.c
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@ -631,7 +631,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
decode->db_pitch = align(dec->base.width, 32);
decode->db_surf_tile_config = 0;
decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.bpe;;
decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
decode->dt_uv_pitch = decode->dt_pitch / 2;
decode->dt_tiling_mode = 0;