diff --git a/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif.h b/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif.h
index 0477a5059d2..43f72d06b12 100644
--- a/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif.h
+++ b/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif.h
@@ -194,8 +194,8 @@ struct rogue_fwif_cmd_ta {
     */
    struct rogue_fwif_cmd_ta_3d_shared cmd_shared;
 
-   struct rogue_fwif_ta_regs ALIGN(8) geom_regs;
-   uint32_t ALIGN(8) flags;
+   struct rogue_fwif_ta_regs ALIGN_ATTR(8) geom_regs;
+   uint32_t ALIGN_ATTR(8) flags;
    /**
     * Holds the TA/3D fence value to allow the 3D partial render command
     * to go through.
@@ -218,7 +218,7 @@ static_assert(
 struct rogue_fwif_3d_regs {
    /**
     * All 32 bit values should be added in the top section. This then requires
-    * only a single ALIGN(8) to align all the 64 bit values in the second
+    * only a single ALIGN_ATTR(8) to align all the 64 bit values in the second
     * section.
     */
    uint32_t usc_pixel_output_ctrl;
@@ -255,8 +255,8 @@ struct rogue_fwif_3d_regs {
     */
    /* uint32_t isp_oclqry_stride; */
 
-   /* All values below the ALIGN(8) must be 64 bit. */
-   uint64_t ALIGN(8) isp_scissor_base;
+   /* All values below the ALIGN_ATTR(8) must be 64 bit. */
+   uint64_t ALIGN_ATTR(8) isp_scissor_base;
    uint64_t isp_dbias_base;
    uint64_t isp_oclqry_base;
    uint64_t isp_zlsctl;
@@ -293,9 +293,9 @@ struct rogue_fwif_cmd_3d {
     * This region must be the first member so Kernel can easily access it.
     * For more info, see rogue_fwif_cmd_ta_3d_shared definition.
     */
-   struct rogue_fwif_cmd_ta_3d_shared ALIGN(8) cmd_shared;
+   struct rogue_fwif_cmd_ta_3d_shared ALIGN_ATTR(8) cmd_shared;
 
-   struct rogue_fwif_3d_regs ALIGN(8) regs;
+   struct rogue_fwif_3d_regs ALIGN_ATTR(8) regs;
    /** command control flags. */
    uint32_t flags;
    /** Stride IN BYTES for Z-Buffer in case of RTAs. */
@@ -321,7 +321,7 @@ static_assert(
 struct rogue_fwif_transfer_regs {
    /**
     * All 32 bit values should be added in the top section. This then requires
-    * only a single ALIGN(8) to align all the 8 byte values in the second
+    * only a single ALIGN_ATTR(8) to align all the 8 byte values in the second
     * section.
     */
    uint32_t isp_bgobjvals;
@@ -349,8 +349,8 @@ struct rogue_fwif_transfer_regs {
     * layout. Commenting out for now as it's not supported by 4.V.2.51.
     */
    /* uint32_t frag_screen; */
-   /** All values below the RGXFW_ALIGN must be 64 bit. */
-   uint64_t ALIGN(8) pds_bgnd0_base;
+   /** All values below the ALIGN_ATTR must be 64 bit. */
+   uint64_t ALIGN_ATTR(8) pds_bgnd0_base;
    uint64_t pds_bgnd1_base;
    uint64_t pds_bgnd3_sizeinfo;
 
@@ -368,8 +368,8 @@ struct rogue_fwif_transfer_regs {
  * ROGUE_FWIF_CCB_CMD_TYPE_TQ_3D type client CCB command.
  */
 struct rogue_fwif_cmd_transfer {
-   struct rogue_fwif_cmd_common ALIGN(8) cmn;
-   struct rogue_fwif_transfer_regs ALIGN(8) regs;
+   struct rogue_fwif_cmd_common ALIGN_ATTR(8) cmn;
+   struct rogue_fwif_transfer_regs ALIGN_ATTR(8) regs;
 
    uint32_t flags;
 };
@@ -394,8 +394,8 @@ struct rogue_fwif_2d_regs {
 };
 
 struct rogue_fwif_cmd_2d {
-   struct rogue_fwif_cmd_common ALIGN(8) cmn;
-   struct rogue_fwif_2d_regs ALIGN(8) regs;
+   struct rogue_fwif_cmd_common ALIGN_ATTR(8) cmn;
+   struct rogue_fwif_2d_regs ALIGN_ATTR(8) regs;
 
    uint32_t flags;
 };
@@ -410,7 +410,7 @@ static_assert(
 
 /** Command to handle aborts. */
 struct rogue_fwif_cmd_abort {
-   struct rogue_fwif_cmd_ta_3d_shared ALIGN(8) cmd_shared;
+   struct rogue_fwif_cmd_ta_3d_shared ALIGN_ATTR(8) cmd_shared;
 };
 
 /***********************************************
@@ -456,9 +456,9 @@ struct rogue_fwif_cdm_regs {
  * Rouge Compute command.
  */
 struct rogue_fwif_cmd_compute {
-   struct rogue_fwif_cmd_common ALIGN(8) cmn;
-   struct rogue_fwif_cdm_regs ALIGN(8) regs;
-   uint32_t ALIGN(8) flags;
+   struct rogue_fwif_cmd_common ALIGN_ATTR(8) cmn;
+   struct rogue_fwif_cdm_regs ALIGN_ATTR(8) regs;
+   uint32_t ALIGN_ATTR(8) flags;
 
    /* FIXME: HIGH: RGX_FEATURE_GPU_MULTICORE_SUPPORT changes the structure's
     * layout. Commenting out for now as it's not supported by 4.V.2.51.
diff --git a/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_rf.h b/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_rf.h
index e8573e26455..c406c5d7d10 100644
--- a/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_rf.h
+++ b/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_rf.h
@@ -40,7 +40,7 @@ struct rogue_fwif_rf_regs {
 
 struct rogue_fwif_rf_cmd {
    /* THIS MUST BE THE LAST MEMBER OF THE CONTAINING STRUCTURE */
-   struct rogue_fwif_rf_regs ALIGN(8) regs;
+   struct rogue_fwif_rf_regs ALIGN_ATTR(8) regs;
 };
 
 #endif /* PVR_ROGUE_FWIF_RF_H */
diff --git a/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_shared.h b/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_shared.h
index f5d98ca707a..47bf7376657 100644
--- a/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_shared.h
+++ b/src/imagination/vulkan/winsys/pvrsrvkm/fw-api/pvr_rogue_fwif_shared.h
@@ -27,7 +27,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#define ALIGN(x) __attribute__((aligned(x)))
+#define ALIGN_ATTR(x) __attribute__((aligned(x)))
 
 /** Indicates the number of RTDATAs per RTDATASET. */
 #define ROGUE_FWIF_NUM_RTDATAS 2U
@@ -61,9 +61,9 @@ struct rogue_fwif_dev_addr {
 };
 
 struct rogue_fwif_dma_addr {
-   uint64_t ALIGN(8) dev_vaddr;
+   uint64_t ALIGN_ATTR(8) dev_vaddr;
    struct rogue_fwif_dev_addr fw_addr;
-} ALIGN(8);
+} ALIGN_ATTR(8);
 
 /**
  * \brief Command data for fence & update types Client CCB commands.
@@ -81,7 +81,7 @@ struct rogue_fwif_cleanup_ctl {
 
    /** Number of commands executed by the FW. */
    uint32_t executed_cmds;
-} ALIGN(8);
+} ALIGN_ATTR(8);
 
 #define ROGUE_FWIF_PRBUFFER_START 0U
 #define ROGUE_FWIF_PRBUFFER_ZSBUFFER 0U
@@ -102,14 +102,14 @@ struct rogue_fwif_prbuffer {
    /** Buffer ID. */
    uint32_t buffer_id;
    /** Needs on-demand Z/S/MSAA buffer allocation. */
-   bool ALIGN(4) on_demand;
+   bool ALIGN_ATTR(4) on_demand;
    /** Z/S/MSAA - Buffer state. */
    enum rogue_fwif_prbuffer_state state;
    /** Cleanup state. */
    struct rogue_fwif_cleanup_ctl cleanup_state;
    /** Compatibility and other flags. */
    uint32_t pr_buffer_flags;
-} ALIGN(8);
+} ALIGN_ATTR(8);
 
 /**
  * Used to share frame numbers across UM-KM-FW,
@@ -180,7 +180,7 @@ struct rogue_fwif_cccb_ctl {
 
    /** Offset wrapping mask, total capacity in bytes of the CCB-1. */
    uint32_t wrap_mask;
-} ALIGN(8);
+} ALIGN_ATTR(8);
 
 #define ROGUE_FW_LOCAL_FREELIST 0U
 #define ROGUE_FW_GLOBAL_FREELIST 1U
@@ -242,7 +242,7 @@ struct rogue_fwif_cdm_regs_cswitch {
 struct rogue_fwif_static_rendercontext_state {
    /** Geom registers for ctx switch. */
    struct rogue_fwif_ta_regs_cswitch
-      ALIGN(8) ctx_switch_geom_regs[ROGUE_NUM_GEOM_CORES];
+      ALIGN_ATTR(8) ctx_switch_geom_regs[ROGUE_NUM_GEOM_CORES];
 };
 
 #define ROGUE_FWIF_STATIC_RENDERCONTEXT_SIZE \
@@ -250,7 +250,7 @@ struct rogue_fwif_static_rendercontext_state {
 
 struct rogue_fwif_static_computecontext_state {
    /** CDM registers for ctx switch. */
-   struct rogue_fwif_cdm_regs_cswitch ALIGN(8) ctx_switch_regs;
+   struct rogue_fwif_cdm_regs_cswitch ALIGN_ATTR(8) ctx_switch_regs;
 };
 
 #define ROGUE_FWIF_STATIC_COMPUTECONTEXT_SIZE \