fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 00:58:05 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

i965: Make the dummy fragment shader work in SIMD16 mode.

Browse source 
If you're resorting to the dummy shader, you've probably already turned
off SIMD16 mode.  But if you didn't, it would die in a fire.

We could either fail to compile in SIMD16 mode...or just fix it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke 2012-02-18 13:08:29 -08:00
parent 393b42240f
commit df5963c256
1 changed files with 7 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -1800,16 +1800,18 @@ fs_visitor::emit(fs_inst inst)
void
fs_visitor::emit_dummy_fs()
{
int reg_width = c->dispatch_width / 8;
/* Everyone's favorite color. */
emit(BRW_OPCODE_MOV, fs_reg(MRF, 2), fs_reg(1.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 3), fs_reg(0.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 4), fs_reg(1.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 5), fs_reg(0.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 0 * reg_width), fs_reg(1.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 1 * reg_width), fs_reg(0.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 2 * reg_width), fs_reg(1.0f));
emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 3 * reg_width), fs_reg(0.0f));
fs_inst *write;
write = emit(FS_OPCODE_FB_WRITE, fs_reg(0), fs_reg(0));
write->base_mrf = 2;
write->mlen = 4;
write->mlen = 4 * reg_width;
write->eot = true;
}