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radv/amdgpu: rework growing a CS with the chained IB path slightly
This should allow us to use cs_finalize(). Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
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c11a62a7b0
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1 changed files with 13 additions and 5 deletions
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@ -344,10 +344,18 @@ radv_amdgpu_cs_grow(struct radeon_cmdbuf *_cs, size_t min_size)
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uint32_t nop_packet = get_nop_packet(cs);
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if (cs->use_ib) {
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/* Ensure that with the 4 dword reservation we subtract from max_dw we always
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* have 4 nops at the end for chaining.
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*/
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while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask) != ib_pad_dw_mask - 3)
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radeon_emit_unchecked(&cs->base, nop_packet);
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*cs->ib_size_ptr |= cs->base.cdw + 4;
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radeon_emit_unchecked(&cs->base, nop_packet);
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radeon_emit_unchecked(&cs->base, nop_packet);
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radeon_emit_unchecked(&cs->base, nop_packet);
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radeon_emit_unchecked(&cs->base, nop_packet);
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*cs->ib_size_ptr |= cs->base.cdw;
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} else {
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/* Pad the CS with NOP packets. */
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while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask))
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@ -384,10 +392,10 @@ radv_amdgpu_cs_grow(struct radeon_cmdbuf *_cs, size_t min_size)
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cs->ws->base.cs_add_buffer(&cs->base, cs->ib_buffer);
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if (cs->use_ib) {
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radeon_emit_unchecked(&cs->base, PKT3(PKT3_INDIRECT_BUFFER, 2, 0));
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radeon_emit_unchecked(&cs->base, radv_amdgpu_winsys_bo(cs->ib_buffer)->base.va);
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radeon_emit_unchecked(&cs->base, radv_amdgpu_winsys_bo(cs->ib_buffer)->base.va >> 32);
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radeon_emit_unchecked(&cs->base, S_3F2_CHAIN(1) | S_3F2_VALID(1));
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cs->base.buf[cs->base.cdw - 4] = PKT3(PKT3_INDIRECT_BUFFER, 2, 0);
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cs->base.buf[cs->base.cdw - 3] = radv_amdgpu_winsys_bo(cs->ib_buffer)->base.va;
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cs->base.buf[cs->base.cdw - 2] = radv_amdgpu_winsys_bo(cs->ib_buffer)->base.va >> 32;
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cs->base.buf[cs->base.cdw - 1] = S_3F2_CHAIN(1) | S_3F2_VALID(1);
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cs->ib_size_ptr = cs->base.buf + cs->base.cdw - 1;
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}
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