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nak: Fix OpCCtl encoding on Maxwell

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381>
This commit is contained in:
Faith Ekstrand 2024-07-25 10:48:26 -05:00 • committed by Marge Bot
parent 940e52ad15
commit dee02cf220
3 changed files with 28 additions and 17 deletions
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20
src/nouveau/compiler/nak/ir.rs
View file

@ -5011,26 +5011,33 @@ impl DisplayOp for OpLdTram {
impl_display_for_op!(OpLdTram);
#[allow(dead_code)]
#[derive(Copy, Clone, Debug)]
pub enum CCtlOp {
Qry1, // Only available pre-Volta
PF1,
PF1_5, // Only available pre-Volta
PF2,
WB,
IV,
IVAll,
RS,
IVAllP,
WBAll,
WBAllP,
RSLB, // Only available pre-Volta
IVAllP, // Only available on Volta+
WBAll, // Only available on Volta+
WBAllP, // Only available on Volta+
}
impl CCtlOp {
pub fn is_all(&self) -> bool {
match self {
CCtlOp::PF1
CCtlOp::Qry1
| CCtlOp::PF1
| CCtlOp::PF1_5
| CCtlOp::PF2
| CCtlOp::WB
| CCtlOp::IV
| CCtlOp::RS => false,
| CCtlOp::RS
| CCtlOp::RSLB => false,
CCtlOp::IVAll | CCtlOp::IVAllP | CCtlOp::WBAll | CCtlOp::WBAllP => {
true
}
@ -5041,12 +5048,15 @@ impl CCtlOp {
impl fmt::Display for CCtlOp {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
match self {
CCtlOp::Qry1 => write!(f, "qry1"),
CCtlOp::PF1 => write!(f, "pf1"),
CCtlOp::PF1_5 => write!(f, "pf1.5"),
CCtlOp::PF2 => write!(f, "pf2"),
CCtlOp::WB => write!(f, "wb"),
CCtlOp::IV => write!(f, "iv"),
CCtlOp::IVAll => write!(f, "ivall"),
CCtlOp::RS => write!(f, "rs"),
CCtlOp::RSLB => write!(f, "rslb"),
CCtlOp::IVAllP => write!(f, "ivallp"),
CCtlOp::WBAll => write!(f, "wball"),
CCtlOp::WBAllP => write!(f, "wballp"),

24
src/nouveau/compiler/nak/sm50.rs
View file

@ -2647,6 +2647,8 @@ impl SM50Op for OpCCtl {
MemSpace::Global(addr_type) => {
e.set_opcode(0xef60);
assert!(self.addr_offset % 4 == 0);
e.set_field(22..52, self.addr_offset / 4);
e.set_field(
52..53,
match addr_type {
@ -2654,9 +2656,6 @@ impl SM50Op for OpCCtl {
MemAddrType::A64 => 1_u8,
},
);
assert!(self.addr_offset % 4 == 0);
e.set_field(22..52, self.addr_offset / 4);
}
MemSpace::Local => panic!("cctl does not support local"),
MemSpace::Shared => {
@ -2670,15 +2669,16 @@ impl SM50Op for OpCCtl {
e.set_field(
0..4,
match self.op {
CCtlOp::PF1 => 0_u8,
CCtlOp::PF2 => 1_u8,
CCtlOp::WB => 2_u8,
CCtlOp::IV => 3_u8,
CCtlOp::IVAll => 4_u8,
CCtlOp::RS => 5_u8,
CCtlOp::IVAllP => 6_u8,
CCtlOp::WBAll => 7_u8,
CCtlOp::WBAllP => 8_u8,
CCtlOp::Qry1 => 0_u8,
CCtlOp::PF1 => 1_u8,
CCtlOp::PF1_5 => 2_u8,
CCtlOp::PF2 => 3_u8,
CCtlOp::WB => 4_u8,
CCtlOp::IV => 5_u8,
CCtlOp::IVAll => 6_u8,
CCtlOp::RS => 7_u8,
CCtlOp::RSLB => 7_u8,
op => panic!("Unsupported cache control {op:?}"),
},
);
e.set_reg_src(8..16, self.addr);

1
src/nouveau/compiler/nak/sm70.rs
View file

@ -3004,6 +3004,7 @@ impl SM70Op for OpCCtl {
CCtlOp::IVAllP => 6_u8,
CCtlOp::WBAll => 7_u8,
CCtlOp::WBAllP => 8_u8,
op => panic!("Unsupported cache control {op:?}"),
},
);
}