fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 08:50:13 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

intel: Update all NIR_PASS_V to NIR_PASS

Browse source 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35889>
This commit is contained in:
jhananit 2025-06-24 20:09:00 +00:00 • committed by Marge Bot
parent 1a050a57e4
commit debd903a00
11 changed files with 64 additions and 55 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/intel/blorp/blorp_brw.c
View file

@ -134,7 +134,7 @@ blorp_compile_cs_brw(struct blorp_context *blorp, void *mem_ctx,
brw_preprocess_nir(compiler, nir, &opts);
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, type_size_scalar_bytes,
NIR_PASS(_, nir, nir_lower_io, nir_var_uniform, type_size_scalar_bytes,
(nir_lower_io_options)0);
STATIC_ASSERT(offsetof(struct blorp_wm_inputs, subgroup_id) + 4 ==
@ -146,9 +146,9 @@ blorp_compile_cs_brw(struct blorp_context *blorp, void *mem_ctx,
cs_prog_data->base.nr_params = nr_params;
cs_prog_data->base.param = rzalloc_array(NULL, uint32_t, nr_params);
NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, compiler->devinfo,
NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics, compiler->devinfo,
cs_prog_data);
NIR_PASS_V(nir, nir_shader_intrinsics_pass, lower_base_workgroup_id,
NIR_PASS(_, nir, nir_shader_intrinsics_pass, lower_base_workgroup_id,
nir_metadata_control_flow, NULL);
struct brw_cs_prog_key cs_key;

6
src/intel/blorp/blorp_elk.c
View file

@ -142,7 +142,7 @@ blorp_compile_cs_elk(struct blorp_context *blorp, void *mem_ctx,
elk_preprocess_nir(compiler, nir, &opts);
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, elk_type_size_scalar_bytes,
NIR_PASS(_, nir, nir_lower_io, nir_var_uniform, elk_type_size_scalar_bytes,
(nir_lower_io_options)0);
STATIC_ASSERT(offsetof(struct blorp_wm_inputs, subgroup_id) + 4 ==
@ -154,9 +154,9 @@ blorp_compile_cs_elk(struct blorp_context *blorp, void *mem_ctx,
cs_prog_data->base.nr_params = nr_params;
cs_prog_data->base.param = rzalloc_array(NULL, uint32_t, nr_params);
NIR_PASS_V(nir, elk_nir_lower_cs_intrinsics, compiler->devinfo,
NIR_PASS(_, nir, elk_nir_lower_cs_intrinsics, compiler->devinfo,
cs_prog_data);
NIR_PASS_V(nir, nir_shader_intrinsics_pass, lower_base_workgroup_id,
NIR_PASS(_, nir, nir_shader_intrinsics_pass, lower_base_workgroup_id,
nir_metadata_control_flow, NULL);
struct elk_cs_prog_key cs_key;

5
src/intel/compiler/brw_compile_mesh.cpp
View file

@ -772,7 +772,7 @@ brw_nir_lower_mue_outputs(nir_shader *nir, const struct brw_mue_map *map)
remap_io_to_dwords, nir_metadata_control_flow, NULL);
}
static void
static bool
brw_nir_initialize_mue(nir_shader *nir,
const struct brw_mue_map *map,
unsigned dispatch_width)
@ -852,6 +852,7 @@ brw_nir_initialize_mue(nir_shader *nir,
} else {
nir_progress(true, entrypoint, nir_metadata_control_flow);
}
return true;
}
static void
@ -1241,7 +1242,7 @@ brw_compile_mesh(const struct brw_compiler *compiler,
* fields, so let's initialize everything.
*/
if (prog_data->map.has_per_primitive_header)
NIR_PASS_V(shader, brw_nir_initialize_mue, &prog_data->map, dispatch_width);
NIR_PASS(_, shader, brw_nir_initialize_mue, &prog_data->map, dispatch_width);
brw_nir_apply_key(shader, compiler, &key->base, dispatch_width);

38
src/intel/compiler/brw_kernel.c
View file

@ -314,18 +314,18 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
nir_print_shader(nir, stderr);
}
NIR_PASS_V(nir, implement_intel_builtins);
NIR_PASS_V(nir, nir_link_shader_functions, spirv_options.clc_shader);
NIR_PASS(_, nir, implement_intel_builtins);
NIR_PASS(_, nir, nir_link_shader_functions, spirv_options.clc_shader);
/* We have to lower away local constant initializers right before we
* inline functions. That way they get properly initialized at the top
* of the function and not at the top of its caller.
*/
NIR_PASS_V(nir, nir_lower_variable_initializers, nir_var_function_temp);
NIR_PASS_V(nir, nir_lower_returns);
NIR_PASS_V(nir, nir_inline_functions);
NIR_PASS_V(nir, nir_copy_prop);
NIR_PASS_V(nir, nir_opt_deref);
NIR_PASS(_, nir, nir_lower_variable_initializers, nir_var_function_temp);
NIR_PASS(_, nir, nir_lower_returns);
NIR_PASS(_, nir, nir_inline_functions);
NIR_PASS(_, nir, nir_copy_prop);
NIR_PASS(_, nir, nir_opt_deref);
/* Pick off the single entrypoint that we want */
nir_remove_non_entrypoints(nir);
@ -335,14 +335,14 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
* nir_remove_dead_variables and split_per_member_structs below see the
* corresponding stores.
*/
NIR_PASS_V(nir, nir_lower_variable_initializers, ~0);
NIR_PASS(_, nir, nir_lower_variable_initializers, ~0);
/* LLVM loves take advantage of the fact that vec3s in OpenCL are 16B
* aligned and so it can just read/write them as vec4s. This results in a
* LOT of vec4->vec3 casts on loads and stores. One solution to this
* problem is to get rid of all vec3 variables.
*/
NIR_PASS_V(nir, nir_lower_vec3_to_vec4,
NIR_PASS(_, nir, nir_lower_vec3_to_vec4,
nir_var_shader_temp | nir_var_function_temp |
nir_var_mem_shared | nir_var_mem_global|
nir_var_mem_constant);
@ -350,7 +350,7 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
/* We assign explicit types early so that the optimizer can take advantage
* of that information and hopefully get rid of some of our memcpys.
*/
NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
NIR_PASS(_, nir, nir_lower_vars_to_explicit_types,
nir_var_uniform |
nir_var_shader_temp | nir_var_function_temp |
nir_var_mem_shared | nir_var_mem_global,
@ -384,7 +384,7 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
args[var->data.location] = arg_desc;
}
NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_all, NULL);
NIR_PASS(_, nir, nir_remove_dead_variables, nir_var_all, NULL);
/* Lower again, this time after dead-variables to get more compact variable
* layouts.
@ -392,7 +392,7 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
nir->global_mem_size = 0;
nir->scratch_size = 0;
nir->info.shared_size = 0;
NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
NIR_PASS(_, nir, nir_lower_vars_to_explicit_types,
nir_var_shader_temp | nir_var_function_temp |
nir_var_mem_shared | nir_var_mem_global | nir_var_mem_constant,
glsl_get_cl_type_size_align);
@ -414,23 +414,23 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
nir_print_shader(nir, stderr);
}
NIR_PASS_V(nir, nir_lower_memcpy);
NIR_PASS(_, nir, nir_lower_memcpy);
NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_constant,
NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_constant,
nir_address_format_64bit_global);
NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_uniform,
NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_uniform,
nir_address_format_32bit_offset_as_64bit);
NIR_PASS_V(nir, nir_lower_explicit_io,
NIR_PASS(_, nir, nir_lower_explicit_io,
nir_var_shader_temp | nir_var_function_temp |
nir_var_mem_shared | nir_var_mem_global,
nir_address_format_62bit_generic);
NIR_PASS_V(nir, nir_lower_convert_alu_types, NULL);
NIR_PASS(_, nir, nir_lower_convert_alu_types, NULL);
NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, devinfo, NULL);
NIR_PASS_V(nir, lower_kernel_intrinsics);
NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics, devinfo, NULL);
NIR_PASS(_, nir, lower_kernel_intrinsics);
struct brw_cs_prog_key key = { };

4
src/intel/compiler/brw_nir.c
View file

@ -1574,7 +1574,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
if (producer->info.stage == MESA_SHADER_TESS_CTRL &&
producer->options->vectorize_tess_levels)
NIR_PASS_V(producer, nir_lower_tess_level_array_vars_to_vec);
NIR_PASS(_, producer, nir_lower_tess_level_array_vars_to_vec);
NIR_PASS(_, producer, nir_opt_combine_stores, nir_var_shader_out);
NIR_PASS(_, consumer, nir_opt_vectorize_io_vars, nir_var_shader_in);
@ -1592,7 +1592,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
* between whole workgroup, possibly using multiple HW threads). For
* those write-mask in output is handled by I/O lowering.
*/
NIR_PASS_V(producer, nir_lower_io_vars_to_temporaries,
NIR_PASS(_, producer, nir_lower_io_vars_to_temporaries,
nir_shader_get_entrypoint(producer), true, false);
NIR_PASS(_, producer, nir_lower_global_vars_to_local);
NIR_PASS(_, producer, nir_split_var_copies);

5
src/intel/compiler/brw_nir_lower_intersection_shader.c
View file

@ -145,7 +145,7 @@ build_accept_ray(nir_builder *b)
nir_accept_ray_intersection(b);
}
void
bool
brw_nir_lower_intersection_shader(nir_shader *intersection,
const nir_shader *any_hit,
const struct intel_device_info *devinfo)
@ -156,7 +156,7 @@ brw_nir_lower_intersection_shader(nir_shader *intersection,
struct hash_table *any_hit_var_remap = NULL;
if (any_hit) {
nir_shader *any_hit_tmp = nir_shader_clone(dead_ctx, any_hit);
NIR_PASS_V(any_hit_tmp, nir_opt_dce);
NIR_PASS(_, any_hit_tmp, nir_opt_dce);
any_hit_impl = lower_any_hit_for_intersection(any_hit_tmp);
any_hit_var_remap = _mesa_pointer_hash_table_create(dead_ctx);
}
@ -314,4 +314,5 @@ brw_nir_lower_intersection_shader(nir_shader *intersection,
nir_index_ssa_defs(impl);
ralloc_free(dead_ctx);
return true;
}

9
src/intel/compiler/brw_nir_lower_rt_intrinsics.c
View file

@ -62,7 +62,7 @@ build_leaf_is_procedural(nir_builder *b, struct brw_nir_rt_mem_hit_defs *hit)
}
}
static void
static bool
lower_rt_intrinsics_impl(nir_function_impl *impl,
const struct brw_base_prog_key *key,
const struct intel_device_info *devinfo)
@ -390,6 +390,7 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
nir_progress(true, impl,
progress ? nir_metadata_none : (nir_metadata_control_flow));
return progress;
}
/** Lower ray-tracing system values and intrinsics
@ -414,12 +415,14 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
* argument pointer system values for BTD dispatch: btd_local_arg_addr and
* btd_global_arg_addr.
*/
void
bool
brw_nir_lower_rt_intrinsics(nir_shader *nir,
const struct brw_base_prog_key *key,
const struct intel_device_info *devinfo)
{
bool progress = false;
nir_foreach_function_impl(impl, nir) {
lower_rt_intrinsics_impl(impl, key, devinfo);
progress |= lower_rt_intrinsics_impl(impl, key, devinfo);
}
return progress;
}

8
src/intel/compiler/brw_nir_lower_shader_calls.c
View file

@ -45,7 +45,7 @@ no_load_scratch_base_ptr_intrinsic(nir_shader *shader)
}
/** Insert the appropriate return instruction at the end of the shader */
void
bool
brw_nir_lower_shader_returns(nir_shader *shader)
{
nir_function_impl *impl = nir_shader_get_entrypoint(shader);
@ -113,11 +113,15 @@ brw_nir_lower_shader_returns(nir_shader *shader)
break;
default:
{
unreachable("Invalid callable shader stage");
return false;
}
}
}
nir_progress(true, impl, nir_metadata_control_flow);
return true;
}
static void
@ -331,7 +335,7 @@ brw_nir_create_trivial_return_shader(const struct brw_compiler *compiler,
ralloc_steal(mem_ctx, b->shader);
nir_shader *nir = b->shader;
NIR_PASS_V(nir, brw_nir_lower_shader_returns);
NIR_PASS(_, nir, brw_nir_lower_shader_returns);
return nir;
}

28
src/intel/compiler/brw_nir_rt.c
View file

@ -200,19 +200,19 @@ lower_rt_io_and_scratch(nir_shader *nir, const struct intel_device_info *devinfo
* these are shader-internal and don't come in from outside, they don't
* have an explicit memory layout and we have to assign them one.
*/
NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
NIR_PASS(_, nir, nir_lower_vars_to_explicit_types,
nir_var_function_temp |
nir_var_shader_call_data |
nir_var_ray_hit_attrib,
glsl_get_natural_size_align_bytes);
/* Now patch any derefs to I/O vars */
NIR_PASS_V(nir, lower_rt_io_derefs, devinfo);
NIR_PASS(_, nir, lower_rt_io_derefs, devinfo);
/* Finally, lower any remaining function_temp, mem_constant, or
* ray_hit_attrib access to 64-bit global memory access.
*/
NIR_PASS_V(nir, nir_lower_explicit_io,
NIR_PASS(_, nir, nir_lower_explicit_io,
nir_var_function_temp |
nir_var_mem_constant |
nir_var_ray_hit_attrib,
@ -343,7 +343,7 @@ void
brw_nir_lower_raygen(nir_shader *nir, const struct intel_device_info *devinfo)
{
assert(nir->info.stage == MESA_SHADER_RAYGEN);
NIR_PASS_V(nir, brw_nir_lower_shader_returns);
NIR_PASS(_, nir, brw_nir_lower_shader_returns);
lower_rt_io_and_scratch(nir, devinfo);
}
@ -351,8 +351,8 @@ void
brw_nir_lower_any_hit(nir_shader *nir, const struct intel_device_info *devinfo)
{
assert(nir->info.stage == MESA_SHADER_ANY_HIT);
NIR_PASS_V(nir, brw_nir_lower_shader_returns);
NIR_PASS_V(nir, lower_ray_walk_intrinsics, devinfo);
NIR_PASS(_, nir, brw_nir_lower_shader_returns);
NIR_PASS(_, nir, lower_ray_walk_intrinsics, devinfo);
lower_rt_io_and_scratch(nir, devinfo);
}
@ -360,7 +360,7 @@ void
brw_nir_lower_closest_hit(nir_shader *nir, const struct intel_device_info *devinfo)
{
assert(nir->info.stage == MESA_SHADER_CLOSEST_HIT);
NIR_PASS_V(nir, brw_nir_lower_shader_returns);
NIR_PASS(_, nir, brw_nir_lower_shader_returns);
lower_rt_io_and_scratch(nir, devinfo);
}
@ -368,7 +368,7 @@ void
brw_nir_lower_miss(nir_shader *nir, const struct intel_device_info *devinfo)
{
assert(nir->info.stage == MESA_SHADER_MISS);
NIR_PASS_V(nir, brw_nir_lower_shader_returns);
NIR_PASS(_, nir, brw_nir_lower_shader_returns);
lower_rt_io_and_scratch(nir, devinfo);
}
@ -376,7 +376,7 @@ void
brw_nir_lower_callable(nir_shader *nir, const struct intel_device_info *devinfo)
{
assert(nir->info.stage == MESA_SHADER_CALLABLE);
NIR_PASS_V(nir, brw_nir_lower_shader_returns);
NIR_PASS(_, nir, brw_nir_lower_shader_returns);
lower_rt_io_and_scratch(nir, devinfo);
}
@ -387,10 +387,10 @@ brw_nir_lower_combined_intersection_any_hit(nir_shader *intersection,
{
assert(intersection->info.stage == MESA_SHADER_INTERSECTION);
assert(any_hit == NULL || any_hit->info.stage == MESA_SHADER_ANY_HIT);
NIR_PASS_V(intersection, brw_nir_lower_shader_returns);
NIR_PASS_V(intersection, brw_nir_lower_intersection_shader,
NIR_PASS(_, intersection, brw_nir_lower_shader_returns);
NIR_PASS(_, intersection, brw_nir_lower_intersection_shader,
any_hit, devinfo);
NIR_PASS_V(intersection, lower_ray_walk_intrinsics, devinfo);
NIR_PASS(_, intersection, lower_ray_walk_intrinsics, devinfo);
lower_rt_io_and_scratch(intersection, devinfo);
}
@ -495,7 +495,7 @@ brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler,
brw_preprocess_nir(compiler, nir, &opts);
struct brw_cs_prog_key key = {};
NIR_PASS_V(nir, brw_nir_lower_rt_intrinsics, &key.base, devinfo);
NIR_PASS(_, nir, brw_nir_lower_rt_intrinsics, &key.base, devinfo);
b = nir_builder_create(nir_shader_get_entrypoint(b.shader));
/* brw_nir_lower_rt_intrinsics will leave us with a btd_global_arg_addr
@ -519,7 +519,7 @@ brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler,
}
}
NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics, devinfo, NULL);
NIR_PASS(_, nir, brw_nir_lower_cs_intrinsics, devinfo, NULL);
brw_nir_optimize(nir, devinfo);

6
src/intel/compiler/brw_nir_rt.h
View file

@ -60,17 +60,17 @@ struct brw_nir_lower_shader_calls_state {
bool brw_nir_lower_ray_queries(nir_shader *shader,
const struct intel_device_info *devinfo);
void brw_nir_lower_shader_returns(nir_shader *shader);
bool brw_nir_lower_shader_returns(nir_shader *shader);
bool brw_nir_lower_shader_calls(nir_shader *shader,
struct brw_nir_lower_shader_calls_state *state);
bool brw_nir_lower_rt_intrinsics_pre_trace(nir_shader *nir);
void brw_nir_lower_rt_intrinsics(nir_shader *shader,
bool brw_nir_lower_rt_intrinsics(nir_shader *shader,
const struct brw_base_prog_key *key,
const struct intel_device_info *devinfo);
void brw_nir_lower_intersection_shader(nir_shader *intersection,
bool brw_nir_lower_intersection_shader(nir_shader *intersection,
const nir_shader *any_hit,
const struct intel_device_info *devinfo);

4
src/intel/compiler/elk/elk_nir.c
View file

@ -1196,7 +1196,7 @@ elk_nir_link_shaders(const struct elk_compiler *compiler,
if (producer->info.stage == MESA_SHADER_TESS_CTRL &&
producer->options->vectorize_tess_levels)
NIR_PASS_V(producer, nir_lower_tess_level_array_vars_to_vec);
NIR_PASS(_, producer, nir_lower_tess_level_array_vars_to_vec);
NIR_PASS(_, producer, nir_opt_combine_stores, nir_var_shader_out);
NIR_PASS(_, consumer, nir_opt_vectorize_io_vars, nir_var_shader_in);
@ -1208,7 +1208,7 @@ elk_nir_link_shaders(const struct elk_compiler *compiler,
* in turn, creates temporary variables and extra copy_deref intrinsics
* that we need to clean up.
*/
NIR_PASS_V(producer, nir_lower_io_vars_to_temporaries,
NIR_PASS(_, producer, nir_lower_io_vars_to_temporaries,
nir_shader_get_entrypoint(producer), true, false);
NIR_PASS(_, producer, nir_lower_global_vars_to_local);
NIR_PASS(_, producer, nir_split_var_copies);