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radeonsi: adjust PIPE_SHADER_CAP_MAX_CONSTS

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So it matches what we really can do.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Christian König 2012-08-31 13:59:14 +02:00
parent 8758183f0a
commit de7d3825a0
2 changed files with 2 additions and 5 deletions
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4
src/gallium/drivers/radeonsi/radeonsi_pipe.c
View file

@ -450,9 +450,9 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
/* FIXME Isn't this equal to TEMPS? */
return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONSTS:
return R600_MAX_CONST_BUFFER_SIZE;
return 64;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return R600_MAX_CONST_BUFFERS;
return 1;
case PIPE_SHADER_CAP_MAX_PREDS:
return 0; /* FIXME */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:

3
src/gallium/drivers/radeonsi/radeonsi_pipe.h
View file

@ -41,9 +41,6 @@
#include "r600_resource.h"
#include "sid.h"
#define R600_MAX_CONST_BUFFERS 1
#define R600_MAX_CONST_BUFFER_SIZE 4096
#ifdef PIPE_ARCH_BIG_ENDIAN
#define R600_BIG_ENDIAN 1
#else