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anv: WA 16014538804 for DG2, MTL A0
Send empty/dummy PIPE_CONTROL after every third 3DPRIMITIVE command. Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25039>
This commit is contained in:
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1da1bcd038
commit
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5 changed files with 108 additions and 59 deletions
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@ -179,10 +179,11 @@ void genX(cmd_emit_timestamp)(struct anv_batch *batch,
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enum anv_timestamp_capture_type type,
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void *data);
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void genX(batch_emit_dummy_post_sync_op)(struct anv_batch *batch,
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struct anv_device *device,
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uint32_t primitive_topology,
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uint32_t vertex_count);
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void
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genX(batch_emit_post_3dprimitive_was)(struct anv_batch *batch,
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const struct anv_device *device,
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uint32_t primitive_topology,
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uint32_t vertex_count);
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VkPolygonMode
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genX(raster_polygon_mode)(struct anv_graphics_pipeline *pipeline,
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@ -1965,6 +1965,11 @@ struct anv_batch {
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VkResult status;
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enum intel_engine_class engine_class;
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/**
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* Number of 3DPRIMITIVE's emitted for WA 16014538804
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*/
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uint8_t num_3d_primitives_emitted;
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};
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void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
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@ -87,15 +87,6 @@ convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) {
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fprintf(stdout, ") reason: %s\n", reason); \
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}
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ALWAYS_INLINE static void
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genX(emit_dummy_post_sync_op)(struct anv_cmd_buffer *cmd_buffer,
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uint32_t vertex_count)
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{
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genX(batch_emit_dummy_post_sync_op)(&cmd_buffer->batch, cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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vertex_count);
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}
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void
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genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
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{
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@ -3595,6 +3586,8 @@ genX(CmdExecuteCommands)(
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{
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ANV_FROM_HANDLE(anv_cmd_buffer, container, commandBuffer);
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struct anv_device *device = container->device;
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if (anv_batch_has_error(&container->batch))
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return;
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@ -3642,7 +3635,7 @@ genX(CmdExecuteCommands)(
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* regardless of conditional rendering being enabled in container.
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*/
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struct mi_builder b;
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mi_builder_init(&b, container->device->info, &container->batch);
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mi_builder_init(&b, device->info, &container->batch);
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mi_store(&b, mi_reg64(ANV_PREDICATE_RESULT_REG),
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mi_imm(UINT64_MAX));
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}
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@ -3660,9 +3653,9 @@ genX(CmdExecuteCommands)(
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genX(cmd_buffer_so_memcpy)(
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container,
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anv_state_pool_state_address(&container->device->internal_surface_state_pool,
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anv_state_pool_state_address(&device->internal_surface_state_pool,
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dst_state),
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anv_state_pool_state_address(&container->device->internal_surface_state_pool,
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anv_state_pool_state_address(&device->internal_surface_state_pool,
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src_state),
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src_state.alloc_size);
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}
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@ -3704,6 +3697,11 @@ genX(CmdExecuteCommands)(
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"Secondary cmd buffer not tracked in VF cache");
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}
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#if INTEL_NEEDS_WA_16014538804
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if (intel_needs_workaround(device->info, 16014538804))
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anv_batch_emit(&container->batch, GENX(PIPE_CONTROL), pc);
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#endif
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/* The secondary may have selected a different pipeline (3D or compute) and
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* may have changed the current L3$ configuration. Reset our tracking
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* variables to invalid values to ensure that we re-emit these in the case
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@ -3716,7 +3714,7 @@ genX(CmdExecuteCommands)(
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container->state.gfx.push_constant_stages = 0;
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container->state.gfx.ds_write_state = false;
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memcpy(container->state.gfx.dyn_state.dirty,
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container->device->gfx_dirty_state,
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device->gfx_dirty_state,
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sizeof(container->state.gfx.dyn_state.dirty));
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/* Each of the secondary command buffers will use its own state base
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@ -3729,7 +3727,6 @@ genX(CmdExecuteCommands)(
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genX(cmd_buffer_emit_state_base_address)(container);
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/* Copy of utrace timestamp buffers from secondary into container */
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struct anv_device *device = container->device;
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if (u_trace_enabled(&device->ds.trace_context)) {
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trace_intel_begin_trace_copy(&container->trace);
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@ -4246,12 +4243,12 @@ void genX(CmdDraw)(
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#endif
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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vertexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer, vertexCount);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
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trace_intel_end_draw(&cmd_buffer->trace, count);
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@ -4304,6 +4301,12 @@ void genX(CmdDrawMultiEXT)(
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prim.BaseVertexLocation = 0;
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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drawCount == 0 ? 0 :
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pVertexInfo[drawCount - 1].vertexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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trace_intel_end_draw_multi(&cmd_buffer->trace, count);
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}
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@ -4342,16 +4345,17 @@ void genX(CmdDrawMultiEXT)(
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prim.ExtendedParameter2 = i;
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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drawCount == 0 ? 0 :
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pVertexInfo[drawCount - 1].vertexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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trace_intel_end_draw_multi(&cmd_buffer->trace, count);
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}
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#endif
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer,
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drawCount == 0 ? 0 :
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pVertexInfo[drawCount - 1].vertexCount);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
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}
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@ -4416,12 +4420,12 @@ void genX(CmdDrawIndexed)(
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#endif
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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indexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer, indexCount);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, RANDOM);
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trace_intel_end_draw_indexed(&cmd_buffer->trace, count);
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@ -4489,6 +4493,13 @@ void genX(CmdDrawMultiIndexedEXT)(
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prim.StartInstanceLocation = firstInstance;
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prim.BaseVertexLocation = *pVertexOffset;
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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drawCount == 0 ? 0 :
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pIndexInfo[drawCount - 1].indexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device,
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false);
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trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
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@ -4524,6 +4535,13 @@ void genX(CmdDrawMultiIndexedEXT)(
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prim.StartInstanceLocation = firstInstance;
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prim.BaseVertexLocation = *pVertexOffset;
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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drawCount == 0 ? 0 :
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pIndexInfo[drawCount - 1].indexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device,
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false);
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trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
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@ -4554,6 +4572,13 @@ void genX(CmdDrawMultiIndexedEXT)(
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prim.StartInstanceLocation = firstInstance;
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prim.BaseVertexLocation = draw->vertexOffset;
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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drawCount == 0 ? 0 :
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pIndexInfo[drawCount - 1].indexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
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}
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@ -4594,16 +4619,18 @@ void genX(CmdDrawMultiIndexedEXT)(
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prim.ExtendedParameter1 = firstInstance;
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prim.ExtendedParameter2 = i;
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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drawCount == 0 ? 0 :
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pIndexInfo[drawCount - 1].indexCount);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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trace_intel_end_draw_indexed_multi(&cmd_buffer->trace, count);
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}
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#endif
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer,
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drawCount == 0 ? 0 :
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pIndexInfo[drawCount - 1].indexCount);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, RANDOM);
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}
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@ -4717,10 +4744,11 @@ void genX(CmdDrawIndirectByteCountEXT)(
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#endif
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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1);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer, 1);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
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@ -4849,10 +4877,12 @@ emit_indirect_draws(struct anv_cmd_buffer *cmd_buffer,
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#endif
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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1);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer, 1);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer,
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indexed ? RANDOM : SEQUENTIAL);
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@ -5076,10 +5106,11 @@ emit_indirect_count_draws(struct anv_cmd_buffer *cmd_buffer,
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#endif
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}
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genX(batch_emit_post_3dprimitive_was)(&cmd_buffer->batch,
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cmd_buffer->device,
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cmd_buffer->state.gfx.primitive_topology,
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1);
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genX(emit_breakpoint)(&cmd_buffer->batch, cmd_buffer->device, false);
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#if GFX_VERx10 == 125
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genX(emit_dummy_post_sync_op)(cmd_buffer, 1);
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#endif
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update_dirty_vbs_for_gfx8_vb_flush(cmd_buffer, SEQUENTIAL);
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}
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@ -8189,15 +8220,14 @@ void genX(cmd_emit_timestamp)(struct anv_batch *batch,
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}
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void
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genX(batch_emit_dummy_post_sync_op)(struct anv_batch *batch,
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struct anv_device *device,
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uint32_t primitive_topology,
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uint32_t vertex_count)
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genX(batch_emit_post_3dprimitive_was)(struct anv_batch *batch,
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const struct anv_device *device,
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uint32_t primitive_topology,
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uint32_t vertex_count)
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{
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if (!intel_needs_workaround(device->info, 22014412737))
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return;
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if ((primitive_topology == _3DPRIM_POINTLIST ||
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#if INTEL_NEEDS_WA_22014412737 || INTEL_NEEDS_WA_16014538804
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if (intel_needs_workaround(device->info, 22014412737) &&
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(primitive_topology == _3DPRIM_POINTLIST ||
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primitive_topology == _3DPRIM_LINELIST ||
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primitive_topology == _3DPRIM_LINESTRIP ||
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primitive_topology == _3DPRIM_LINELIST_ADJ ||
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@ -8212,7 +8242,20 @@ genX(batch_emit_dummy_post_sync_op)(struct anv_batch *batch,
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(batch, device->info, 0, WriteImmediateData,
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device->workaround_address, 0, 0);
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/* Reset counter because we just emitted a PC */
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batch->num_3d_primitives_emitted = 0;
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} else if (intel_needs_workaround(device->info, 16014538804)) {
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batch->num_3d_primitives_emitted++;
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/* WA 16014538804:
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* After every 3 3D_Primitive command,
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* atleast 1 pipe_control must be inserted.
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*/
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if (batch->num_3d_primitives_emitted == 3) {
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anv_batch_emit(batch, GENX(PIPE_CONTROL), pc);
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batch->num_3d_primitives_emitted = 0;
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}
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}
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#endif
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}
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struct anv_state
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@ -236,12 +236,12 @@ emit_so_memcpy(struct anv_batch *batch, struct anv_device *device,
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prim.StartInstanceLocation = 0;
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prim.BaseVertexLocation = 0;
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}
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genX(emit_breakpoint)(batch, device, false);
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#if GFX_VERx10 == 125
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genX(batch_emit_dummy_post_sync_op)(batch, device, _3DPRIM_POINTLIST,
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size / bs);
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#endif
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genX(batch_emit_post_3dprimitive_was)(batch,
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device,
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_3DPRIM_POINTLIST, size / bs);
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genX(emit_breakpoint)(batch, device, false);
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}
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void
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@ -524,8 +524,8 @@ genX(emit_simple_shader_dispatch)(struct anv_simple_shader *state,
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prim.VertexCountPerInstance = 3;
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prim.InstanceCount = 1;
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}
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genX(batch_emit_post_3dprimitive_was)(batch, device, _3DPRIM_RECTLIST, 3);
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genX(emit_breakpoint)(batch, device, false);
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genX(batch_emit_dummy_post_sync_op)(batch, device, _3DPRIM_RECTLIST, 3);
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} else {
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const struct intel_device_info *devinfo = device->info;
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const struct brw_cs_prog_data *prog_data =
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