From de55fd358fa4b3e3620145c71557090403b8ec6c Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Mon, 29 Nov 2021 23:45:50 -0800 Subject: [PATCH] intel/fs/xehp: Teach SWSB pass about the exec pipeline of FS_OPCODE_PACK_HALF_2x16_SPLIT. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This virtual instruction is translated into multiple half float physical instructions, even though its destination is typically of integer type, which prevents the software scoreboard pass from inferring the correct execution pipeline for the virtual instruction on XeHP+ platforms. Teach the SWSB lowering pass about this inconsistency between the IR and physical instruction types. Fixes among other tests: dEQP-GLES31.functional.shaders.builtin_functions.pack_unpack.packhalf2x16_compute Fixes: d4537770bbf ("intel/fs: Add helper functions inferring sync and exec pipeline of an instruction.") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5685 Reported-by: Tapani Pälli Tested-by: Tapani Pälli Reviewed-by: Matt Turner Reviewed-by: Caio Oliveira Part-of: --- src/intel/compiler/brw_fs_scoreboard.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/compiler/brw_fs_scoreboard.cpp b/src/intel/compiler/brw_fs_scoreboard.cpp index 4176f54c908..7b0d2101cb8 100644 --- a/src/intel/compiler/brw_fs_scoreboard.cpp +++ b/src/intel/compiler/brw_fs_scoreboard.cpp @@ -122,6 +122,8 @@ namespace { else if (inst->opcode == SHADER_OPCODE_BROADCAST && !devinfo->has_64bit_float && type_sz(t) >= 8) return TGL_PIPE_INT; + else if (inst->opcode == FS_OPCODE_PACK_HALF_2x16_SPLIT) + return TGL_PIPE_FLOAT; else if (type_sz(inst->dst.type) >= 8 || type_sz(t) >= 8 || is_dword_multiply) return TGL_PIPE_LONG;