From de32f9275f658b627279a45c14b66a8c231e002e Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Fri, 7 Nov 2025 21:38:36 +0800 Subject: [PATCH] treewide: add & use parent instr helpers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We add a bunch of new helpers to avoid the need to touch >parent_instr, including the full set of: * nir_def_is_* * nir_def_as_*_or_null * nir_def_as_* [assumes the right instr type] * nir_src_is_* * nir_src_as_* * nir_scalar_is_* * nir_scalar_as_* Plus nir_def_instr() where there's no more suitable helper. Also an existing helper is renamed to unify all the names, while we're churning the tree: * nir_src_as_alu_instr -> nir_src_as_alu ..and then we port the tree to use the helpers as much as possible, using nir_def_instr() where that does not work. Acked-by: Marek Olšák --- To eliminate nir_def::parent_instr we need to churn the tree anyway, so I'm taking this opportunity to clean up a lot of NIR patterns. Co-authored-by: Konstantin Seurer Signed-off-by: Alyssa Rosenzweig Part-of: --- .../common/nir/ac_nir_lower_global_access.c | 2 +- .../nir/ac_nir_lower_mem_access_bit_sizes.c | 6 +- src/amd/common/nir/ac_nir_lower_ngg.c | 6 +- src/amd/common/nir/ac_nir_lower_ps_early.c | 2 +- .../common/nir/ac_nir_lower_tess_io_to_mem.c | 2 +- src/amd/common/nir/ac_nir_lower_tex.c | 2 +- src/amd/common/nir/ac_nir_opt_outputs.c | 4 +- .../instruction_selection/aco_select_nir.cpp | 10 +- .../aco_select_nir_intrinsics.cpp | 6 +- .../vulkan/nir/radv_nir_opt_tid_function.c | 8 +- src/asahi/compiler/agx_compile.c | 39 +--- src/asahi/compiler/agx_nir_opt_preamble.c | 9 +- src/asahi/lib/agx_nir_lower_uvs.c | 4 +- src/broadcom/compiler/nir_to_vir.c | 4 +- src/broadcom/compiler/vir.c | 4 +- src/compiler/nir/nir.c | 43 ++-- src/compiler/nir/nir.h | 210 +++++++++++------- src/compiler/nir/nir_builder.h | 8 +- src/compiler/nir/nir_deref.c | 5 +- src/compiler/nir/nir_divergence_analysis.c | 2 +- src/compiler/nir/nir_from_ssa.c | 21 +- src/compiler/nir/nir_gather_output_deps.c | 8 +- src/compiler/nir/nir_inline_uniforms.c | 2 +- src/compiler/nir/nir_instr_set.c | 2 +- src/compiler/nir/nir_legacy.c | 22 +- src/compiler/nir/nir_linking_helpers.c | 10 +- src/compiler/nir/nir_liveness.c | 14 +- src/compiler/nir/nir_loop_analyze.c | 16 +- src/compiler/nir/nir_lower_amul.c | 2 +- .../nir/nir_lower_array_deref_of_vec.c | 2 +- src/compiler/nir/nir_lower_bit_size.c | 4 +- .../nir/nir_lower_const_arrays_to_uniforms.c | 2 +- src/compiler/nir/nir_lower_explicit_io.c | 2 +- src/compiler/nir/nir_lower_flrp.c | 2 +- src/compiler/nir/nir_lower_helper_writes.c | 5 +- .../nir/nir_lower_image_atomics_to_global.c | 6 +- src/compiler/nir/nir_lower_int_to_float.c | 6 +- src/compiler/nir/nir_lower_io.c | 3 +- src/compiler/nir/nir_lower_mediump.c | 2 +- .../nir/nir_lower_non_uniform_access.c | 2 +- src/compiler/nir/nir_lower_phis_to_scalar.c | 2 +- src/compiler/nir/nir_lower_shader_calls.c | 16 +- src/compiler/nir/nir_lower_system_values.c | 4 +- src/compiler/nir/nir_lower_tex.c | 2 +- src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +- src/compiler/nir/nir_lower_vec_to_regs.c | 8 +- src/compiler/nir/nir_mod_analysis.c | 2 +- .../nir/nir_move_vec_src_uses_to_dest.c | 4 +- src/compiler/nir/nir_opt_barycentric.c | 2 +- src/compiler/nir/nir_opt_call.c | 14 +- src/compiler/nir/nir_opt_constant_folding.c | 6 +- src/compiler/nir/nir_opt_copy_prop_vars.c | 2 +- src/compiler/nir/nir_opt_fragdepth.c | 5 +- src/compiler/nir/nir_opt_gcm.c | 16 +- src/compiler/nir/nir_opt_group_loads.c | 10 +- src/compiler/nir/nir_opt_if.c | 20 +- src/compiler/nir/nir_opt_intrinsics.c | 2 +- src/compiler/nir/nir_opt_load_skip_helpers.c | 4 +- .../nir/nir_opt_load_store_vectorize.c | 10 +- src/compiler/nir/nir_opt_loop.c | 2 +- src/compiler/nir/nir_opt_loop_unroll.c | 6 +- src/compiler/nir/nir_opt_move.c | 2 +- .../nir/nir_opt_move_discards_to_top.c | 2 +- src/compiler/nir/nir_opt_move_to_top.c | 4 +- src/compiler/nir/nir_opt_phi_precision.c | 8 +- src/compiler/nir/nir_opt_phi_to_bool.c | 4 +- src/compiler/nir/nir_opt_preamble.c | 2 +- src/compiler/nir/nir_opt_ray_queries.c | 4 +- src/compiler/nir/nir_opt_reassociate.c | 2 +- src/compiler/nir/nir_opt_remove_phis.c | 21 +- src/compiler/nir/nir_opt_shrink_vectors.c | 4 +- src/compiler/nir/nir_opt_sink.c | 2 +- src/compiler/nir/nir_opt_undef.c | 2 +- src/compiler/nir/nir_opt_uniform_atomics.c | 2 +- src/compiler/nir/nir_opt_uub.c | 4 +- src/compiler/nir/nir_opt_varyings.c | 61 +++-- src/compiler/nir/nir_opt_vectorize.c | 12 +- src/compiler/nir/nir_print.c | 6 +- src/compiler/nir/nir_range_analysis.c | 8 +- src/compiler/nir/nir_repair_ssa.c | 2 +- src/compiler/nir/nir_schedule.c | 10 +- src/compiler/nir/nir_search.c | 18 +- src/compiler/nir/nir_search_helpers.h | 8 +- src/compiler/nir/nir_split_vars.c | 2 +- src/compiler/nir/nir_to_lcssa.c | 16 +- src/compiler/nir/nir_trivialize_registers.c | 4 +- src/compiler/nir/nir_unlower_io_to_vars.c | 2 +- src/compiler/nir/nir_validate.c | 7 +- src/compiler/nir/nir_worklist.c | 2 +- src/compiler/nir/tests/core_tests.cpp | 12 +- .../nir/tests/load_store_vectorizer_tests.cpp | 58 ++--- .../nir/tests/nir_opt_varyings_test.h | 2 +- .../nir/tests/range_analysis_tests.cpp | 2 +- src/compiler/nir/tests/vars_tests.cpp | 12 +- src/compiler/rust/nir.rs | 2 +- src/compiler/spirv/tests/non_semantic.cpp | 2 +- src/compiler/spirv/vtn_opencl.c | 2 +- src/compiler/spirv/vtn_variables.c | 2 +- src/freedreno/ir3/ir3_compiler_nir.c | 6 +- src/freedreno/ir3/ir3_nir.h | 2 +- .../ir3/ir3_nir_analyze_ubo_ranges.c | 2 +- src/freedreno/ir3/ir3_nir_lower_io_offsets.c | 2 +- .../ir3/ir3_nir_lower_tex_prefetch.c | 6 +- .../ir3/ir3_nir_move_varying_inputs.c | 4 +- src/freedreno/ir3/ir3_nir_opt_preamble.c | 8 +- .../vulkan/tu_nir_lower_ray_query.cc | 2 +- src/freedreno/vulkan/tu_shader.cc | 4 +- .../auxiliary/gallivm/lp_bld_nir_soa.c | 6 +- src/gallium/auxiliary/nir/nir_to_tgsi.c | 4 +- .../drivers/etnaviv/etnaviv_compiler_nir.c | 10 +- .../drivers/etnaviv/etnaviv_compiler_nir.h | 4 +- .../etnaviv/etnaviv_compiler_nir_liveness.c | 2 +- .../etnaviv/etnaviv_nir_lower_source_mods.c | 2 +- .../drivers/lima/ir/lima_nir_duplicate.c | 10 +- .../drivers/lima/ir/lima_nir_lower_txp.c | 10 +- .../lima/ir/lima_nir_split_load_input.c | 2 +- .../drivers/lima/ir/lima_nir_split_loads.c | 2 +- .../drivers/llvmpipe/lp_state_fs_analysis.c | 8 +- src/gallium/drivers/r300/compiler/nir_to_rc.c | 4 +- src/gallium/drivers/r300/compiler/r300_nir.h | 6 +- .../r300/compiler/r500_nir_lower_fcsel.c | 6 +- src/gallium/drivers/r600/sfn/sfn_nir.cpp | 2 +- src/gallium/drivers/radeonsi/si_nir_optim.c | 2 +- src/gallium/drivers/vc4/vc4_program.c | 4 +- src/gallium/drivers/zink/zink_compiler.c | 2 +- .../zink/zink_lower_cubemap_to_array.c | 2 +- src/gallium/frontends/rusticl/rusticl_nir.c | 2 +- .../pco/pco_nir_lower_null_descriptors.c | 2 +- src/imagination/pco/pco_nir_pvfio.c | 2 +- src/imagination/pco/pco_nir_tex.c | 8 +- src/imagination/pco/pco_nir_vk.c | 2 +- src/intel/compiler/brw/brw_from_nir.cpp | 37 ++- src/intel/compiler/brw/brw_nir.c | 6 +- src/intel/compiler/brw/brw_nir.h | 8 +- .../brw/brw_nir_lower_immediate_offsets.c | 2 +- .../brw/brw_nir_lower_storage_image.c | 8 +- src/intel/compiler/brw/brw_nir_opt_fsat.c | 4 +- src/intel/compiler/elk/elk_fs.cpp | 2 +- src/intel/compiler/elk/elk_fs_nir.cpp | 36 ++- src/intel/compiler/elk/elk_nir.h | 7 +- .../elk/elk_nir_analyze_boolean_resolves.c | 4 +- .../elk/elk_nir_lower_storage_image.c | 3 +- src/intel/compiler/elk/elk_vec4_nir.cpp | 2 +- ..._lower_non_uniform_barycentric_at_sample.c | 8 +- ...tel_nir_lower_non_uniform_resource_intel.c | 8 +- .../compiler/intel_nir_opt_peephole_ffma.c | 11 +- .../intel_nir_opt_peephole_imul32x16.c | 2 +- src/intel/vulkan/anv_nir_lower_multiview.c | 10 +- .../vulkan/anv_nir_push_descriptor_analysis.c | 3 +- src/intel/vulkan/anv_shader_compile.c | 4 +- .../vulkan_hasvk/anv_nir_lower_multiview.c | 6 +- src/kosmickrisp/compiler/msl_type_inference.c | 6 +- src/kosmickrisp/compiler/nir_to_msl.c | 6 +- .../vulkan/kk_nir_lower_textures.c | 2 +- src/microsoft/clc/clc_compiler.c | 2 +- src/microsoft/clc/clc_nir.c | 2 +- src/microsoft/compiler/dxil_nir.c | 2 +- .../compiler/dxil_nir_lower_int_cubemaps.c | 2 +- src/microsoft/compiler/dxil_nir_tess.c | 4 +- src/nouveau/compiler/nak_nir_lower_cmat.c | 2 +- .../compiler/nak_nir_lower_non_uniform_ldcx.c | 8 +- src/nouveau/compiler/nak_nir_lower_tex.c | 2 +- src/panfrost/compiler/bifrost_compile.c | 2 +- src/panfrost/util/pan_lower_noperspective.c | 2 +- 164 files changed, 648 insertions(+), 668 deletions(-) diff --git a/src/amd/common/nir/ac_nir_lower_global_access.c b/src/amd/common/nir/ac_nir_lower_global_access.c index 3ae97df27e5..48d6ec47ca7 100644 --- a/src/amd/common/nir/ac_nir_lower_global_access.c +++ b/src/amd/common/nir/ac_nir_lower_global_access.c @@ -91,7 +91,7 @@ process_instr(nir_builder *b, nir_intrinsic_instr *intrin, void *_) uint64_t off_const = 0; nir_def *offset = NULL; nir_scalar src = {addr_src->ssa, 0}; - b->cursor = nir_after_instr(addr_src->ssa->parent_instr); + b->cursor = nir_after_def(addr_src->ssa); nir_def *addr = try_extract_additions(b, src, &off_const, &offset, false); addr = addr ? addr : addr_src->ssa; diff --git a/src/amd/common/nir/ac_nir_lower_mem_access_bit_sizes.c b/src/amd/common/nir/ac_nir_lower_mem_access_bit_sizes.c index be60ab36359..ba1fd4298b0 100644 --- a/src/amd/common/nir/ac_nir_lower_mem_access_bit_sizes.c +++ b/src/amd/common/nir/ac_nir_lower_mem_access_bit_sizes.c @@ -31,11 +31,11 @@ set_smem_access_flags(nir_builder *b, nir_intrinsic_instr *intrin, void *cb_data return false; case nir_intrinsic_load_ubo: case nir_intrinsic_load_ssbo: - if (intrin->src[0].ssa->parent_instr->block->cf_node.parent->type != nir_cf_node_function) + if (nir_def_block(intrin->src[0].ssa)->cf_node.parent->type != nir_cf_node_function) break; FALLTHROUGH; case nir_intrinsic_load_constant: - intrin->src[0].ssa->parent_instr->pass_flags = 1; + nir_def_instr(intrin->src[0].ssa)->pass_flags = 1; break; default: break; @@ -72,7 +72,7 @@ set_smem_access_flags(nir_builder *b, nir_intrinsic_instr *intrin, void *cb_data nir_intrinsic_set_access(intrin, access | ACCESS_SMEM_AMD); /* Check if this instruction can be executed speculatively. */ - if (intrin->src[0].ssa->parent_instr->pass_flags == 1) + if (nir_def_instr(intrin->src[0].ssa)->pass_flags == 1) nir_intrinsic_set_access(intrin, nir_intrinsic_access(intrin) | ACCESS_CAN_SPECULATE); return access != nir_intrinsic_access(intrin); diff --git a/src/amd/common/nir/ac_nir_lower_ngg.c b/src/amd/common/nir/ac_nir_lower_ngg.c index a9d88166943..cb9cf4a9812 100644 --- a/src/amd/common/nir/ac_nir_lower_ngg.c +++ b/src/amd/common/nir/ac_nir_lower_ngg.c @@ -400,7 +400,7 @@ remove_culling_shader_outputs(nir_shader *culling_shader, lower_ngg_nogs_state * static void replace_scalar_component_uses(nir_builder *b, nir_scalar old, nir_scalar rep) { - if (old.def->parent_instr->type == nir_instr_type_load_const) + if (nir_def_is_const(old.def)) return; assert(old.def->bit_size == rep.def->bit_size); @@ -437,7 +437,7 @@ apply_repacked_pos_output(nir_builder *b, nir_intrinsic_instr *intrin, void *sta for (unsigned comp = 0; comp < store_val->num_components; ++comp) { nir_scalar val = nir_scalar_chase_movs(nir_get_scalar(store_val, comp)); - b->cursor = nir_after_instr_and_phis(val.def->parent_instr); + b->cursor = nir_after_instr_and_phis(nir_def_instr(val.def)); nir_def *reloaded = nir_load_var(b, s->position_value_var); replace_scalar_component_uses(b, val, nir_get_scalar(reloaded, store_pos_component + comp)); @@ -604,7 +604,7 @@ analyze_shader_before_culling_walk(nir_def *ssa, uint8_t flag, lower_ngg_nogs_state *s) { - nir_instr *instr = ssa->parent_instr; + nir_instr *instr = nir_def_instr(ssa); uint8_t old_pass_flags = instr->pass_flags; instr->pass_flags |= flag; diff --git a/src/amd/common/nir/ac_nir_lower_ps_early.c b/src/amd/common/nir/ac_nir_lower_ps_early.c index 5b37474def6..3be0fbb1914 100644 --- a/src/amd/common/nir/ac_nir_lower_ps_early.c +++ b/src/amd/common/nir/ac_nir_lower_ps_early.c @@ -426,7 +426,7 @@ lower_ps_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin, void *state) } if (s->options->ps_iter_samples >= 2 && - sample_id->parent_instr->type == nir_instr_type_intrinsic && + nir_def_is_intrinsic(sample_id) && nir_def_as_intrinsic(sample_id)->intrinsic == nir_intrinsic_load_sample_id) { nir_def_replace(&intrin->def, nir_load_barycentric_sample(b, 32, .interp_mode = mode)); return true; diff --git a/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c b/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c index 390163add50..d8a32efaac5 100644 --- a/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c +++ b/src/amd/common/nir/ac_nir_lower_tess_io_to_mem.c @@ -387,7 +387,7 @@ filter_load_tcs_per_vertex_input(const nir_instr *instr, nir_src *off_src = nir_get_io_offset_src(intrin); nir_src *vertex_index_src = nir_get_io_arrayed_index_src(intrin); - nir_instr *vertex_index_instr = vertex_index_src->ssa->parent_instr; + nir_instr *vertex_index_instr = nir_def_instr(vertex_index_src->ssa); const nir_io_semantics io_sem = nir_intrinsic_io_semantics(intrin); /* If this is accessed via gl_InvocationIndex, don't use LDS if tcs_inputs_via_temp is also set, diff --git a/src/amd/common/nir/ac_nir_lower_tex.c b/src/amd/common/nir/ac_nir_lower_tex.c index 9e4bee75ee8..3d784ff2890 100644 --- a/src/amd/common/nir/ac_nir_lower_tex.c +++ b/src/amd/common/nir/ac_nir_lower_tex.c @@ -230,7 +230,7 @@ static bool can_move_coord(nir_scalar scalar, coord_info *info, nir_block *tople * optimizing nir_texop_txd. Otherwise, we only use nir_strict_wqm_coord_amd * for cases that D3D11 requires. */ - if (txd && nir_block_dominates(scalar.def->parent_instr->block, toplevel_block)) { + if (txd && nir_block_dominates(nir_def_block(scalar.def), toplevel_block)) { info->load = NULL; return true; } diff --git a/src/amd/common/nir/ac_nir_opt_outputs.c b/src/amd/common/nir/ac_nir_opt_outputs.c index 3ae14222633..750982fa8b4 100644 --- a/src/amd/common/nir/ac_nir_opt_outputs.c +++ b/src/amd/common/nir/ac_nir_opt_outputs.c @@ -270,7 +270,7 @@ bool ac_nir_optimize_outputs(nir_shader *nir, bool sprite_tex_disallowed, /* nir_lower_io_to_scalar is required before this */ assert(intr->src[0].ssa->num_components == 1); /* No intrinsic should store undef. */ - assert(intr->src[0].ssa->parent_instr->type != nir_instr_type_undef); + assert(!nir_src_is_undef(intr->src[0])); /* Gather the output. */ struct ac_out_info *out_info = &outputs[sem.location]; @@ -283,7 +283,7 @@ bool ac_nir_optimize_outputs(nir_shader *nir, bool sprite_tex_disallowed, unsigned chan = sem.high_16bits * 4 + nir_intrinsic_component(intr); out_info->chan[chan].store_intr = intr; - out_info->chan[chan].value = intr->src[0].ssa->parent_instr; + out_info->chan[chan].value = nir_def_instr(intr->src[0].ssa); } } diff --git a/src/amd/compiler/instruction_selection/aco_select_nir.cpp b/src/amd/compiler/instruction_selection/aco_select_nir.cpp index 6a95c3dc6e1..06e57b61367 100644 --- a/src/amd/compiler/instruction_selection/aco_select_nir.cpp +++ b/src/amd/compiler/instruction_selection/aco_select_nir.cpp @@ -65,10 +65,8 @@ Temp merged_wave_info_to_mask(isel_context* ctx, unsigned i); void get_const_vec(nir_def* vec, nir_const_value* cv[4]) { - if (vec->parent_instr->type != nir_instr_type_alu) - return; - nir_alu_instr* vec_instr = nir_def_as_alu(vec); - if (vec_instr->op != nir_op_vec(vec->num_components)) + nir_alu_instr* vec_instr = nir_def_as_alu_or_null(vec); + if (!vec_instr || vec_instr->op != nir_op_vec(vec->num_components)) return; for (unsigned i = 0; i < vec->num_components; i++) { @@ -729,9 +727,9 @@ Operand get_phi_operand(isel_context* ctx, nir_def* ssa, RegClass rc) { Temp tmp = get_ssa_temp(ctx, ssa); - if (ssa->parent_instr->type == nir_instr_type_undef) { + if (nir_def_is_undef(ssa)) { return Operand(rc); - } else if (ssa->bit_size == 1 && ssa->parent_instr->type == nir_instr_type_load_const) { + } else if (ssa->bit_size == 1 && nir_def_is_const(ssa)) { bool val = nir_def_as_load_const(ssa)->value[0].b; return Operand::c32_or_c64(val ? -1 : 0, ctx->program->lane_mask == s2); } else { diff --git a/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp b/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp index 132dbe5cb1c..92fee82b7bf 100644 --- a/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp +++ b/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp @@ -1314,7 +1314,8 @@ visit_store_output(isel_context* ctx, nir_intrinsic_instr* instr) if (ls_need_output || ps_need_output) { bool stored_to_temps = store_output_to_temps(ctx, instr); if (!stored_to_temps) { - isel_err(instr->src[1].ssa->parent_instr, "Unimplemented output offset instruction"); + isel_err(nir_def_instr(instr->src[1].ssa), + "Unimplemented output offset instruction"); abort(); } } else { @@ -1459,7 +1460,8 @@ visit_load_fs_input(isel_context* ctx, nir_intrinsic_instr* instr) nir_src offset = *nir_get_io_offset_src(instr); if (!nir_src_is_const(offset) || nir_src_as_uint(offset)) - isel_err(offset.ssa->parent_instr, "Unimplemented non-zero nir_intrinsic_load_input offset"); + isel_err(nir_def_instr(offset.ssa), + "Unimplemented non-zero nir_intrinsic_load_input offset"); Temp prim_mask = get_arg(ctx, ctx->args->prim_mask); diff --git a/src/amd/vulkan/nir/radv_nir_opt_tid_function.c b/src/amd/vulkan/nir/radv_nir_opt_tid_function.c index 68587f36613..7131683cc00 100644 --- a/src/amd/vulkan/nir/radv_nir_opt_tid_function.c +++ b/src/amd/vulkan/nir/radv_nir_opt_tid_function.c @@ -25,7 +25,7 @@ static inline unsigned src_get_fotid_mask(nir_src src) { - return src.ssa->parent_instr->pass_flags; + return nir_def_instr(src.ssa)->pass_flags; } static inline unsigned @@ -437,7 +437,7 @@ opt_fotid_shuffle(nir_builder *b, nir_intrinsic_instr *instr, const radv_nir_opt { if (instr->intrinsic != nir_intrinsic_shuffle) return false; - if (!instr->src[1].ssa->parent_instr->pass_flags) + if (!nir_def_instr(instr->src[1].ssa)->pass_flags) return false; unsigned src_idx = 0; @@ -530,7 +530,7 @@ opt_fotid_bool(nir_builder *b, nir_alu_instr *instr, const radv_nir_opt_tid_func nir_def *ballot = nir_vec(b, ballot_comp, options->hw_ballot_num_comp); nir_def *res = nir_inverse_ballot(b, ballot); - res->parent_instr->pass_flags = 1; + nir_def_instr(res)->pass_flags = 1; nir_def_replace(&instr->def, res); return true; @@ -550,7 +550,7 @@ visit_instr(nir_builder *b, nir_instr *instr, void *params) /* revist shuffles that we skipped previously */ bool progress = false; for (unsigned i = 1; i < 3; i++) { - nir_instr *src_instr = alu->src[i].src.ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(alu->src[i].src.ssa); if (src_instr->type == nir_instr_type_intrinsic) { nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(src_instr); progress |= opt_fotid_shuffle(b, intrin, options, true); diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index f8aea130103..3322aabd450 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -3164,38 +3164,23 @@ agx_optimize_nir(nir_shader *nir, bool soft_fault, uint16_t *preamble_size, * conformant not to, but every app gets this wrong. */ static bool -gather_texcoords(nir_builder *b, nir_instr *instr, void *data) +gather_texcoords(nir_builder *b, nir_tex_instr *tex, void *data) { - uint64_t *mask = data; - - if (instr->type != nir_instr_type_tex) + nir_def *coord = nir_get_tex_src(tex, nir_tex_src_coord); + if (!coord) return false; - nir_tex_instr *tex = nir_instr_as_tex(instr); + nir_scalar x = nir_scalar_resolved(coord, 0); + nir_scalar y = nir_scalar_resolved(coord, 1); + nir_intrinsic_instr *intr = nir_scalar_as_intrinsic(x); - int coord_idx = nir_tex_instr_src_index(tex, nir_tex_src_coord); - if (coord_idx < 0) - return false; + if (x.def == y.def && intr && + intr->intrinsic == nir_intrinsic_load_interpolated_input) { - nir_src src = tex->src[coord_idx].src; - nir_scalar x = nir_scalar_resolved(src.ssa, 0); - nir_scalar y = nir_scalar_resolved(src.ssa, 1); + uint64_t *mask = data; + *mask |= BITFIELD64_BIT(nir_intrinsic_io_semantics(intr).location); + } - if (x.def != y.def) - return false; - - nir_instr *parent = x.def->parent_instr; - - if (parent->type != nir_instr_type_intrinsic) - return false; - - nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent); - - if (intr->intrinsic != nir_intrinsic_load_interpolated_input) - return false; - - nir_io_semantics sem = nir_intrinsic_io_semantics(intr); - *mask |= BITFIELD64_BIT(sem.location); return false; } @@ -3209,7 +3194,7 @@ agx_gather_texcoords(nir_shader *nir) assert(nir->info.stage == MESA_SHADER_FRAGMENT); uint64_t mask = 0; - nir_shader_instructions_pass(nir, gather_texcoords, nir_metadata_all, &mask); + nir_shader_tex_pass(nir, gather_texcoords, nir_metadata_all, &mask); return mask; } diff --git a/src/asahi/compiler/agx_nir_opt_preamble.c b/src/asahi/compiler/agx_nir_opt_preamble.c index 91fbb3721e5..1e73e739342 100644 --- a/src/asahi/compiler/agx_nir_opt_preamble.c +++ b/src/asahi/compiler/agx_nir_opt_preamble.c @@ -16,14 +16,11 @@ static nir_preamble_class preamble_class(nir_def *def) { - nir_instr *instr = def->parent_instr; - if (instr->type != nir_instr_type_intrinsic) + nir_intrinsic_instr *intr = nir_def_as_intrinsic_or_null(def); + if (!intr || (nir_intrinsic_has_desc_set(intr) && + nir_intrinsic_desc_set(intr) >= 32 /* encoding restriction */)) return nir_preamble_class_general; - nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); - if (nir_intrinsic_has_desc_set(intr) && nir_intrinsic_desc_set(intr) >= 32) - return nir_preamble_class_general /* encoding restriction */; - if (intr->intrinsic == nir_intrinsic_bindless_image_agx) return nir_preamble_class_image; else if (intr->intrinsic == nir_intrinsic_bindless_sampler_agx) diff --git a/src/asahi/lib/agx_nir_lower_uvs.c b/src/asahi/lib/agx_nir_lower_uvs.c index ed7ed63b78d..75d3c0d00ca 100644 --- a/src/asahi/lib/agx_nir_lower_uvs.c +++ b/src/asahi/lib/agx_nir_lower_uvs.c @@ -89,11 +89,11 @@ lower(nir_builder *b, nir_intrinsic_instr *intr, void *data) if (sem.location == VARYING_SLOT_LAYER) { assert(ctx->layer == NULL && "only written once"); ctx->layer = value; - ctx->after_layer_viewport = nir_after_instr(index->parent_instr); + ctx->after_layer_viewport = nir_after_def(index); } else if (sem.location == VARYING_SLOT_VIEWPORT) { assert(ctx->viewport == NULL && "only written once"); ctx->viewport = value; - ctx->after_layer_viewport = nir_after_instr(index->parent_instr); + ctx->after_layer_viewport = nir_after_def(index); } else if (sem.location == VARYING_SLOT_CLIP_DIST0 || sem.location == VARYING_SLOT_CLIP_DIST1) { diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c index adff7bff2f5..5c91cb788bd 100644 --- a/src/broadcom/compiler/nir_to_vir.c +++ b/src/broadcom/compiler/nir_to_vir.c @@ -1231,7 +1231,7 @@ ntq_emit_comparison(struct v3d_compile *c, static struct nir_alu_instr * ntq_get_alu_parent(nir_src src) { - if (src.ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_src_is_alu(src)) return NULL; nir_alu_instr *instr = nir_def_as_alu(src.ssa); if (!instr) @@ -3103,7 +3103,7 @@ nir_src_derived_from_reg(nir_src src) if (nir_load_reg_for_def(def)) return true; - nir_instr *parent = def->parent_instr; + nir_instr *parent = nir_def_instr(def); switch (parent->type) { case nir_instr_type_alu: { nir_alu_instr *alu = nir_instr_as_alu(parent); diff --git a/src/broadcom/compiler/vir.c b/src/broadcom/compiler/vir.c index 54b8a2ad2aa..3d0a983157d 100644 --- a/src/broadcom/compiler/vir.c +++ b/src/broadcom/compiler/vir.c @@ -631,7 +631,7 @@ v3d_nir_lower_null_pointers_cb(nir_builder *b, return false; /* Otherwise, see if it comes from a bcsel including a null pointer */ - if (src->ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_def_is_alu(src->ssa)) return false; nir_alu_instr *alu = nir_def_as_alu(src->ssa); @@ -1578,7 +1578,7 @@ v3d_nir_sort_constant_ubo_load(nir_block *block, nir_intrinsic_instr *ref) */ break; } - if (intr->src[1].ssa->parent_instr == tmp) { + if (nir_def_instr(intr->src[1].ssa) == tmp) { offset_inst = tmp; break; } diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index 9a5fde301ac..65201352dfb 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -1392,8 +1392,8 @@ nir_instr_dce_add_dead_srcs_cb(nir_src *src, void *state) nir_instr_worklist *wl = state; list_del(&src->use_link); - if (!nir_instr_free_and_dce_is_live(src->ssa->parent_instr)) - nir_instr_worklist_push_tail(wl, src->ssa->parent_instr); + if (!nir_instr_free_and_dce_is_live(nir_def_instr(src->ssa))) + nir_instr_worklist_push_tail(wl, nir_def_instr(src->ssa)); /* Stop nir_instr_remove from trying to delete the link again. */ src->ssa = NULL; @@ -1543,12 +1543,8 @@ nir_const_value_as_float(nir_const_value value, unsigned bit_size) nir_const_value * nir_src_as_const_value(nir_src src) { - if (src.ssa->parent_instr->type != nir_instr_type_load_const) - return NULL; - - nir_load_const_instr *load = nir_def_as_load_const(src.ssa); - - return load->value; + nir_load_const_instr *load = nir_src_as_load_const(src); + return load ? load->value : NULL; } /** @@ -1562,11 +1558,11 @@ bool nir_src_is_always_uniform(nir_src src) { /* Constants are trivially uniform */ - if (src.ssa->parent_instr->type == nir_instr_type_load_const) + if (nir_src_is_const(src)) return true; - if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) { - nir_intrinsic_instr *intr = nir_def_as_intrinsic(src.ssa); + if (nir_src_is_intrinsic(src)) { + nir_intrinsic_instr *intr = nir_src_as_intrinsic(src); /* As are uniform variables */ if (intr->intrinsic == nir_intrinsic_load_uniform && nir_src_is_always_uniform(intr->src[0])) @@ -1583,8 +1579,8 @@ nir_src_is_always_uniform(nir_src src) } /* Operating together uniform expressions produces a uniform result */ - if (src.ssa->parent_instr->type == nir_instr_type_alu) { - nir_alu_instr *alu = nir_def_as_alu(src.ssa); + if (nir_src_is_alu(src)) { + nir_alu_instr *alu = nir_src_as_alu(src); for (int i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { if (!nir_src_is_always_uniform(alu->src[i].src)) return false; @@ -1747,7 +1743,7 @@ is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between) * want without touching the fixup code. * * This function assumes that after_me is in the same block as - * def->parent_instr and that after_me comes after def->parent_instr. + * nir_def_instr(def) and that after_me comes after nir_def_instr(def). */ void nir_def_rewrite_uses_after_instr(nir_def *def, nir_def *new_ssa, @@ -1758,13 +1754,13 @@ nir_def_rewrite_uses_after_instr(nir_def *def, nir_def *new_ssa, nir_foreach_use_including_if_safe(use_src, def) { if (!nir_src_is_if(use_src)) { - assert(nir_src_parent_instr(use_src) != def->parent_instr); + assert(nir_src_parent_instr(use_src) != nir_def_instr(def)); /* Since def already dominates all of its uses, the only way a use can * not be dominated by after_me is if it is between def and after_me in * the instruction list. */ - if (is_instr_between(def->parent_instr, after_me, nir_src_parent_instr(use_src))) + if (is_instr_between(nir_def_instr(def), after_me, nir_src_parent_instr(use_src))) continue; } @@ -2910,10 +2906,10 @@ nir_binding nir_chase_binding(nir_src rsrc) { nir_binding res = { 0 }; - if (rsrc.ssa->parent_instr->type == nir_instr_type_deref) { + if (nir_src_is_deref(rsrc)) { const struct glsl_type *type = glsl_without_array(nir_src_as_deref(rsrc)->type); bool is_image = glsl_type_is_image(type) || glsl_type_is_sampler(type); - while (rsrc.ssa->parent_instr->type == nir_instr_type_deref) { + while (nir_src_is_deref(rsrc)) { nir_deref_instr *deref = nir_src_as_deref(rsrc); if (deref->deref_type == nir_deref_type_var) { @@ -2939,7 +2935,7 @@ nir_chase_binding(nir_src rsrc) */ unsigned num_components = nir_src_num_components(rsrc); while (true) { - nir_alu_instr *alu = nir_src_as_alu_instr(rsrc); + nir_alu_instr *alu = nir_src_as_alu(rsrc); nir_intrinsic_instr *intrin = nir_src_as_intrinsic(rsrc); if (alu && alu->op == nir_op_mov) { for (unsigned i = 0; i < num_components; i++) { @@ -3048,7 +3044,7 @@ nir_scalar nir_scalar_chase_movs(nir_scalar s) { while (nir_scalar_is_alu(s)) { - nir_alu_instr *alu = nir_def_as_alu(s.def); + nir_alu_instr *alu = nir_scalar_as_alu(s); if (alu->op == nir_op_mov) { s.def = alu->src[0].src.ssa; s.comp = alu->src[0].swizzle[s.comp]; @@ -3831,3 +3827,10 @@ nir_atomic_op_to_alu(nir_atomic_op op) UNREACHABLE("Invalid nir_atomic_op"); } + +const nir_instr * +nir_def_instr_noninline(const nir_def *def) +{ + /* Wrapper for Rust bindgen */ + return nir_def_instr_const(def); +} diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index fe86078939d..7822e3de849 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -1030,12 +1030,6 @@ typedef struct nir_def { bool loop_invariant; } nir_def; -static inline nir_block * -nir_def_block(nir_def *def) -{ - return def->parent_instr->block; -} - typedef struct nir_src { /* Instruction or if-statement that consumes this value as a source. This * should only be accessed through nir_src_* helpers. @@ -1173,24 +1167,6 @@ nir_src_num_components(nir_src src) return src.ssa->num_components; } -static inline bool -nir_src_is_const(nir_src src) -{ - return src.ssa->parent_instr->type == nir_instr_type_load_const; -} - -static inline bool -nir_src_is_undef(nir_src src) -{ - return src.ssa->parent_instr->type == nir_instr_type_undef; -} - -static inline bool -nir_src_is_deref(nir_src src) -{ - return src.ssa->parent_instr->type == nir_instr_type_deref; -} - bool nir_src_is_divergent(nir_src *src); /* Are all components the same, ie. .xxxx */ @@ -2779,6 +2755,69 @@ nir_phi_get_src_from_block(nir_phi_instr *phi, nir_block *block) return NULL; } +const nir_instr *nir_def_instr_noninline(const nir_def *def); + +static inline nir_instr * +nir_def_instr_nonconst(nir_def *def) +{ + static_assert(offsetof(nir_alu_instr, def) == offsetof(nir_undef_instr, def), + "nir_alu_instr: nir_def always has to be at the same offset relative to nir_instr."); + static_assert(offsetof(nir_deref_instr, def) == offsetof(nir_undef_instr, def), + "nir_deref_instr: nir_def always has to be at the same offset relative to nir_instr."); + static_assert(offsetof(nir_tex_instr, def) == offsetof(nir_undef_instr, def), + "nir_tex_instr: nir_def always has to be at the same offset relative to nir_instr."); + static_assert(offsetof(nir_intrinsic_instr, def) == offsetof(nir_undef_instr, def), + "nir_intrinsic_instr: nir_def always has to be at the same offset relative to nir_instr."); + static_assert(offsetof(nir_load_const_instr, def) == offsetof(nir_undef_instr, def), + "nir_load_const_instr: nir_def always has to be at the same offset relative to nir_instr."); + static_assert(offsetof(nir_phi_instr, def) == offsetof(nir_undef_instr, def), + "nir_phi_instr: nir_def always has to be at the same offset relative to nir_instr."); + return &container_of(def, nir_undef_instr, def)->instr; +} + +static inline const nir_instr * +nir_def_instr_const(const nir_def *def) +{ + return (const nir_instr *)nir_def_instr_nonconst((nir_def *)def); +} + +#ifdef __cplusplus +/* Required for function overloading */ +extern "C++" { + +static inline nir_instr * +nir_def_instr(nir_def *def) +{ + return nir_def_instr_nonconst(def); +} + +static inline const nir_instr * +nir_def_instr(const nir_def *def) +{ + return nir_def_instr_const(def); +} +} +#else +/* + * For C we can use _Generic to overload on the constantness properly. + */ +#define nir_def_instr(def) _Generic((def), \ + const nir_def *: nir_def_instr_const, \ + nir_def *: nir_def_instr_nonconst)(def) +#endif + +static inline nir_block * +nir_def_block(nir_def *def) +{ + return nir_def_instr(def)->block; +} + +static inline nir_instr_type +nir_def_instr_type(const nir_def *def) +{ + return nir_def_instr(def)->type; +} + /* This struct contains metadata for correlating the final nir shader * (after many lowering and optimization passes) with the source spir-v * or glsl. To avoid adding unnecessary overhead when the driver does not @@ -2813,6 +2852,11 @@ typedef struct nir_instr_debug_info { nir_instr instr; } nir_instr_debug_info; +typedef struct nir_scalar { + nir_def *def; + unsigned comp; +} nir_scalar; + NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr, type, nir_instr_type_alu) NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr, @@ -2832,18 +2876,49 @@ NIR_DEFINE_CAST(nir_instr_as_undef, nir_instr, nir_undef_instr, instr, NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr, type, nir_instr_type_phi) -#define NIR_DEFINE_DEF_AS_INSTR(type, suffix) \ - static inline type *nir_def_as_##suffix(const nir_def *def) \ - { \ - return nir_instr_as_##suffix(def->parent_instr); \ +#define NIR_DEFINE_DEF_AS_INSTR(instr_type, suffix, cast) \ + static inline instr_type *nir_def_as_##cast(const nir_def *def) \ + { \ + return nir_instr_as_##cast(nir_def_instr(def)); \ + } \ + \ + static inline bool nir_def_is_##suffix(const nir_def *def) \ + { \ + return nir_def_instr(def)->type == nir_instr_type_##cast; \ + } \ + \ + static inline instr_type *nir_def_as_##cast##_or_null(const nir_def *def) \ + { \ + return nir_def_is_##suffix(def) ? nir_def_as_##cast(def) : NULL; \ + } \ + \ + static inline bool nir_src_is_##suffix(nir_src src) \ + { \ + return nir_def_is_##suffix(src.ssa); \ + } \ + \ + static inline bool nir_scalar_is_##suffix(nir_scalar s) \ + { \ + return nir_def_is_##suffix(s.def); \ + } \ + \ + static inline instr_type *nir_src_as_##cast(nir_src src) \ + { \ + return nir_src_is_##suffix(src) ? nir_def_as_##cast(src.ssa) : NULL; \ + } \ + \ + static inline instr_type *nir_scalar_as_##cast(nir_scalar s) \ + { \ + return nir_def_is_##suffix(s.def) ? nir_def_as_##cast(s.def) : NULL; \ } -NIR_DEFINE_DEF_AS_INSTR(nir_alu_instr, alu) -NIR_DEFINE_DEF_AS_INSTR(nir_intrinsic_instr, intrinsic) -NIR_DEFINE_DEF_AS_INSTR(nir_tex_instr, tex) -NIR_DEFINE_DEF_AS_INSTR(nir_phi_instr, phi) -NIR_DEFINE_DEF_AS_INSTR(nir_deref_instr, deref) -NIR_DEFINE_DEF_AS_INSTR(nir_load_const_instr, load_const) +NIR_DEFINE_DEF_AS_INSTR(nir_alu_instr, alu, alu) +NIR_DEFINE_DEF_AS_INSTR(nir_intrinsic_instr, intrinsic, intrinsic) +NIR_DEFINE_DEF_AS_INSTR(nir_tex_instr, tex, tex) +NIR_DEFINE_DEF_AS_INSTR(nir_phi_instr, phi, phi) +NIR_DEFINE_DEF_AS_INSTR(nir_deref_instr, deref, deref) +NIR_DEFINE_DEF_AS_INSTR(nir_load_const_instr, const, load_const) +NIR_DEFINE_DEF_AS_INSTR(nir_undef_instr, undef, undef) #undef NIR_DEFINE_DEF_AS_INSTR @@ -2873,28 +2948,11 @@ NIR_DEFINE_SRC_AS_CONST(double, float) #undef NIR_DEFINE_SRC_AS_CONST -typedef struct nir_scalar { - nir_def *def; - unsigned comp; -} nir_scalar; - -static inline bool -nir_scalar_is_const(nir_scalar s) -{ - return s.def->parent_instr->type == nir_instr_type_load_const; -} - -static inline bool -nir_scalar_is_undef(nir_scalar s) -{ - return s.def->parent_instr->type == nir_instr_type_undef; -} - static inline nir_const_value nir_scalar_as_const_value(nir_scalar s) { assert(s.comp < s.def->num_components); - nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr); + nir_load_const_instr *load = nir_scalar_as_load_const(s); return load->value[s.comp]; } @@ -2913,24 +2971,12 @@ NIR_DEFINE_SCALAR_AS_CONST(double, float) #undef NIR_DEFINE_SCALAR_AS_CONST -static inline bool -nir_scalar_is_alu(nir_scalar s) -{ - return s.def->parent_instr->type == nir_instr_type_alu; -} - static inline nir_op nir_scalar_alu_op(nir_scalar s) { return nir_def_as_alu(s.def)->op; } -static inline bool -nir_scalar_is_intrinsic(nir_scalar s) -{ - return s.def->parent_instr->type == nir_instr_type_intrinsic; -} - static inline nir_intrinsic_op nir_scalar_intrinsic_op(nir_scalar s) { @@ -2942,7 +2988,7 @@ nir_scalar_chase_alu_src(nir_scalar s, unsigned alu_src_idx) { nir_scalar out = { NULL, 0 }; - nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr); + nir_alu_instr *alu = nir_scalar_as_alu(s); assert(alu_src_idx < nir_op_infos[alu->op].num_inputs); /* Our component must be written */ @@ -4299,6 +4345,18 @@ nir_after_impl(nir_function_impl *impl) return nir_after_cf_list(&impl->body); } +static inline nir_cursor +nir_before_def(nir_def *def) +{ + return nir_before_instr(nir_def_instr(def)); +} + +static inline nir_cursor +nir_after_def(nir_def *def) +{ + return nir_after_instr(nir_def_instr(def)); +} + /** * Insert a NIR instruction at the given cursor. * @@ -4408,20 +4466,6 @@ bool nir_foreach_phi_src_leaving_block(nir_block *instr, nir_const_value *nir_src_as_const_value(nir_src src); -#define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \ - static inline c_type * \ - nir_src_as_##name(nir_src src) \ - { \ - return src.ssa->parent_instr->type == type_enum \ - ? cast_macro(src.ssa->parent_instr) \ - : NULL; \ - } - -NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu) -NIR_SRC_AS_(intrinsic, nir_intrinsic_instr, - nir_instr_type_intrinsic, nir_instr_as_intrinsic) -NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref) - const char *nir_src_as_string(nir_src src); bool nir_src_is_always_uniform(nir_src src); @@ -4495,14 +4539,14 @@ void nir_def_rewrite_uses_after_instr(nir_def *def, nir_def *new_ssa, static inline void nir_def_rewrite_uses_after(nir_def *def, nir_def *new_ssa) { - nir_def_rewrite_uses_after_instr(def, new_ssa, new_ssa->parent_instr); + nir_def_rewrite_uses_after_instr(def, new_ssa, nir_def_instr(new_ssa)); } static inline void nir_def_replace(nir_def *def, nir_def *new_ssa) { nir_def_rewrite_uses(def, new_ssa); - nir_instr_remove(def->parent_instr); + nir_instr_remove(nir_def_instr(def)); } nir_component_mask_t nir_src_components_read(const nir_src *src); @@ -6561,7 +6605,7 @@ nir_static_workgroup_size(const nir_shader *s); static inline nir_intrinsic_instr * nir_reg_get_decl(nir_def *reg) { - assert(reg->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_def_is_intrinsic(reg)); nir_intrinsic_instr *decl = nir_def_as_intrinsic(reg); assert(decl->intrinsic == nir_intrinsic_decl_reg); @@ -6653,7 +6697,7 @@ nir_is_store_reg(nir_intrinsic_instr *intr) static inline nir_intrinsic_instr * nir_load_reg_for_def(const nir_def *def) { - if (def->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_def_is_intrinsic(def)) return NULL; nir_intrinsic_instr *intr = nir_def_as_intrinsic(def); diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index 4c8e02d30d1..ce2e0d93ae5 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -1027,7 +1027,7 @@ static inline nir_def * nir_iadd_imm_nuw(nir_builder *b, nir_def *x, uint64_t y) { nir_def *d = nir_iadd_imm(b, x, y); - if (d != x && d->parent_instr->type == nir_instr_type_alu) + if (d != x && nir_def_is_alu(d)) nir_def_as_alu(d)->no_unsigned_wrap = true; return d; } @@ -1036,7 +1036,7 @@ static inline nir_def * nir_iadd_nuw(nir_builder *b, nir_def *x, nir_def *y) { nir_def *d = nir_iadd(b, x, y); - if (d->parent_instr->type == nir_instr_type_alu) + if (nir_def_is_alu(d)) nir_def_as_alu(d)->no_unsigned_wrap = true; return d; } @@ -1118,7 +1118,7 @@ static inline nir_def * nir_imul_imm_nuw(nir_builder *build, nir_def *x, uint64_t y) { nir_def *d = nir_imul_imm(build, x, y); - if (d != x && d->parent_instr->type == nir_instr_type_alu) + if (d != x && nir_def_is_alu(d)) nir_def_as_alu(d)->no_unsigned_wrap = true; return d; } @@ -1127,7 +1127,7 @@ static inline nir_def * nir_imul_nuw(nir_builder *build, nir_def *x, nir_def *y) { nir_def *d = nir_imul(build, x, y); - if (d->parent_instr->type == nir_instr_type_alu) + if (nir_def_is_alu(d)) nir_def_as_alu(d)->no_unsigned_wrap = true; return d; } diff --git a/src/compiler/nir/nir_deref.c b/src/compiler/nir/nir_deref.c index 9032071aa04..d65f7803f81 100644 --- a/src/compiler/nir/nir_deref.c +++ b/src/compiler/nir/nir_deref.c @@ -963,11 +963,10 @@ opt_alu_of_cast(nir_alu_instr *alu) bool progress = false; for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - nir_instr *src_instr = alu->src[i].src.ssa->parent_instr; - if (src_instr->type != nir_instr_type_deref) + if (!nir_src_is_deref(alu->src[i].src)) continue; - nir_deref_instr *src_deref = nir_instr_as_deref(src_instr); + nir_deref_instr *src_deref = nir_src_as_deref(alu->src[i].src); if (src_deref->deref_type != nir_deref_type_cast) continue; diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 15fd2e689f9..a3416ea6abf 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -1301,7 +1301,7 @@ visit_if_merge_phi(nir_phi_instr *phi, bool if_cond_divergent, bool ignore_undef phi->def.divergent = true; return true; } - if (src->src.ssa->parent_instr->type != nir_instr_type_undef) { + if (!nir_src_is_undef(src->src)) { defined_srcs++; } } diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c index acd9ddabd4b..2a5fb798c43 100644 --- a/src/compiler/nir/nir_from_ssa.c +++ b/src/compiler/nir/nir_from_ssa.c @@ -67,17 +67,17 @@ struct block_parallel_copies { static bool def_after(nir_def *a, nir_def *b) { - if (a->parent_instr->type == nir_instr_type_undef) + if (nir_def_is_undef(a)) return false; - if (b->parent_instr->type == nir_instr_type_undef) + if (nir_def_is_undef(b)) return true; /* If they're in the same block, we can rely on whichever instruction * comes first in the block. */ if (nir_def_block(a) == nir_def_block(b)) - return a->parent_instr->index > b->parent_instr->index; + return nir_def_instr(a)->index > nir_def_instr(b)->index; /* Otherwise, if blocks are distinct, we sort them in DFS pre-order */ return nir_def_block(a)->dom_pre_index > nir_def_block(b)->dom_pre_index; @@ -87,7 +87,7 @@ def_after(nir_def *a, nir_def *b) static bool ssa_def_dominates(nir_def *a, nir_def *b) { - if (a->parent_instr->type == nir_instr_type_undef) { + if (nir_def_is_undef(a)) { /* SSA undefs always dominate */ return true; } @@ -349,7 +349,7 @@ isolate_phi_nodes_block(nir_shader *shader, nir_block *block, struct from_ssa_st pred_copy->divergent = state->consider_divergence && nir_src_is_divergent(&src->src); struct block_parallel_copies *pred_copies = &state->parallel_copies[src->pred->index]; - util_dynarray_append(&pred_copies->end, nir_instr_as_intrinsic(pred_copy->parent_instr)); + util_dynarray_append(&pred_copies->end, nir_def_as_intrinsic(pred_copy)); nir_src_rewrite(&src->src, pred_copy); } @@ -414,7 +414,7 @@ aggressive_coalesce_parallel_copy(struct util_dynarray *pcopy, /* Since load_const instructions are SSA only, we can't replace their * destinations with registers and, therefore, can't coalesce them. */ - if (copy->src[0].ssa->parent_instr->type == nir_instr_type_load_const) + if (nir_src_is_const(copy->src[0])) continue; merge_node *src_node = get_merge_node(copy->src[0].ssa, state); @@ -491,18 +491,17 @@ static bool def_replace_with_reg(nir_def *def, nir_function_impl *impl) { /* These are handled elsewhere */ - assert(def->parent_instr->type != nir_instr_type_undef && - def->parent_instr->type != nir_instr_type_load_const); + assert(!nir_def_is_undef(def) && !nir_def_is_const(def)); nir_builder b = nir_builder_create(impl); nir_def *reg = decl_reg_for_ssa_def(&b, def); nir_rewrite_uses_to_load_reg(&b, def, reg); - if (def->parent_instr->type == nir_instr_type_phi) + if (nir_def_is_phi(def)) b.cursor = nir_before_block_after_phis(nir_def_block(def)); else - b.cursor = nir_after_instr(def->parent_instr); + b.cursor = nir_after_def(def); nir_store_reg(&b, def, reg); return true; @@ -572,7 +571,7 @@ rewrite_ssa_def(nir_def *def, void *void_state) /* At this point we know a priori that this SSA def is part of a * nir_dest. We can use exec_node_data to get the dest pointer. */ - assert(def->parent_instr->type != nir_instr_type_load_const); + assert(!nir_def_is_const(def)); nir_store_reg(&state->builder, def, reg); state->progress = true; diff --git a/src/compiler/nir/nir_gather_output_deps.c b/src/compiler/nir/nir_gather_output_deps.c index a3e1937dc94..524c067117e 100644 --- a/src/compiler/nir/nir_gather_output_deps.c +++ b/src/compiler/nir/nir_gather_output_deps.c @@ -29,7 +29,7 @@ static bool accum_src_deps(nir_src *src, void *opaque) { foreach_src_data *data = (foreach_src_data *)opaque; - nir_instr *src_instr = src->ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(src->ssa); if (src_instr->type == nir_instr_type_load_const || src_instr->type == nir_instr_type_undef) @@ -154,7 +154,7 @@ nir_gather_output_dependencies(nir_shader *nir, nir_output_deps *deps) */ util_dynarray_foreach(&if_cond_stack, nir_def *, cond) { accum_deps(this_instr_deps, - instr_deps[(*cond)->parent_instr->index], + instr_deps[nir_def_instr(*cond)->index], num_bitset_words); } @@ -195,7 +195,7 @@ nir_gather_output_dependencies(nir_shader *nir, nir_output_deps *deps) */ util_dynarray_foreach(&if_cond_stack, nir_def *, cond) { accum_deps(instr_deps[phi->instr.index], - instr_deps[(*cond)->parent_instr->index], + instr_deps[nir_def_instr(*cond)->index], num_bitset_words); } @@ -265,7 +265,7 @@ nir_gather_output_dependencies(nir_shader *nir, nir_output_deps *deps) nir_foreach_phi(phi, nir_cf_node_cf_tree_next(parent_cf)) { util_dynarray_foreach(&if_cond_stack, nir_def *, cond) { accum_deps(instr_deps[phi->instr.index], - instr_deps[(*cond)->parent_instr->index], + instr_deps[nir_def_instr(*cond)->index], num_bitset_words); } } diff --git a/src/compiler/nir/nir_inline_uniforms.c b/src/compiler/nir/nir_inline_uniforms.c index b59600ec9a5..27bbb84081f 100644 --- a/src/compiler/nir/nir_inline_uniforms.c +++ b/src/compiler/nir/nir_inline_uniforms.c @@ -76,7 +76,7 @@ nir_collect_src_uniforms(const nir_src *src, int component, assert(max_num_bo > 0 && max_num_bo <= MAX_NUM_BO); assert(component < src->ssa->num_components); - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); switch (instr->type) { case nir_instr_type_alu: { diff --git a/src/compiler/nir/nir_instr_set.c b/src/compiler/nir/nir_instr_set.c index 89b1332c106..aa248b2ebc6 100644 --- a/src/compiler/nir/nir_instr_set.c +++ b/src/compiler/nir/nir_instr_set.c @@ -358,7 +358,7 @@ nir_srcs_equal(nir_src src1, nir_src src2) static nir_alu_instr * get_neg_instr(nir_src s, nir_alu_type base_type) { - nir_alu_instr *alu = nir_src_as_alu_instr(s); + nir_alu_instr *alu = nir_src_as_alu(s); return alu != NULL && (alu->op == (base_type == nir_type_float ? nir_op_fneg : nir_op_ineg)) ? alu diff --git a/src/compiler/nir/nir_legacy.c b/src/compiler/nir/nir_legacy.c index dcd64dc2c31..eccf47726de 100644 --- a/src/compiler/nir/nir_legacy.c +++ b/src/compiler/nir/nir_legacy.c @@ -67,11 +67,8 @@ chase_alu_src_helper(const nir_src *src) static inline bool chase_source_mod(nir_def **ssa, nir_op op, uint8_t *swizzle) { - if ((*ssa)->parent_instr->type != nir_instr_type_alu) - return false; - - nir_alu_instr *alu = nir_def_as_alu((*ssa)); - if (alu->op != op) + nir_alu_instr *alu = nir_def_as_alu_or_null(*ssa); + if (!alu || alu->op != op) return false; /* If there are other uses of the modifier that don't fold, we can't fold it @@ -97,7 +94,7 @@ chase_source_mod(nir_def **ssa, nir_op op, uint8_t *swizzle) nir_legacy_alu_src nir_legacy_chase_alu_src(const nir_alu_src *src, bool fuse_fabs) { - if (src->src.ssa->parent_instr->type == nir_instr_type_alu) { + if (nir_src_is_alu(src->src)) { nir_legacy_alu_src out = { .src.is_ssa = true, .src.ssa = src->src.ssa, @@ -164,23 +161,18 @@ nir_legacy_fsat_folds(nir_alu_instr *fsat) assert(&fsat->src[0].src == list_first_entry(&def->uses, nir_src, use_link)); - nir_instr *generate = def->parent_instr; - if (generate->type != nir_instr_type_alu) - return false; - - nir_alu_instr *generate_alu = nir_instr_as_alu(generate); - nir_alu_type dest_type = nir_op_infos[generate_alu->op].output_type; - if (dest_type != nir_type_float) + nir_alu_instr *generate = nir_def_as_alu_or_null(def); + if (!generate || nir_op_infos[generate->op].output_type != nir_type_float) return false; /* If we are a saturating a source modifier fsat(fabs(x)), we need to emit * either the fsat or the modifier or else the sequence disappears. */ - if (generate_alu->op == nir_op_fabs || generate_alu->op == nir_op_fneg) + if (generate->op == nir_op_fabs || generate->op == nir_op_fneg) return false; /* We can't do expansions without a move in the middle */ - unsigned nr_components = generate_alu->def.num_components; + unsigned nr_components = generate->def.num_components; if (fsat->def.num_components != nr_components) return false; diff --git a/src/compiler/nir/nir_linking_helpers.c b/src/compiler/nir/nir_linking_helpers.c index 146cb8bccb2..f2d849975b7 100644 --- a/src/compiler/nir/nir_linking_helpers.c +++ b/src/compiler/nir/nir_linking_helpers.c @@ -1140,12 +1140,8 @@ is_direct_uniform_load(nir_def *def, nir_scalar *s) */ *s = nir_scalar_resolved(def, 0); - nir_def *ssa = s->def; - if (ssa->parent_instr->type != nir_instr_type_intrinsic) - return false; - - nir_intrinsic_instr *intr = nir_def_as_intrinsic(ssa); - if (intr->intrinsic != nir_intrinsic_load_deref) + nir_intrinsic_instr *intr = nir_scalar_as_intrinsic(*s); + if (!intr || intr->intrinsic != nir_intrinsic_load_deref) return false; nir_deref_instr *deref = nir_src_as_deref(intr->src[0]); @@ -1406,7 +1402,7 @@ nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer) continue; nir_def *ssa = intr->src[1].ssa; - if (ssa->parent_instr->type == nir_instr_type_load_const) { + if (nir_def_is_const(ssa)) { progress |= replace_varying_input_by_constant_load(consumer, intr); continue; } diff --git a/src/compiler/nir/nir_liveness.c b/src/compiler/nir/nir_liveness.c index b25ca7c13d5..34cfb38c2a6 100644 --- a/src/compiler/nir/nir_liveness.c +++ b/src/compiler/nir/nir_liveness.c @@ -294,18 +294,20 @@ nir_def_is_live_at(nir_def *def, nir_instr *instr) bool nir_defs_interfere(nir_def *a, nir_def *b) { - if (a->parent_instr == b->parent_instr) { + nir_instr *a_instr = nir_def_instr(a); + nir_instr *b_instr = nir_def_instr(b); + if (a_instr == b_instr) { /* Two variables defined at the same time interfere assuming at * least one isn't dead. */ return true; - } else if (a->parent_instr->type == nir_instr_type_undef || - b->parent_instr->type == nir_instr_type_undef) { + } else if (a_instr->type == nir_instr_type_undef || + b_instr->type == nir_instr_type_undef) { /* If either variable is an ssa_undef, then there's no interference */ return false; - } else if (a->parent_instr->index < b->parent_instr->index) { - return nir_def_is_live_at(a, b->parent_instr); + } else if (a_instr->index < b_instr->index) { + return nir_def_is_live_at(a, b_instr); } else { - return nir_def_is_live_at(b, a->parent_instr); + return nir_def_is_live_at(b, a_instr); } } diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index aa7369c4058..5ebbab4d2a1 100644 --- a/src/compiler/nir/nir_loop_analyze.c +++ b/src/compiler/nir/nir_loop_analyze.c @@ -176,10 +176,10 @@ phi_instr_as_alu(nir_phi_instr *phi) { nir_alu_instr *first = NULL; nir_foreach_phi_src(src, phi) { - if (src->src.ssa->parent_instr->type != nir_instr_type_alu) + nir_alu_instr *alu = nir_src_as_alu(src->src); + if (!alu) return NULL; - nir_alu_instr *alu = nir_def_as_alu(src->src.ssa); if (first == NULL) { first = alu; } else { @@ -206,7 +206,7 @@ alu_src_has_identity_swizzle(nir_alu_instr *alu, unsigned src_idx) static bool is_only_uniform_src(nir_src *src) { - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); switch (instr->type) { case nir_instr_type_alu: { @@ -266,7 +266,7 @@ compute_induction_information(loop_info_state *state) /* Detect inductions variables that are incremented in both branches * of an unnested if rather than in a loop block. */ - if (src->parent_instr->type == nir_instr_type_phi) { + if (nir_def_is_phi(src)) { nir_phi_instr *src_phi = nir_def_as_phi(src); nir_alu_instr *src_phi_alu = phi_instr_as_alu(src_phi); if (src_phi_alu) { @@ -274,7 +274,7 @@ compute_induction_information(loop_info_state *state) } } - if (src->parent_instr->type == nir_instr_type_alu && !var.update_src) { + if (nir_def_is_alu(src) && !var.update_src) { var.def = src; nir_alu_instr *alu = nir_def_as_alu(src); @@ -357,7 +357,7 @@ find_loop_terminators(loop_info_state *state) if (!break_blk) continue; - if (nif->condition.ssa->parent_instr->type == nir_instr_type_phi) { + if (nir_src_is_phi(nif->condition)) { state->loop->info->complex_loop = true; return false; } @@ -372,7 +372,7 @@ find_loop_terminators(loop_info_state *state) terminator->break_block = break_blk; terminator->continue_from_block = continue_from_blk; terminator->continue_from_then = continue_from_then; - terminator->conditional_instr = nif->condition.ssa->parent_instr; + terminator->conditional_instr = nir_def_instr(nif->condition.ssa); success = true; } @@ -1109,7 +1109,7 @@ find_trip_count(loop_info_state *state, unsigned execution_mode, alu_op = nir_scalar_alu_op(cond); trip_count_known = false; - terminator->conditional_instr = cond.def->parent_instr; + terminator->conditional_instr = nir_def_instr(cond.def); terminator->exact_trip_count_unknown = true; } diff --git a/src/compiler/nir/nir_lower_amul.c b/src/compiler/nir/nir_lower_amul.c index 20138e2d38b..2d2a17c72dc 100644 --- a/src/compiler/nir/nir_lower_amul.c +++ b/src/compiler/nir/nir_lower_amul.c @@ -75,7 +75,7 @@ lower_large_src(nir_src *src, void *s) { lower_state *state = s; - nir_instr *parent = src->ssa->parent_instr; + nir_instr *parent = nir_def_instr(src->ssa); /* No need to visit instructions we've already visited.. this also * avoids infinite recursion when phi's are involved: diff --git a/src/compiler/nir/nir_lower_array_deref_of_vec.c b/src/compiler/nir/nir_lower_array_deref_of_vec.c index 0e7d38e705a..6b6028621d6 100644 --- a/src/compiler/nir/nir_lower_array_deref_of_vec.c +++ b/src/compiler/nir/nir_lower_array_deref_of_vec.c @@ -119,7 +119,7 @@ nir_lower_array_deref_of_vec_impl(nir_function_impl *impl, nir_def *index = deref->arr.index.ssa; nir_def *scalar = nir_vector_extract(&b, &intrin->def, index); - if (scalar->parent_instr->type == nir_instr_type_undef) { + if (nir_def_is_undef(scalar)) { nir_def_replace(&intrin->def, scalar); } else { nir_def_rewrite_uses_after(&intrin->def, scalar); diff --git a/src/compiler/nir/nir_lower_bit_size.c b/src/compiler/nir/nir_lower_bit_size.c index 1f18cf45638..7e9368b491b 100644 --- a/src/compiler/nir/nir_lower_bit_size.c +++ b/src/compiler/nir/nir_lower_bit_size.c @@ -37,7 +37,7 @@ convert_to_bit_size(nir_builder *bld, nir_def *src, assert(src->bit_size < bit_size); /* create b2i32(a) instead of i2i32(b2i8(a))/i2i32(b2i16(a)) */ - nir_alu_instr *alu = nir_src_as_alu_instr(nir_src_for_ssa(src)); + nir_alu_instr *alu = nir_def_as_alu_or_null(src); if ((type & (nir_type_uint | nir_type_int)) && bit_size == 32 && alu && (alu->op == nir_op_b2i8 || alu->op == nir_op_b2i16)) { nir_alu_instr *instr = nir_alu_instr_create(bld->shader, nir_op_b2i32); @@ -67,7 +67,7 @@ before_conversion(nir_builder *bld, nir_alu_type type, unsigned bit_size, nir_de default: return NULL; } - if (def->parent_instr->type != nir_instr_type_alu) { + if (!nir_def_is_alu(def)) { return NULL; } nir_alu_instr *alu_instr = nir_def_as_alu(def); diff --git a/src/compiler/nir/nir_lower_const_arrays_to_uniforms.c b/src/compiler/nir/nir_lower_const_arrays_to_uniforms.c index 8faf867d0aa..0a54b62ba31 100644 --- a/src/compiler/nir/nir_lower_const_arrays_to_uniforms.c +++ b/src/compiler/nir/nir_lower_const_arrays_to_uniforms.c @@ -79,7 +79,7 @@ set_const_initialiser(nir_deref_instr **p, nir_constant *top_level_init, /* Now that we have selected the corrent nir_constant we copy the constant * values to it. */ - nir_instr *src_instr = const_src->ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(const_src->ssa); assert(src_instr->type == nir_instr_type_load_const); nir_load_const_instr *load = nir_instr_as_load_const(src_instr); diff --git a/src/compiler/nir/nir_lower_explicit_io.c b/src/compiler/nir/nir_lower_explicit_io.c index 498a56312c5..61d1c471d54 100644 --- a/src/compiler/nir/nir_lower_explicit_io.c +++ b/src/compiler/nir/nir_lower_explicit_io.c @@ -474,7 +474,7 @@ nir_get_explicit_deref_range(nir_deref_instr *deref, } case nir_deref_type_cast: { - nir_instr *parent_instr = deref->parent.ssa->parent_instr; + nir_instr *parent_instr = nir_def_instr(deref->parent.ssa); switch (parent_instr->type) { case nir_instr_type_load_const: { diff --git a/src/compiler/nir/nir_lower_flrp.c b/src/compiler/nir/nir_lower_flrp.c index 0bc1cd06554..ce270c4ea7b 100644 --- a/src/compiler/nir/nir_lower_flrp.c +++ b/src/compiler/nir/nir_lower_flrp.c @@ -547,7 +547,7 @@ convert_flrp_instruction(nir_builder *bld, * There is no need to handle t = 0.5 specially. nir_opt_algebraic * already has optimizations to convert 0.5x + 0.5y to 0.5(x + y). */ - if (alu->src[2].src.ssa->parent_instr->type == nir_instr_type_load_const) { + if (nir_src_is_const(alu->src[2].src)) { replace_with_strict(bld, dead_flrp, alu); return; } diff --git a/src/compiler/nir/nir_lower_helper_writes.c b/src/compiler/nir/nir_lower_helper_writes.c index 1be2efa6cc1..684eb6b969a 100644 --- a/src/compiler/nir/nir_lower_helper_writes.c +++ b/src/compiler/nir/nir_lower_helper_writes.c @@ -92,9 +92,8 @@ lower(nir_builder *b, nir_intrinsic_instr *intr, void *data) */ nir_def_rewrite_uses(&intr->def, phi); - nir_instr *phi_instr = phi->parent_instr; - nir_phi_instr *phi_as_phi = nir_instr_as_phi(phi_instr); - nir_phi_src *phi_src = nir_phi_get_src_from_block(phi_as_phi, + nir_phi_instr *phi_instr = nir_def_as_phi(phi); + nir_phi_src *phi_src = nir_phi_get_src_from_block(phi_instr, intr->instr.block); nir_src_rewrite(&phi_src->src, &intr->def); } diff --git a/src/compiler/nir/nir_lower_image_atomics_to_global.c b/src/compiler/nir/nir_lower_image_atomics_to_global.c index a2348b46c06..6b57214d8a5 100644 --- a/src/compiler/nir/nir_lower_image_atomics_to_global.c +++ b/src/compiler/nir/nir_lower_image_atomics_to_global.c @@ -76,8 +76,7 @@ lower(nir_builder *b, nir_intrinsic_instr *intr, void *data) .format = format, .access = nir_intrinsic_access(intr)); - nir_instr *address_instr = address->parent_instr; - nir_intrinsic_instr *address_intr = nir_instr_as_intrinsic(address_instr); + nir_intrinsic_instr *address_intr = nir_def_as_intrinsic(address); address_intr->intrinsic = address_op; if (address_op == nir_intrinsic_image_texel_address) { @@ -100,8 +99,7 @@ lower(nir_builder *b, nir_intrinsic_instr *intr, void *data) /* Replace the image atomic with the global atomic. Remove the image * explicitly because it has side effects so is not DCE'd. */ - nir_def_rewrite_uses(&intr->def, global); - nir_instr_remove(&intr->instr); + nir_def_replace(&intr->def, global); return true; } diff --git a/src/compiler/nir/nir_lower_int_to_float.c b/src/compiler/nir/nir_lower_int_to_float.c index 67d2a5291e9..86633c80b35 100644 --- a/src/compiler/nir/nir_lower_int_to_float.c +++ b/src/compiler/nir/nir_lower_int_to_float.c @@ -59,7 +59,7 @@ check_for_lowered_ffloor(nir_alu_instr *fadd) nir_alu_instr *fneg = NULL; nir_src x; for (unsigned i = 0; i < 2; i++) { - nir_alu_instr *fadd_src_alu = nir_src_as_alu_instr(fadd->src[i].src); + nir_alu_instr *fadd_src_alu = nir_src_as_alu(fadd->src[i].src); if (fadd_src_alu && fadd_src_alu->op == nir_op_fneg) { fneg = fadd_src_alu; x = fadd->src[1 - i].src; @@ -69,7 +69,7 @@ check_for_lowered_ffloor(nir_alu_instr *fadd) if (!fneg || !instr_has_only_trivial_swizzles(fneg)) return false; - nir_alu_instr *ffract = nir_src_as_alu_instr(fneg->src[0].src); + nir_alu_instr *ffract = nir_src_as_alu(fneg->src[0].src); if (ffract && ffract->op == nir_op_ffract && nir_srcs_equal(ffract->src[0].src, x) && instr_has_only_trivial_swizzles(ffract)) @@ -123,7 +123,7 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu) /* If the source was already integer, then we did't need to truncate and * can switch it to a mov that can be copy-propagated away. */ - nir_alu_instr *src_alu = nir_src_as_alu_instr(alu->src[0].src); + nir_alu_instr *src_alu = nir_src_as_alu(alu->src[0].src); if (src_alu) { switch (src_alu->op) { /* Check for the y = x - ffract(x) patterns from lowered ffloor. */ diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c index 6f1960c1f78..f561c0f2cc1 100644 --- a/src/compiler/nir/nir_lower_io.c +++ b/src/compiler/nir/nir_lower_io.c @@ -321,8 +321,7 @@ static nir_def * simplify_offset_src(nir_builder *b, nir_def *offset, unsigned num_slots) { /* Force index=0 for any indirect access to array[1]. */ - if (num_slots == 1 && - offset->parent_instr->type != nir_instr_type_load_const) + if (num_slots == 1 && !nir_def_is_const(offset)) return nir_imm_int(b, 0); return offset; diff --git a/src/compiler/nir/nir_lower_mediump.c b/src/compiler/nir/nir_lower_mediump.c index 270294e42e7..658b19759d5 100644 --- a/src/compiler/nir/nir_lower_mediump.c +++ b/src/compiler/nir/nir_lower_mediump.c @@ -94,7 +94,7 @@ nir_lower_mediump_io(nir_shader *nir, nir_variable_mode modes, bool is_fragdepth = (nir->info.stage == MESA_SHADER_FRAGMENT && sem.location == FRAG_RESULT_DEPTH); if (!sem.medium_precision && - (is_varying || is_fragdepth || val->parent_instr->type != nir_instr_type_alu || + (is_varying || is_fragdepth || !nir_def_is_alu(val) || nir_def_as_alu(val)->op != upconvert_op)) { continue; } diff --git a/src/compiler/nir/nir_lower_non_uniform_access.c b/src/compiler/nir/nir_lower_non_uniform_access.c index 6b21c3b4be2..7185dcc8973 100644 --- a/src/compiler/nir/nir_lower_non_uniform_access.c +++ b/src/compiler/nir/nir_lower_non_uniform_access.c @@ -177,7 +177,7 @@ add_non_uniform_instr(struct nu_state *state, struct nu_handle *handles, key.instr_index = instr->index; for (uint32_t i = 0; i < handle_count; i++) - key.handle_indixes[i] = handles[i].handle->parent_instr->index; + key.handle_indixes[i] = nir_def_instr(handles[i].handle)->index; struct hash_entry *entry = _mesa_hash_table_search(state->accesses, &key); if (!entry) { diff --git a/src/compiler/nir/nir_lower_phis_to_scalar.c b/src/compiler/nir/nir_lower_phis_to_scalar.c index c336b8e882c..a37c78d2cdb 100644 --- a/src/compiler/nir/nir_lower_phis_to_scalar.c +++ b/src/compiler/nir/nir_lower_phis_to_scalar.c @@ -55,7 +55,7 @@ static bool is_phi_src_scalarizable(nir_phi_src *src) { - nir_instr *src_instr = src->src.ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(src->src.ssa); switch (src_instr->type) { case nir_instr_type_alu: { nir_alu_instr *src_alu = nir_instr_as_alu(src_instr); diff --git a/src/compiler/nir/nir_lower_shader_calls.c b/src/compiler/nir/nir_lower_shader_calls.c index 816c39c6fd1..afa0b6f2ca6 100644 --- a/src/compiler/nir/nir_lower_shader_calls.c +++ b/src/compiler/nir/nir_lower_shader_calls.c @@ -170,7 +170,7 @@ can_remat_instr(nir_instr *instr, struct u_sparse_bitset *remat) static bool can_remat_ssa_def(nir_def *def, struct u_sparse_bitset *remat) { - return can_remat_instr(def->parent_instr, remat); + return can_remat_instr(nir_def_instr(def), remat); } struct add_instr_data { @@ -186,7 +186,7 @@ add_src_instr(nir_src *src, void *state) return true; util_dynarray_foreach(data->buf, nir_instr *, instr_ptr) { - if (*instr_ptr == src->ssa->parent_instr) + if (*instr_ptr == nir_def_instr(src->ssa)) return true; } @@ -194,7 +194,7 @@ add_src_instr(nir_src *src, void *state) if (data->buf->size >= data->buf->capacity) return false; - util_dynarray_append(data->buf, src->ssa->parent_instr); + util_dynarray_append(data->buf, nir_def_instr(src->ssa)); return true; } @@ -215,7 +215,7 @@ can_remat_chain_ssa_def(nir_def *def, struct u_sparse_bitset *remat, struct util void *mem_ctx = ralloc_context(NULL); /* Add all the instructions involved in build this ssa_def */ - util_dynarray_append(buf, def->parent_instr); + util_dynarray_append(buf, nir_def_instr(def)); unsigned idx = 0; struct add_instr_data data = { @@ -271,7 +271,7 @@ fail: static nir_def * remat_ssa_def(nir_builder *b, nir_def *def, struct hash_table *remap_table) { - nir_instr *clone = nir_instr_clone_deep(b->shader, def->parent_instr, remap_table); + nir_instr *clone = nir_instr_clone_deep(b->shader, nir_def_instr(def), remap_table); nir_builder_instr_insert(b, clone); return nir_instr_def(clone); } @@ -491,7 +491,7 @@ spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls, if (!u_sparse_bitset_test(call_live[c], def->index)) continue; - if (!options->should_remat_callback(def->parent_instr, + if (!options->should_remat_callback(nir_def_instr(def), options->should_remat_data)) continue; @@ -809,7 +809,7 @@ duplicate_loop_bodies(nir_function_impl *impl, nir_instr *resume_instr) /* Initialize resume to true at the start of the shader, right after * the register is declared at the start. */ - b.cursor = nir_after_instr(resume_reg->parent_instr); + b.cursor = nir_after_def(resume_reg); nir_store_reg(&b, nir_imm_true(&b), resume_reg); /* Set resume to false right after the resume instruction */ @@ -1383,7 +1383,7 @@ opt_remove_respills_instr(struct nir_builder *b, if (store_intrin->intrinsic != nir_intrinsic_store_stack) return false; - nir_instr *value_instr = store_intrin->src[0].ssa->parent_instr; + nir_instr *value_instr = nir_def_instr(store_intrin->src[0].ssa); if (value_instr->type != nir_instr_type_intrinsic) return false; diff --git a/src/compiler/nir/nir_lower_system_values.c b/src/compiler/nir/nir_lower_system_values.c index 61d5282db80..489f504c1b9 100644 --- a/src/compiler/nir/nir_lower_system_values.c +++ b/src/compiler/nir/nir_lower_system_values.c @@ -549,7 +549,7 @@ lower_compute_system_value_instr(nir_builder *b, b->shader->info.derivative_group == DERIVATIVE_GROUP_QUADS && _mesa_set_search(state->lower_once_list, instr) == NULL) { nir_def *ids = nir_load_local_invocation_id(b); - _mesa_set_add(state->lower_once_list, ids->parent_instr); + _mesa_set_add(state->lower_once_list, nir_def_instr(ids)); nir_def *x = nir_channel(b, ids, 0); nir_def *y = nir_channel(b, ids, 1); @@ -704,7 +704,7 @@ lower_compute_system_value_instr(nir_builder *b, nir_def *group_size = nir_u2uN(b, nir_load_workgroup_size(b), bit_size); nir_def *base_group_id = nir_load_base_workgroup_id(b, bit_size); - _mesa_set_add(state->lower_once_list, global_id->parent_instr); + _mesa_set_add(state->lower_once_list, nir_def_instr(global_id)); return nir_iadd(b, global_id, nir_imul(b, base_group_id, group_size)); } else if (options && options->global_id_is_32bit && bit_size > 32) { diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index b6b7485b76e..d16f647cf1f 100644 --- a/src/compiler/nir/nir_lower_tex.c +++ b/src/compiler/nir/nir_lower_tex.c @@ -1560,7 +1560,7 @@ nir_tex_parse_txd_coords(nir_shader *shader, nir_tex_instr *tex, nir_instr **ddx op != nir_intrinsic_ddy_coarse) return 0; - ddxy_instrs[i * 2 + j] = ddxy_comp.def->parent_instr; + ddxy_instrs[i * 2 + j] = nir_def_instr(ddxy_comp.def); nir_def *def = nir_def_as_intrinsic(ddxy_comp.def)->src[0].ssa; ddxy_comp = nir_scalar_resolved(def, ddxy_comp.comp); diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c b/src/compiler/nir/nir_lower_vars_to_ssa.c index 3b89c0fac93..afe44ddc5ca 100644 --- a/src/compiler/nir/nir_lower_vars_to_ssa.c +++ b/src/compiler/nir/nir_lower_vars_to_ssa.c @@ -606,7 +606,7 @@ nir_def_set_name(nir_shader *shader, nir_def *def, char *name) if (!name || likely(!shader->has_debug_info)) return; - nir_instr_debug_info *debug_info = nir_instr_get_debug_info(def->parent_instr); + nir_instr_debug_info *debug_info = nir_instr_get_debug_info(nir_def_instr(def)); debug_info->variable_name = name; } diff --git a/src/compiler/nir/nir_lower_vec_to_regs.c b/src/compiler/nir/nir_lower_vec_to_regs.c index a0a5e4765ed..50f41adc31e 100644 --- a/src/compiler/nir/nir_lower_vec_to_regs.c +++ b/src/compiler/nir/nir_lower_vec_to_regs.c @@ -45,7 +45,7 @@ insert_store(nir_builder *b, nir_def *reg, nir_alu_instr *vec, } /* No sense storing from undef, just return the write mask */ - if (src->parent_instr->type == nir_instr_type_undef) + if (nir_def_is_undef(src)) return write_mask; b->cursor = nir_before_instr(&vec->instr); @@ -85,12 +85,10 @@ try_coalesce(nir_builder *b, nir_def *reg, nir_alu_instr *vec, return 0; } - if (vec->src[start_idx].src.ssa->parent_instr->type != nir_instr_type_alu) + nir_alu_instr *src_alu = nir_src_as_alu(vec->src[start_idx].src); + if (!src_alu) return 0; - nir_alu_instr *src_alu = - nir_def_as_alu(vec->src[start_idx].src.ssa); - if (has_replicated_dest(src_alu)) { /* The fdot instruction is special: It replicates its result to all * components. This means that we can always rewrite its destination diff --git a/src/compiler/nir/nir_mod_analysis.c b/src/compiler/nir/nir_mod_analysis.c index 252711a3737..6ea08a5edcc 100644 --- a/src/compiler/nir/nir_mod_analysis.c +++ b/src/compiler/nir/nir_mod_analysis.c @@ -54,7 +54,7 @@ nir_mod_analysis(nir_scalar val, nir_alu_type val_type, unsigned div, unsigned * assert(util_is_power_of_two_nonzero(div)); - switch (val.def->parent_instr->type) { + switch (nir_def_instr_type(val.def)) { case nir_instr_type_load_const: { nir_load_const_instr *load = nir_def_as_load_const(val.def); diff --git a/src/compiler/nir/nir_move_vec_src_uses_to_dest.c b/src/compiler/nir/nir_move_vec_src_uses_to_dest.c index 35049e74d9c..eb97983ab49 100644 --- a/src/compiler/nir/nir_move_vec_src_uses_to_dest.c +++ b/src/compiler/nir/nir_move_vec_src_uses_to_dest.c @@ -48,10 +48,10 @@ static bool ssa_def_dominates_instr(nir_def *def, nir_instr *instr) { - if (instr->index <= def->parent_instr->index) { + if (instr->index <= nir_def_instr(def)->index) { return false; } else if (nir_def_block(def) == instr->block) { - return def->parent_instr->index < instr->index; + return nir_def_instr(def)->index < instr->index; } else { return nir_block_dominates(nir_def_block(def), instr->block); } diff --git a/src/compiler/nir/nir_opt_barycentric.c b/src/compiler/nir/nir_opt_barycentric.c index 2b3259dc942..5b14951ab18 100644 --- a/src/compiler/nir/nir_opt_barycentric.c +++ b/src/compiler/nir/nir_opt_barycentric.c @@ -55,7 +55,7 @@ opt_bary_at_sample(nir_builder *b, nir_intrinsic_instr *intr, bool lower_sample_ static bool src_is_vec2_sample_pos_minus_half(nir_src src) { - nir_alu_instr *alu = nir_src_as_alu_instr(src); + nir_alu_instr *alu = nir_src_as_alu(src); if (!alu || alu->op != nir_op_vec2) return false; diff --git a/src/compiler/nir/nir_opt_call.c b/src/compiler/nir/nir_opt_call.c index 45dda349d0a..88728595de0 100644 --- a/src/compiler/nir/nir_opt_call.c +++ b/src/compiler/nir/nir_opt_call.c @@ -58,7 +58,7 @@ remat_ssa_def(nir_builder *b, nir_def *def, struct hash_table *remap_table, def->bit_size, def_blocks); _mesa_hash_table_insert(phi_value_table, def, val); - nir_instr *clone = nir_instr_clone_deep(b->shader, def->parent_instr, + nir_instr *clone = nir_instr_clone_deep(b->shader, nir_def_instr(def), remap_table); nir_builder_instr_insert(b, clone); nir_def *new_def = nir_instr_def(clone); @@ -83,13 +83,13 @@ can_remat_chain(nir_src *src, void *data) if (_mesa_hash_table_search(check_data->remap_table, src->ssa)) return true; - if (!can_remat_instr(src->ssa->parent_instr)) + if (!can_remat_instr(nir_def_instr(src->ssa))) return false; if (check_data->chain_length++ >= 16) return false; - return nir_foreach_src(src->ssa->parent_instr, can_remat_chain, check_data); + return nir_foreach_src(nir_def_instr(src->ssa), can_remat_chain, check_data); } struct remat_chain_data { @@ -108,7 +108,7 @@ do_remat_chain(nir_src *src, void *data) if (_mesa_hash_table_search(remat_data->remap_table, src->ssa)) return true; - nir_foreach_src(src->ssa->parent_instr, do_remat_chain, remat_data); + nir_foreach_src(nir_def_instr(src->ssa), do_remat_chain, remat_data); remat_ssa_def(remat_data->b, src->ssa, remat_data->remap_table, remat_data->phi_value_table, remat_data->phi_builder, @@ -139,7 +139,7 @@ rewrite_instr_src_from_phi_builder(nir_src *src, void *data) bool can_rewrite = true; if (nir_def_block(new_def) == block && new_def->index != UINT32_MAX) can_rewrite = - !nir_instr_is_before(nir_src_parent_instr(src), new_def->parent_instr); + !nir_instr_is_before(nir_src_parent_instr(src), nir_def_instr(new_def)); if (can_rewrite) nir_src_rewrite(src, new_def); @@ -208,7 +208,7 @@ nir_minimize_call_live_states_impl(nir_function_impl *impl) .chain_length = 1, }; - if (!nir_foreach_src(rematerializable[i]->parent_instr, + if (!nir_foreach_src(nir_def_instr(rematerializable[i]), can_remat_chain, &check_data)) continue; @@ -220,7 +220,7 @@ nir_minimize_call_live_states_impl(nir_function_impl *impl) .def_blocks = def_blocks, }; - nir_foreach_src(rematerializable[i]->parent_instr, do_remat_chain, + nir_foreach_src(nir_def_instr(rematerializable[i]), do_remat_chain, &remat_data); remat_ssa_def(&b, rematerializable[i], remap_table, phi_value_table, diff --git a/src/compiler/nir/nir_opt_constant_folding.c b/src/compiler/nir/nir_opt_constant_folding.c index 487c1a0d035..93255944813 100644 --- a/src/compiler/nir/nir_opt_constant_folding.c +++ b/src/compiler/nir/nir_opt_constant_folding.c @@ -59,11 +59,9 @@ nir_try_constant_fold_alu(nir_builder *b, nir_alu_instr *alu) !nir_alu_type_get_type_size(nir_op_infos[alu->op].input_types[i])) bit_size = alu->src[i].src.ssa->bit_size; - nir_instr *src_instr = alu->src[i].src.ssa->parent_instr; - - if (src_instr->type != nir_instr_type_load_const) + nir_load_const_instr *load_const = nir_src_as_load_const(alu->src[i].src); + if (!load_const) return NULL; - nir_load_const_instr *load_const = nir_instr_as_load_const(src_instr); for (unsigned j = 0; j < nir_ssa_alu_instr_src_components(alu, i); j++) { diff --git a/src/compiler/nir/nir_opt_copy_prop_vars.c b/src/compiler/nir/nir_opt_copy_prop_vars.c index baa75804d55..4c2f859fc46 100644 --- a/src/compiler/nir/nir_opt_copy_prop_vars.c +++ b/src/compiler/nir/nir_opt_copy_prop_vars.c @@ -754,7 +754,7 @@ load_from_ssa_entry_value(struct copy_prop_var_state *state, if (load_def == NULL) load_def = nir_load_deref(b, entry->dst.instr); - if (load_def->parent_instr == &intrin->instr) + if (nir_def_instr(load_def) == &intrin->instr) keep_intrin = true; comps[i] = nir_get_scalar(load_def, i); diff --git a/src/compiler/nir/nir_opt_fragdepth.c b/src/compiler/nir/nir_opt_fragdepth.c index 4b3e0de16ca..fa9541f45de 100644 --- a/src/compiler/nir/nir_opt_fragdepth.c +++ b/src/compiler/nir/nir_opt_fragdepth.c @@ -35,11 +35,10 @@ bool nir_def_is_frag_coord_z(nir_def *def) { nir_scalar scalar = nir_scalar_resolved(def, 0); - nir_instr *instr = scalar.def->parent_instr; - if (instr->type != nir_instr_type_intrinsic) + nir_intrinsic_instr *intrin = nir_scalar_as_intrinsic(scalar); + if (!intrin) return false; - nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); switch (intrin->intrinsic) { case nir_intrinsic_load_frag_coord: /* Depth is gl_FragCoord.z */ diff --git a/src/compiler/nir/nir_opt_gcm.c b/src/compiler/nir/nir_opt_gcm.c index 2909025ea61..bc9c39e47e1 100644 --- a/src/compiler/nir/nir_opt_gcm.c +++ b/src/compiler/nir/nir_opt_gcm.c @@ -166,7 +166,7 @@ static bool is_src_scalarizable(nir_src *src) { - nir_instr *src_instr = src->ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(src->ssa); switch (src_instr->type) { case nir_instr_type_alu: { nir_alu_instr *src_alu = nir_instr_as_alu(src_instr); @@ -416,7 +416,7 @@ gcm_schedule_early_src(nir_src *src, void *void_state) struct gcm_state *state = void_state; nir_instr *instr = state->instr; - gcm_schedule_early_instr(src->ssa->parent_instr, void_state); + gcm_schedule_early_instr(nir_def_instr(src->ssa), void_state); /* While the index isn't a proper dominance depth, it does have the * property that if A dominates B then A->index <= B->index. Since we @@ -426,7 +426,7 @@ gcm_schedule_early_src(nir_src *src, void *void_state) * Therefore, we can just go ahead and just compare indices. */ struct gcm_instr_info *src_info = - &state->instr_infos[src->ssa->parent_instr->index]; + &state->instr_infos[nir_def_instr(src->ssa)->index]; struct gcm_instr_info *info = &state->instr_infos[instr->index]; if (info->early_block->index < src_info->early_block->index) info->early_block = src_info->early_block; @@ -657,17 +657,17 @@ gcm_schedule_late_def(nir_def *def, void *void_state) } nir_block *early_block = - state->instr_infos[def->parent_instr->index].early_block; + state->instr_infos[nir_def_instr(def)->index].early_block; /* Some instructions may never be used. Flag them and the instruction * placement code will get rid of them for us. */ if (lca == NULL) { - def->parent_instr->block = NULL; + nir_def_instr(def)->block = NULL; return true; } - if (def->parent_instr->pass_flags & GCM_INSTR_SCHEDULE_EARLIER_ONLY && + if (nir_def_instr(def)->pass_flags & GCM_INSTR_SCHEDULE_EARLIER_ONLY && lca != nir_def_block(def) && nir_block_dominates(nir_def_block(def), lca)) { lca = nir_def_block(def); @@ -679,12 +679,12 @@ gcm_schedule_late_def(nir_def *def, void *void_state) * as far outside loops as we can get. */ nir_block *best_block = - gcm_choose_block_for_instr(def->parent_instr, early_block, lca, state); + gcm_choose_block_for_instr(nir_def_instr(def), early_block, lca, state); if (nir_def_block(def) != best_block) state->progress = true; - def->parent_instr->block = best_block; + nir_def_instr(def)->block = best_block; return true; } diff --git a/src/compiler/nir/nir_opt_group_loads.c b/src/compiler/nir/nir_opt_group_loads.c index 0727ad18116..b5cda54e592 100644 --- a/src/compiler/nir/nir_opt_group_loads.c +++ b/src/compiler/nir/nir_opt_group_loads.c @@ -69,7 +69,7 @@ get_load_resource(nir_instr *instr) switch (tex->src[i].src_type) { case nir_tex_src_texture_deref: case nir_tex_src_texture_handle: - return (opaque_resource*)tex->src[i].src.ssa->parent_instr; + return (opaque_resource*)nir_def_instr(tex->src[i].src.ssa); default: break; } @@ -112,7 +112,7 @@ get_load_resource(nir_instr *instr) /* load_ubo is ignored because it's usually cheap. */ case nir_intrinsic_load_ssbo: case nir_intrinsic_load_global: - return (opaque_resource*)nir_instr_as_intrinsic(instr)->src[0].ssa->parent_instr; + return (opaque_resource*)nir_def_instr(nir_instr_as_intrinsic(instr)->src[0].ssa); default: return NULL; } @@ -167,7 +167,7 @@ has_only_sources_less_than(nir_src *src, void *data) /* true if nir_foreach_src should keep going */ return state->block != nir_def_block(src->ssa) || - state->infos[src->ssa->parent_instr->index].instr_index < + state->infos[nir_def_instr(src->ssa)->index].instr_index < state->first_instr_index; } @@ -329,11 +329,11 @@ static bool gather_indirections(nir_src *src, void *data) { struct indirection_state *state = (struct indirection_state *)data; - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); /* We only count indirections within the same block. */ if (instr->block == state->block) { - unsigned indirections = get_num_indirections(src->ssa->parent_instr, + unsigned indirections = get_num_indirections(nir_def_instr(src->ssa), state->infos); if (instr->type == nir_instr_type_tex || is_grouped_load(instr)) diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index bd0f2ca5f2b..cd2cce1f8b7 100644 --- a/src/compiler/nir/nir_opt_if.c +++ b/src/compiler/nir/nir_opt_if.c @@ -159,7 +159,7 @@ opt_peel_loop_initial_if(nir_loop *loop) nir_if *nif = nir_cf_node_as_if(if_node); nir_def *cond = nif->condition.ssa; - if (cond->parent_instr->type != nir_instr_type_phi) + if (!nir_def_is_phi(cond)) return false; nir_phi_instr *cond_phi = nir_def_as_phi(cond); @@ -288,7 +288,7 @@ is_trivial_bcsel(const nir_instr *instr, bool allow_non_phi_src) nir_def_block(bcsel->src[i].src.ssa) != instr->block) return false; - if (bcsel->src[i].src.ssa->parent_instr->type != nir_instr_type_phi) { + if (!nir_src_is_phi(bcsel->src[i].src)) { /* opt_split_alu_of_phi() is able to peel that src from the loop */ if (i == 0 || !allow_non_phi_src) return false; @@ -420,7 +420,7 @@ opt_split_alu_of_phi(nir_builder *b, nir_loop *loop, nir_opt_if_options options) nir_def *continue_srcs[8]; // FINISHME: Array size? for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - nir_instr *const src_instr = alu->src[i].src.ssa->parent_instr; + nir_instr *const src_instr = nir_def_instr(alu->src[i].src.ssa); /* If the source is a phi in the loop header block, then the * prev_srcs and continue_srcs will come from the different sources @@ -440,13 +440,11 @@ opt_split_alu_of_phi(nir_builder *b, nir_loop *loop, nir_opt_if_options options) nir_foreach_phi_src(src_of_phi, phi) { if (src_of_phi->pred == prev_block) { - if (src_of_phi->src.ssa->parent_instr->type != - nir_instr_type_undef) { + if (!nir_src_is_undef(src_of_phi->src)) { is_prev_result_undef = false; } - if (src_of_phi->src.ssa->parent_instr->type != - nir_instr_type_load_const) { + if (!nir_src_is_const(src_of_phi->src)) { is_prev_result_const = false; } @@ -1026,7 +1024,7 @@ opt_if_evaluate_condition_use(nir_builder *b, nir_if *nif) } bool invert = false; - nir_alu_instr *alu = nir_src_as_alu_instr(nif->condition); + nir_alu_instr *alu = nir_src_as_alu(nif->condition); if (alu != NULL && alu->op == nir_op_inot && nir_src_num_components(alu->src[0].src) == 1) { /* Consider @@ -1047,7 +1045,7 @@ opt_if_evaluate_condition_use(nir_builder *b, nir_if *nif) } invert = true; - alu = nir_src_as_alu_instr(alu->src[0].src); + alu = nir_src_as_alu(alu->src[0].src); } if (alu != NULL) { @@ -1073,7 +1071,7 @@ opt_if_evaluate_condition_use(nir_builder *b, nir_if *nif) /* Just like above, if the op is inot, peel the inot off and try * some more. */ - nir_alu_instr *alu_src = nir_src_as_alu_instr(alu->src[i].src); + nir_alu_instr *alu_src = nir_src_as_alu(alu->src[i].src); if (alu_src != NULL && alu_src->op == nir_op_inot && nir_src_num_components(alu_src->src[0].src) == 1) { nir_foreach_use_including_if_safe(use_src, alu_src->src[0].src.ssa) { @@ -1223,7 +1221,7 @@ opt_phi_src_unused(nir_builder *b, nir_phi_instr *phi, { /* Return early, if either of the sources is already undef. */ nir_foreach_phi_src(phi_src, phi) { - if (phi_src->src.ssa->parent_instr->type == nir_instr_type_undef) + if (nir_src_is_undef(phi_src->src)) return false; } diff --git a/src/compiler/nir/nir_opt_intrinsics.c b/src/compiler/nir/nir_opt_intrinsics.c index 47d11066ca6..561d66c95fe 100644 --- a/src/compiler/nir/nir_opt_intrinsics.c +++ b/src/compiler/nir/nir_opt_intrinsics.c @@ -132,7 +132,7 @@ src_is_quad_broadcast(nir_block *block, nir_src src, nir_intrinsic_instr **intri static bool src_is_alu(nir_op op, nir_src src, nir_src srcs[2]) { - nir_alu_instr *alu = nir_src_as_alu_instr(src); + nir_alu_instr *alu = nir_src_as_alu(src); if (alu == NULL || alu->op != op) return false; diff --git a/src/compiler/nir/nir_opt_load_skip_helpers.c b/src/compiler/nir/nir_opt_load_skip_helpers.c index 75010065dc3..752ce89ea59 100644 --- a/src/compiler/nir/nir_opt_load_skip_helpers.c +++ b/src/compiler/nir/nir_opt_load_skip_helpers.c @@ -64,9 +64,9 @@ set_src_needs_helpers(nir_src *src, void *_data) { struct helper_state *hs = _data; if (!BITSET_TEST(hs->needs_helpers, src->ssa->index) && - !instr_never_needs_helpers(src->ssa->parent_instr)) { + !instr_never_needs_helpers(nir_def_instr(src->ssa))) { BITSET_SET(hs->needs_helpers, src->ssa->index); - nir_instr_worklist_push_tail(&hs->worklist, src->ssa->parent_instr); + nir_instr_worklist_push_tail(&hs->worklist, nir_def_instr(src->ssa)); } return true; } diff --git a/src/compiler/nir/nir_opt_load_store_vectorize.c b/src/compiler/nir/nir_opt_load_store_vectorize.c index e24091fe8f6..22d73bc05e5 100644 --- a/src/compiler/nir/nir_opt_load_store_vectorize.c +++ b/src/compiler/nir/nir_opt_load_store_vectorize.c @@ -446,7 +446,7 @@ parse_offset(nir_scalar base, uint64_t *offset) } } - if (base.def->parent_instr->type == nir_instr_type_intrinsic) { + if (nir_def_is_intrinsic(base.def)) { nir_intrinsic_instr *intrin = nir_def_as_intrinsic(base.def); if (intrin->intrinsic == nir_intrinsic_load_vulkan_descriptor) base.def = NULL; @@ -911,7 +911,7 @@ hoist_base_addr(nir_instr *instr, nir_instr *to_hoist) /* For ALU, recursively hoist the sources. */ nir_alu_instr *alu = nir_instr_as_alu(to_hoist); for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) - hoist_base_addr(instr, alu->src[i].src.ssa->parent_instr); + hoist_base_addr(instr, nir_def_instr(alu->src[i].src.ssa)); } nir_instr_move(nir_before_instr(instr), to_hoist); @@ -970,7 +970,7 @@ vectorize_loads(nir_builder *b, struct vectorize_ctx *ctx, /* update uses */ if (first == low) { nir_def_rewrite_uses_after_instr(&low->intrin->def, low_def, - high_def->parent_instr); + nir_def_instr(high_def)); nir_def_rewrite_uses(&high->intrin->def, high_def); } else { nir_def_rewrite_uses(&low->intrin->def, low_def); @@ -989,7 +989,7 @@ vectorize_loads(nir_builder *b, struct vectorize_ctx *ctx, /* Hoist low base addr before first intrinsic. */ nir_def *base = low->intrin->src[info->base_src].ssa; - hoist_base_addr(first->instr, base->parent_instr); + hoist_base_addr(first->instr, nir_def_instr(base)); nir_src_rewrite(&first->intrin->src[info->base_src], base); if (nir_intrinsic_has_offset_shift(first->intrin)) { @@ -1539,7 +1539,7 @@ try_vectorize_shared2(struct vectorize_ctx *ctx, /* Take low as base address. */ nir_def *offset = low->intrin->src[first->is_store].ssa; if (first != low) - hoist_base_addr(&first->intrin->instr, offset->parent_instr); + hoist_base_addr(&first->intrin->instr, nir_def_instr(offset)); nir_builder b = nir_builder_at(nir_after_instr(first->is_store ? second->instr : first->instr)); offset = nir_iadd_imm(&b, offset, nir_intrinsic_base(low->intrin)); diff --git a/src/compiler/nir/nir_opt_loop.c b/src/compiler/nir/nir_opt_loop.c index 10324bd8e9c..d24776f7720 100644 --- a/src/compiler/nir/nir_opt_loop.c +++ b/src/compiler/nir/nir_opt_loop.c @@ -313,7 +313,7 @@ can_constant_fold(nir_scalar scalar, nir_block *loop_header) return true; } - if (scalar.def->parent_instr->type == nir_instr_type_phi) { + if (nir_def_instr_type(scalar.def) == nir_instr_type_phi) { /* If this is a phi from anything but the loop header, we cannot constant-fold. */ if (nir_def_block(scalar.def) != loop_header) return false; diff --git a/src/compiler/nir/nir_opt_loop_unroll.c b/src/compiler/nir/nir_opt_loop_unroll.c index 77f4f60367e..06dc66ef385 100644 --- a/src/compiler/nir/nir_opt_loop_unroll.c +++ b/src/compiler/nir/nir_opt_loop_unroll.c @@ -643,8 +643,8 @@ comparison_contains_instr(nir_scalar cond_scalar, nir_instr *instr) if (nir_is_terminator_condition_with_two_inputs(cond_scalar)) { nir_alu_instr *comparison = nir_def_as_alu(cond_scalar.def); - return comparison->src[0].src.ssa->parent_instr == instr || - comparison->src[1].src.ssa->parent_instr == instr; + return nir_def_instr(comparison->src[0].src.ssa) == instr || + nir_def_instr(comparison->src[1].src.ssa) == instr; } return false; @@ -692,7 +692,7 @@ remove_out_of_bounds_induction_use(nir_shader *shader, nir_loop *loop, if (intrin->intrinsic == nir_intrinsic_load_deref) { nir_alu_instr *term_alu = nir_def_as_alu(term->nif->condition.ssa); - b.cursor = nir_before_instr(term->nif->condition.ssa->parent_instr); + b.cursor = nir_before_def(term->nif->condition.ssa); /* If the out of bounds load is used in the comparison of the * loop terminator replace the condition with true so that the diff --git a/src/compiler/nir/nir_opt_move.c b/src/compiler/nir/nir_opt_move.c index 35eab8d2fb9..67e7bcf7fcd 100644 --- a/src/compiler/nir/nir_opt_move.c +++ b/src/compiler/nir/nir_opt_move.c @@ -57,7 +57,7 @@ nir_opt_move_block(nir_block *block, nir_move_options options) bool progress = false; nir_instr *last_instr = nir_block_ends_in_jump(block) ? nir_block_last_instr(block) : NULL; const nir_if *iff = nir_block_get_following_if(block); - const nir_instr *if_cond_instr = iff ? iff->condition.ssa->parent_instr : NULL; + const nir_instr *if_cond_instr = iff ? nir_def_instr(iff->condition.ssa) : NULL; /* Walk the instructions backwards. * The instructions get indexed while iterating. diff --git a/src/compiler/nir/nir_opt_move_discards_to_top.c b/src/compiler/nir/nir_opt_move_discards_to_top.c index fb0a5ab57e7..62849cf5a28 100644 --- a/src/compiler/nir/nir_opt_move_discards_to_top.c +++ b/src/compiler/nir/nir_opt_move_discards_to_top.c @@ -43,7 +43,7 @@ static bool add_src_to_worklist(nir_src *src, void *state_) { struct move_discard_state *state = state_; - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); if (instr->pass_flags) return true; diff --git a/src/compiler/nir/nir_opt_move_to_top.c b/src/compiler/nir/nir_opt_move_to_top.c index fd4b7151bcc..747ef749446 100644 --- a/src/compiler/nir/nir_opt_move_to_top.c +++ b/src/compiler/nir/nir_opt_move_to_top.c @@ -33,7 +33,7 @@ static bool can_move_src_to_top(nir_src *src, void *_state) { opt_move_to_top_state *state = (opt_move_to_top_state *)_state; - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); assert(util_bitcount(instr->pass_flags & (PASS_FLAG_CANT_MOVE | PASS_FLAG_CAN_MOVE)) <= 1); @@ -111,7 +111,7 @@ can_move_src_to_top(nir_src *src, void *_state) static bool move_src(nir_src *src, void *_state) { - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); nir_builder *b = (nir_builder *)_state; if (instr->pass_flags & PASS_FLAG_MOVED) diff --git a/src/compiler/nir/nir_opt_phi_precision.c b/src/compiler/nir/nir_opt_phi_precision.c index 7b204841c89..eb2e6eb3f88 100644 --- a/src/compiler/nir/nir_opt_phi_precision.c +++ b/src/compiler/nir/nir_opt_phi_precision.c @@ -237,7 +237,7 @@ try_move_narrowing_dst(nir_builder *b, nir_phi_instr *phi) /* Push the conversion into the new phi sources: */ nir_foreach_phi_src(src, phi) { /* insert new conversion instr in block of original phi src: */ - b->cursor = nir_after_instr_and_phis(src->src.ssa->parent_instr); + b->cursor = nir_after_instr_and_phis(nir_def_instr(src->src.ssa)); nir_def *old_src = src->src.ssa; nir_def *new_src = nir_build_alu(b, op, old_src, NULL, NULL, NULL); @@ -309,7 +309,7 @@ find_widening_op(nir_phi_instr *phi, unsigned *bit_size) *bit_size = 0; nir_foreach_phi_src(src, phi) { - nir_instr *instr = src->src.ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->src.ssa); if (instr->type == nir_instr_type_load_const) { has_load_const = true; continue; @@ -345,7 +345,7 @@ find_widening_op(nir_phi_instr *phi, unsigned *bit_size) * sequence to make the rest of the transformation possible: */ nir_foreach_phi_src(src, phi) { - nir_instr *instr = src->src.ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->src.ssa); if (instr->type != nir_instr_type_load_const) continue; @@ -379,7 +379,7 @@ try_move_widening_src(nir_builder *b, nir_phi_instr *phi) /* Remove the widening conversions from the phi sources: */ nir_foreach_phi_src(src, phi) { - nir_instr *instr = src->src.ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->src.ssa); nir_def *new_src; b->cursor = nir_after_instr(instr); diff --git a/src/compiler/nir/nir_opt_phi_to_bool.c b/src/compiler/nir/nir_opt_phi_to_bool.c index 571cce1d889..18867da68ec 100644 --- a/src/compiler/nir/nir_opt_phi_to_bool.c +++ b/src/compiler/nir/nir_opt_phi_to_bool.c @@ -30,7 +30,7 @@ enum bool_type { static inline uint8_t src_pass_flags(nir_src *src) { - return src->ssa->parent_instr->pass_flags; + return nir_def_instr(src->ssa)->pass_flags; } static inline nir_block * @@ -189,7 +189,7 @@ phi_to_bool(nir_builder *b, nir_phi_instr *phi, void *unused) nir_foreach_use_safe(src, &phi->def) { if (nir_src_parent_instr(src) == &phi->instr || - nir_src_parent_instr(src) == res->parent_instr) + nir_src_parent_instr(src) == nir_def_instr(res)) continue; nir_src_rewrite(src, res); } diff --git a/src/compiler/nir/nir_opt_preamble.c b/src/compiler/nir/nir_opt_preamble.c index 76d8e8f0f63..8686926aab3 100644 --- a/src/compiler/nir/nir_opt_preamble.c +++ b/src/compiler/nir/nir_opt_preamble.c @@ -515,7 +515,7 @@ replace_for_block(nir_builder *b, opt_preamble_ctx *ctx, nir_before_block_after_phis(nir_cursor_current_block(b->cursor)); nir_def *repl = nir_if_phi(b, then_def, else_def); - clone = repl->parent_instr; + clone = nir_def_instr(repl); _mesa_hash_table_insert(remap_table, &phi->def, repl); } else { diff --git a/src/compiler/nir/nir_opt_ray_queries.c b/src/compiler/nir/nir_opt_ray_queries.c index 3019f7ccaf4..489e0b8a3b6 100644 --- a/src/compiler/nir/nir_opt_ray_queries.c +++ b/src/compiler/nir/nir_opt_ray_queries.c @@ -42,13 +42,13 @@ mark_query_read(struct set *queries, nir_def *rq_def = intrin->src[0].ssa; nir_variable *query; - if (rq_def->parent_instr->type == nir_instr_type_intrinsic) { + if (nir_def_is_intrinsic(rq_def)) { nir_intrinsic_instr *load_deref = nir_def_as_intrinsic(rq_def); assert(load_deref->intrinsic == nir_intrinsic_load_deref); query = nir_intrinsic_get_var(load_deref, 0); - } else if (rq_def->parent_instr->type == nir_instr_type_deref) { + } else if (nir_def_is_deref(rq_def)) { query = nir_deref_instr_get_variable(nir_def_as_deref(rq_def)); } else { return; diff --git a/src/compiler/nir/nir_opt_reassociate.c b/src/compiler/nir/nir_opt_reassociate.c index 76097a46e7b..a0095508359 100644 --- a/src/compiler/nir/nir_opt_reassociate.c +++ b/src/compiler/nir/nir_opt_reassociate.c @@ -234,7 +234,7 @@ build_chain(struct chain *c, nir_scalar def, unsigned reserved_count) c->length + reserved_plus_remaining + 2 <= MAX_CHAIN_LENGTH) { /* Any interior nodes cannot be the root */ - src.def->parent_instr->pass_flags = PASS_FLAG_INTERIOR; + nir_def_instr(src.def)->pass_flags = PASS_FLAG_INTERIOR; /* Recurse, reserving space for the next sources */ build_chain(c, src, reserved_count + remaining); diff --git a/src/compiler/nir/nir_opt_remove_phis.c b/src/compiler/nir/nir_opt_remove_phis.c index 6f35e59f31f..a6624bc9300 100644 --- a/src/compiler/nir/nir_opt_remove_phis.c +++ b/src/compiler/nir/nir_opt_remove_phis.c @@ -34,18 +34,21 @@ phi_srcs_equal(nir_def *a, nir_def *b) if (a == b) return true; - if (a->parent_instr->type != b->parent_instr->type) + nir_instr *a_instr = nir_def_instr(a); + nir_instr *b_instr = nir_def_instr(b); + + if (a_instr->type != b_instr->type) return false; - if (a->parent_instr->type != nir_instr_type_alu && - a->parent_instr->type != nir_instr_type_load_const) + if (a_instr->type != nir_instr_type_alu && + a_instr->type != nir_instr_type_load_const) return false; - if (!nir_instrs_equal(a->parent_instr, b->parent_instr)) + if (!nir_instrs_equal(a_instr, b_instr)) return false; /* nir_instrs_equal ignores exact/fast_math */ - if (a->parent_instr->type == nir_instr_type_alu) { + if (a_instr->type == nir_instr_type_alu) { nir_alu_instr *a_alu = nir_def_as_alu(a); nir_alu_instr *b_alu = nir_def_as_alu(b); if (a_alu->exact != b_alu->exact || a_alu->fp_fast_math != b_alu->fp_fast_math) @@ -65,9 +68,9 @@ src_dominates_block(nir_src *src, void *state) static bool can_rematerialize_phi_src(nir_block *imm_dom, nir_def *def) { - if (def->parent_instr->type == nir_instr_type_alu) { - return nir_foreach_src(def->parent_instr, src_dominates_block, imm_dom); - } else if (def->parent_instr->type == nir_instr_type_load_const) { + if (nir_def_is_alu(def)) { + return nir_foreach_src(nir_def_instr(def), src_dominates_block, imm_dom); + } else if (nir_def_is_const(def)) { return true; } return false; @@ -136,7 +139,7 @@ remove_phis_instr(nir_builder *b, nir_phi_instr *phi, void *unused) def = nir_undef(b, phi->def.num_components, phi->def.bit_size); } else if (needs_remat) { b->cursor = nir_after_block_before_jump(block->imm_dom); - nir_instr *remat = nir_instr_clone(b->shader, def->parent_instr); + nir_instr *remat = nir_instr_clone(b->shader, nir_def_instr(def)); nir_builder_instr_insert(b, remat); def = nir_instr_def(remat); } diff --git a/src/compiler/nir/nir_opt_shrink_vectors.c b/src/compiler/nir/nir_opt_shrink_vectors.c index f3add2b4be6..50cb6e7b2e3 100644 --- a/src/compiler/nir/nir_opt_shrink_vectors.c +++ b/src/compiler/nir/nir_opt_shrink_vectors.c @@ -94,7 +94,7 @@ shrink_dest_to_read_mask(nir_def *def, bool shrink_start) nir_intrinsic_instr *intr = NULL; nir_src *offset_src = NULL; - if (def->parent_instr->type == nir_instr_type_intrinsic) { + if (nir_def_is_intrinsic(def)) { intr = nir_def_as_intrinsic(def); offset_src = nir_get_io_offset_src(intr); } @@ -555,7 +555,7 @@ opt_shrink_vectors_phi(nir_builder *b, nir_phi_instr *instr) * used only in the phi, the movs will disappear later after copy propagate. */ nir_foreach_phi_src(phi_src, instr) { - b->cursor = nir_after_instr_and_phis(phi_src->src.ssa->parent_instr); + b->cursor = nir_after_instr_and_phis(nir_def_instr(phi_src->src.ssa)); nir_alu_src alu_src = { .src = nir_src_for_ssa(phi_src->src.ssa) diff --git a/src/compiler/nir/nir_opt_sink.c b/src/compiler/nir/nir_opt_sink.c index 764c89c622e..d97336d2897 100644 --- a/src/compiler/nir/nir_opt_sink.c +++ b/src/compiler/nir/nir_opt_sink.c @@ -47,7 +47,7 @@ is_constant_like(nir_src *src) return true; /* Otherwise, look for constant-like intrinsics */ - nir_instr *parent = src->ssa->parent_instr; + nir_instr *parent = nir_def_instr(src->ssa); if (parent->type != nir_instr_type_intrinsic) return false; diff --git a/src/compiler/nir/nir_opt_undef.c b/src/compiler/nir/nir_opt_undef.c index 298a8d538ca..ca213199ba6 100644 --- a/src/compiler/nir/nir_opt_undef.c +++ b/src/compiler/nir/nir_opt_undef.c @@ -112,7 +112,7 @@ opt_undef_vecN(nir_builder *b, nir_alu_instr *alu) static uint32_t nir_get_undef_mask(nir_def *def) { - nir_instr *instr = def->parent_instr; + nir_instr *instr = nir_def_instr(def); if (instr->type == nir_instr_type_undef) return BITSET_MASK(def->num_components); diff --git a/src/compiler/nir/nir_opt_uniform_atomics.c b/src/compiler/nir/nir_opt_uniform_atomics.c index d91f9257015..47d08d2d579 100644 --- a/src/compiler/nir/nir_opt_uniform_atomics.c +++ b/src/compiler/nir/nir_opt_uniform_atomics.c @@ -132,7 +132,7 @@ match_invocation_comparison(nir_scalar scalar) return get_dim(nir_scalar_chase_alu_src(scalar, 1)); if (!nir_scalar_chase_alu_src(scalar, 1).def->divergent) return get_dim(nir_scalar_chase_alu_src(scalar, 0)); - } else if (scalar.def->parent_instr->type == nir_instr_type_intrinsic) { + } else if (nir_def_is_intrinsic(scalar.def)) { nir_intrinsic_instr *intrin = nir_def_as_intrinsic(scalar.def); if (intrin->intrinsic == nir_intrinsic_elect) { return 0x8; diff --git a/src/compiler/nir/nir_opt_uub.c b/src/compiler/nir/nir_opt_uub.c index d6cd918bcc7..19d50f5f72e 100644 --- a/src/compiler/nir/nir_opt_uub.c +++ b/src/compiler/nir/nir_opt_uub.c @@ -74,7 +74,7 @@ opt_uub_iand(nir_builder *b, nir_alu_instr *alu, opt_uub_state *state) if (uub(state, src) > low_mask) return false; - b->cursor = nir_after_instr(src.def->parent_instr); + b->cursor = nir_after_def(src.def); nir_def_replace(&alu->def, nir_mov_scalar(b, src)); return true; } @@ -283,7 +283,7 @@ opt_uub(nir_builder *b, nir_alu_instr *alu, void *data) /* If the upper bound is zero, zero is the only possible value. */ if (uub(state, nir_get_scalar(&alu->def, 0)) == 0) { - b->cursor = nir_after_instr(alu->def.parent_instr); + b->cursor = nir_after_def(&alu->def); nir_def_replace(&alu->def, nir_imm_zero(b, 1, alu->def.bit_size)); return true; } diff --git a/src/compiler/nir/nir_opt_varyings.c b/src/compiler/nir/nir_opt_varyings.c index 9678b3aa872..b7fd27a315d 100644 --- a/src/compiler/nir/nir_opt_varyings.c +++ b/src/compiler/nir/nir_opt_varyings.c @@ -1466,7 +1466,7 @@ gather_inputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_d if (linkage->consumer_stage == MESA_SHADER_TESS_CTRL && intr->intrinsic == nir_intrinsic_load_per_vertex_input) { nir_src *vertex_index_src = nir_get_io_arrayed_index_src(intr); - nir_instr *vertex_index_instr = vertex_index_src->ssa->parent_instr; + nir_instr *vertex_index_instr = nir_def_instr(vertex_index_src->ssa); if (!is_sysval(vertex_index_instr, SYSTEM_VALUE_INVOCATION_ID)) { if (intr->def.bit_size == 32) @@ -1506,8 +1506,7 @@ gather_outputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_ /* nir_lower_io_to_scalar is required before this */ assert(intr->src[0].ssa->num_components == 1); /* nit_opt_undef is required before this. */ - assert(intr->src[0].ssa->parent_instr->type != - nir_instr_type_undef); + assert(!nir_src_is_undef(intr->src[0])); } else { /* nir_lower_io_to_scalar is required before this */ assert(intr->def.num_components == 1); @@ -1648,7 +1647,7 @@ gather_outputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_ if (linkage->producer_stage == MESA_SHADER_MESH && intr->intrinsic == nir_intrinsic_store_per_vertex_output) { nir_src *vertex_index_src = nir_get_io_arrayed_index_src(intr); - nir_instr *vertex_index_instr = vertex_index_src->ssa->parent_instr; + nir_instr *vertex_index_instr = nir_def_instr(vertex_index_src->ssa); if (!is_sysval(vertex_index_instr, SYSTEM_VALUE_INVOCATION_ID)) { if (value.def->bit_size == 32) @@ -2171,7 +2170,7 @@ find_per_vertex_load_for_tes_interp(nir_instr *instr) unsigned num_srcs = nir_op_infos[alu->op].num_inputs; for (unsigned i = 0; i < num_srcs; i++) { - nir_instr *src = alu->src[i].src.ssa->parent_instr; + nir_instr *src = nir_def_instr(alu->src[i].src.ssa); nir_intrinsic_instr *intr = find_per_vertex_load_for_tes_interp(src); if (intr) @@ -2221,13 +2220,13 @@ static nir_def * clone_ssa_impl(struct linkage_info *linkage, nir_builder *b, nir_def *ssa) { struct hash_entry *entry = _mesa_hash_table_search(linkage->clones_ht, - ssa->parent_instr); + nir_def_instr(ssa)); if (entry) return entry->data; nir_def *clone = NULL; - switch (ssa->parent_instr->type) { + switch (nir_def_instr_type(ssa)) { case nir_instr_type_load_const: clone = nir_build_imm(b, ssa->num_components, ssa->bit_size, nir_def_as_load_const(ssa)->value); @@ -2344,7 +2343,7 @@ clone_ssa_impl(struct linkage_info *linkage, nir_builder *b, nir_def *ssa) UNREACHABLE("unexpected instruction type"); } - _mesa_hash_table_insert(linkage->clones_ht, ssa->parent_instr, clone); + _mesa_hash_table_insert(linkage->clones_ht, nir_def_instr(ssa), clone); return clone; } @@ -2388,7 +2387,7 @@ is_uniform_expression(nir_instr *instr, struct is_uniform_expr_state *state); static bool src_is_uniform_expression(nir_src *src, void *data) { - return is_uniform_expression(src->ssa->parent_instr, + return is_uniform_expression(nir_def_instr(src->ssa), (struct is_uniform_expr_state *)data); } @@ -2466,7 +2465,7 @@ propagate_uniform_expressions(struct linkage_info *linkage, */ nir_shader_clear_pass_flags(linkage->producer_builder.shader); - if (!is_uniform_expression(slot->producer.value.def->parent_instr, &state)) + if (!is_uniform_expression(nir_def_instr(slot->producer.value.def), &state)) continue; if (state.cost > linkage->max_varying_expression_cost) @@ -2613,7 +2612,7 @@ get_input_qualifier(struct linkage_info *linkage, unsigned i) assert(load->intrinsic == nir_intrinsic_load_interpolated_input); - nir_instr *baryc_instr = load->src[0].ssa->parent_instr; + nir_instr *baryc_instr = nir_def_instr(load->src[0].ssa); nir_intrinsic_instr *baryc = baryc_instr->type == nir_instr_type_intrinsic ? nir_instr_as_intrinsic(baryc_instr) : NULL; if (linkage->has_flexible_interp) { @@ -2872,7 +2871,7 @@ gather_fmul_tess_coord(nir_intrinsic_instr *load, nir_alu_instr *fmul, unsigned *tess_coord_used, nir_def **load_tess_coord) { unsigned other_src = fmul->src[0].src.ssa == &load->def; - nir_instr *other_instr = fmul->src[other_src].src.ssa->parent_instr; + nir_instr *other_instr = nir_def_instr(fmul->src[other_src].src.ssa); assert(fmul->src[!other_src].swizzle[0] == 0); @@ -3110,7 +3109,7 @@ find_open_coded_tes_input_interpolation(struct linkage_info *linkage) (!((instr)->pass_flags & (FLAG_MOVABLE | FLAG_UNMOVABLE))) #define GET_SRC_INTERP(alu, i) \ - ((alu)->src[i].src.ssa->parent_instr->pass_flags & FLAG_INTERP_MASK) + (nir_def_instr((alu)->src[i].src.ssa)->pass_flags & FLAG_INTERP_MASK) static bool can_move_alu_across_interp(struct linkage_info *linkage, nir_alu_instr *alu) @@ -3206,7 +3205,7 @@ update_movable_flags(struct linkage_info *linkage, nir_instr *instr) alu_interp = FLAG_INTERP_CONVERGENT; for (unsigned i = 0; i < num_srcs; i++) { - nir_instr *src_instr = alu->src[i].src.ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(alu->src[i].src.ssa); if (NEED_UPDATE_MOVABLE_FLAGS(src_instr)) update_movable_flags(linkage, src_instr); @@ -3262,7 +3261,7 @@ update_movable_flags(struct linkage_info *linkage, nir_instr *instr) nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); if (intr->intrinsic == nir_intrinsic_load_deref) { - nir_instr *deref = intr->src[0].ssa->parent_instr; + nir_instr *deref = nir_def_instr(intr->src[0].ssa); if (NEED_UPDATE_MOVABLE_FLAGS(deref)) update_movable_flags(linkage, deref); @@ -3305,7 +3304,7 @@ update_movable_flags(struct linkage_info *linkage, nir_instr *instr) return; case nir_deref_type_array: { - nir_instr *index = deref->arr.index.ssa->parent_instr; + nir_instr *index = nir_def_instr(deref->arr.index.ssa); if (NEED_UPDATE_MOVABLE_FLAGS(index)) update_movable_flags(linkage, index); @@ -3370,7 +3369,7 @@ gather_used_input_loads(nir_instr *instr, unsigned num_srcs = nir_op_infos[alu->op].num_inputs; for (unsigned i = 0; i < num_srcs; i++) { - gather_used_input_loads(alu->src[i].src.ssa->parent_instr, + gather_used_input_loads(nir_def_instr(alu->src[i].src.ssa), loads, num_loads); } return; @@ -3384,7 +3383,7 @@ gather_used_input_loads(nir_instr *instr, return; case nir_intrinsic_load_deref: - gather_used_input_loads(intr->src[0].ssa->parent_instr, + gather_used_input_loads(nir_def_instr(intr->src[0].ssa), loads, num_loads); return; @@ -3417,7 +3416,7 @@ gather_used_input_loads(nir_instr *instr, return; case nir_deref_type_array: - gather_used_input_loads(deref->arr.index.ssa->parent_instr, + gather_used_input_loads(nir_def_instr(deref->arr.index.ssa), loads, num_loads); return; @@ -3509,7 +3508,7 @@ try_move_postdominator(struct linkage_info *linkage, unsigned slot_index = final_slot; struct scalar_slot *slot = &linkage->slot[slot_index]; nir_builder *b = &linkage->consumer_builder; - b->cursor = nir_after_instr(load_def->parent_instr); + b->cursor = nir_after_instr(nir_def_instr(load_def)); nir_def *postdom_def = nir_instr_def(postdom); unsigned alu_interp = postdom->pass_flags & FLAG_INTERP_MASK; nir_def *new_input, *new_tes_loads[3]; @@ -3905,18 +3904,18 @@ backward_inter_shader_code_motion(struct linkage_info *linkage, if (linkage->producer_stage == MESA_SHADER_VERTEX) { /* VS -> TES has no constraints on VS stores. */ load_def = &slot->consumer.tes_interp_load->def; - load_def->parent_instr->pass_flags |= FLAG_ALU_IS_TES_INTERP_LOAD | - slot->consumer.tes_interp_mode; + nir_def_instr(load_def)->pass_flags |= FLAG_ALU_IS_TES_INTERP_LOAD | + slot->consumer.tes_interp_mode; } else { assert(linkage->producer_stage == MESA_SHADER_TESS_CTRL); assert(store->intrinsic == nir_intrinsic_store_per_vertex_output); /* The vertex index of the store must InvocationID. */ - if (is_sysval(store->src[1].ssa->parent_instr, + if (is_sysval(nir_def_instr(store->src[1].ssa), SYSTEM_VALUE_INVOCATION_ID)) { load_def = &slot->consumer.tes_interp_load->def; - load_def->parent_instr->pass_flags |= FLAG_ALU_IS_TES_INTERP_LOAD | - slot->consumer.tes_interp_mode; + nir_def_instr(load_def)->pass_flags |= FLAG_ALU_IS_TES_INTERP_LOAD | + slot->consumer.tes_interp_mode; } else { continue; } @@ -3945,7 +3944,7 @@ backward_inter_shader_code_motion(struct linkage_info *linkage, switch (load->intrinsic) { case nir_intrinsic_load_interpolated_input: { assert(linkage->consumer_stage == MESA_SHADER_FRAGMENT); - nir_instr *baryc_instr = load->src[0].ssa->parent_instr; + nir_instr *baryc_instr = nir_def_instr(load->src[0].ssa); /* This is either lowered barycentric_at_offset/at_sample or user * barycentrics. Treat it like barycentric_at_offset. @@ -4011,7 +4010,7 @@ backward_inter_shader_code_motion(struct linkage_info *linkage, } } - load_def->parent_instr->pass_flags |= FLAG_MOVABLE; + nir_def_instr(load_def)->pass_flags |= FLAG_MOVABLE; /* Disallow transform feedback. The load is "movable" for the purpose of * finding a movable post-dominator, we just can't rewrite the store @@ -4053,7 +4052,7 @@ backward_inter_shader_code_motion(struct linkage_info *linkage, for (unsigned i = 0; i < num_movable_loads; i++) { nir_def *load_def = movable_loads[i].def; - nir_instr *iter = load_def->parent_instr; + nir_instr *iter = nir_def_instr(load_def); nir_instr *movable_postdom = NULL; /* Find the farthest post-dominator that is movable. */ @@ -4087,10 +4086,8 @@ backward_inter_shader_code_motion(struct linkage_info *linkage, alu->src[0].src.ssa == load_def) || (nir_op_infos[alu->op].num_inputs == 2 && ((alu->src[0].src.ssa == load_def && - alu->src[1].src.ssa->parent_instr->type == - nir_instr_type_load_const) || - (alu->src[0].src.ssa->parent_instr->type == - nir_instr_type_load_const && + nir_src_is_const(alu->src[1].src)) || + (nir_src_is_const(alu->src[0].src) && alu->src[1].src.ssa == load_def))))) continue; diff --git a/src/compiler/nir/nir_opt_vectorize.c b/src/compiler/nir/nir_opt_vectorize.c index 0a433855bb6..987dee341a1 100644 --- a/src/compiler/nir/nir_opt_vectorize.c +++ b/src/compiler/nir/nir_opt_vectorize.c @@ -81,7 +81,7 @@ hash_phi_src(uint32_t hash, const nir_phi_instr *phi, const nir_phi_src *src, } else if (src->pred->index < phi->instr.block->index) { hash = HASH(hash, chased.def); } else { - nir_instr *chased_instr = chased.def->parent_instr; + nir_instr *chased_instr = nir_def_instr(chased.def); hash = HASH(hash, chased_instr->type); if (chased_instr->type == nir_instr_type_alu) @@ -178,8 +178,8 @@ phi_srcs_equal(nir_block *block, const nir_phi_src *src1, * (forward-edge) sources are vectorized, chances are the back-edge will * also be vectorized. */ - nir_instr *chased_instr1 = chased1.def->parent_instr; - nir_instr *chased_instr2 = chased2.def->parent_instr; + nir_instr *chased_instr1 = nir_def_instr(chased1.def); + nir_instr *chased_instr2 = nir_def_instr(chased2.def); if (chased_instr1->type != chased_instr2->type) return false; @@ -346,8 +346,8 @@ rewrite_uses(nir_builder *b, struct set *instr_set, nir_def *def1, nir_def_rewrite_uses(def2, new_def2); } - nir_instr_remove(def1->parent_instr); - nir_instr_remove(def2->parent_instr); + nir_instr_remove(nir_def_instr(def1)); + nir_instr_remove(nir_def_instr(def2)); } static nir_instr * @@ -412,7 +412,7 @@ instr_try_combine_phi(struct set *instr_set, nir_phi_instr *phi1, nir_phi_instr swizzle[i] = new_srcs[i].comp; } - b.cursor = nir_after_instr_and_phis(def->parent_instr); + b.cursor = nir_after_instr_and_phis(nir_def_instr(def)); new_src = nir_swizzle(&b, def, swizzle, total_components); } else { /* This is a loop back-edge so we haven't vectorized the sources yet. diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index 2197bc572fd..a90ba4dd5b6 100644 --- a/src/compiler/nir/nir_print.c +++ b/src/compiler/nir/nir_print.c @@ -148,8 +148,8 @@ print_def(nir_def *def, print_state *state) def->bit_size, sizes[def->num_components], padding, "", state->def_prefix, def->index); - if (def->parent_instr->has_debug_info) { - nir_instr_debug_info *debug_info = nir_instr_get_debug_info(def->parent_instr); + if (nir_def_instr(def)->has_debug_info) { + nir_instr_debug_info *debug_info = nir_instr_get_debug_info(nir_def_instr(def)); if (debug_info->variable_name) fprintf(fp, ".%s", debug_info->variable_name); } @@ -407,7 +407,7 @@ print_src(const nir_src *src, print_state *state, nir_alu_type src_type) { FILE *fp = state->fp; fprintf(fp, "%s%u", state->def_prefix, src->ssa->index); - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); if (instr->has_debug_info) { nir_instr_debug_info *debug_info = nir_instr_get_debug_info(instr); diff --git a/src/compiler/nir/nir_range_analysis.c b/src/compiler/nir/nir_range_analysis.c index 18d79b5caf0..32d6b0fa3c6 100644 --- a/src/compiler/nir/nir_range_analysis.c +++ b/src/compiler/nir/nir_range_analysis.c @@ -492,7 +492,7 @@ get_fp_key(struct analysis_query *q) struct fp_query *fp_q = (struct fp_query *)q; const nir_src *src = &fp_q->instr->src[fp_q->src].src; - if (src->ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_def_is_alu(src->ssa)) return 0; uintptr_t type_encoding; @@ -589,7 +589,7 @@ process_fp_query(struct analysis_state *state, struct analysis_query *aq, uint32 return; } - if (instr->src[src].src.ssa->parent_instr->type != nir_instr_type_alu) { + if (!nir_src_is_alu(instr->src[src].src)) { *result = pack_data((struct ssa_result_range){ unknown, false, false, false }); return; } @@ -1527,7 +1527,7 @@ search_phi_bcsel(nir_scalar scalar, nir_scalar *buf, unsigned buf_size, struct s return 0; _mesa_set_add(visited, scalar.def); - if (scalar.def->parent_instr->type == nir_instr_type_phi) { + if (nir_def_instr_type(scalar.def) == nir_instr_type_phi) { nir_phi_instr *phi = nir_def_as_phi(scalar.def); unsigned num_sources_left = exec_list_length(&phi->srcs); if (buf_size >= num_sources_left) { @@ -2158,7 +2158,7 @@ process_uub_query(struct analysis_state *state, struct analysis_query *aq, uint3 get_intrinsic_uub(state, q, result, src); else if (nir_scalar_is_alu(q.scalar)) get_alu_uub(state, q, result, src); - else if (q.scalar.def->parent_instr->type == nir_instr_type_phi) + else if (nir_def_instr_type(q.scalar.def) == nir_instr_type_phi) get_phi_uub(state, q, result, src); } diff --git a/src/compiler/nir/nir_repair_ssa.c b/src/compiler/nir/nir_repair_ssa.c index 4cc7d7c7968..80be50b9bfd 100644 --- a/src/compiler/nir/nir_repair_ssa.c +++ b/src/compiler/nir/nir_repair_ssa.c @@ -113,7 +113,7 @@ repair_ssa_def(nir_def *def, void *void_state) * deref information. */ if (!nir_src_is_if(src) && - def->parent_instr->type == nir_instr_type_deref && + nir_def_is_deref(def) && nir_src_parent_instr(src)->type == nir_instr_type_deref && nir_instr_as_deref(nir_src_parent_instr(src))->deref_type != nir_deref_type_cast) { nir_deref_instr *cast = diff --git a/src/compiler/nir/nir_schedule.c b/src/compiler/nir/nir_schedule.c index 967f5b389f9..76477b62b6d 100644 --- a/src/compiler/nir/nir_schedule.c +++ b/src/compiler/nir/nir_schedule.c @@ -274,7 +274,7 @@ nir_schedule_ssa_deps(nir_def *def, void *in_state) { nir_deps_state *state = in_state; struct hash_table *instr_map = state->scoreboard->instr_map; - nir_schedule_node *def_n = nir_schedule_get_node(instr_map, def->parent_instr); + nir_schedule_node *def_n = nir_schedule_get_node(instr_map, nir_def_instr(def)); nir_foreach_use(src, def) { nir_schedule_node *use_n = nir_schedule_get_node(instr_map, @@ -908,7 +908,7 @@ nir_schedule_mark_src_scheduled(nir_src *src, void *state) * they're often folded as immediates into backend instructions and have * many unrelated instructions all referencing the same value (0). */ - if (src->ssa->parent_instr->type != nir_instr_type_load_const) { + if (!nir_def_is_const(src->ssa)) { nir_foreach_use(other_src, src->ssa) { if (nir_src_parent_instr(other_src) == nir_src_parent_instr(src)) continue; @@ -943,7 +943,7 @@ nir_schedule_mark_def_scheduled(nir_def *def, void *state) { nir_schedule_scoreboard *scoreboard = state; - nir_schedule_mark_use(scoreboard, def, def->parent_instr, + nir_schedule_mark_use(scoreboard, def, nir_def_instr(def), nir_schedule_def_pressure(def)); return true; @@ -1185,8 +1185,8 @@ nir_schedule_ssa_def_init_scoreboard(nir_def *def, void *state) /* We don't consider decl_reg to be a use to avoid extending register live * ranges any further than needed. */ - if (!is_decl_reg(def->parent_instr)) - _mesa_set_add(def_uses, def->parent_instr); + if (!is_decl_reg(nir_def_instr(def))) + _mesa_set_add(def_uses, nir_def_instr(def)); nir_foreach_use(src, def) { _mesa_set_add(def_uses, nir_src_parent_instr(src)); diff --git a/src/compiler/nir/nir_search.c b/src/compiler/nir/nir_search.c index 4a98bd7dca6..0a7933e006f 100644 --- a/src/compiler/nir/nir_search.c +++ b/src/compiler/nir/nir_search.c @@ -82,7 +82,7 @@ src_is_type(nir_src src, nir_alu_type type) { assert(type != nir_type_invalid); - if (src.ssa->parent_instr->type == nir_instr_type_alu) { + if (nir_src_is_alu(src)) { nir_alu_instr *src_alu = nir_def_as_alu(src.ssa); nir_alu_type output_type = nir_op_infos[src_alu->op].output_type; @@ -101,7 +101,7 @@ src_is_type(nir_src src, nir_alu_type type) } return nir_alu_type_get_base_type(output_type) == type; - } else if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) { + } else if (nir_src_is_intrinsic(src)) { nir_intrinsic_instr *intr = nir_def_as_intrinsic(src.ssa); if (type == nir_type_bool) { @@ -263,7 +263,7 @@ match_value(const nir_algebraic_table *table, switch (value->type) { case nir_search_value_expression: - if (instr->src[src].src.ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_src_is_alu(instr->src[src].src)) return false; return match_expression(table, nir_search_value_as_expression(value), @@ -275,7 +275,7 @@ match_value(const nir_algebraic_table *table, assert(var->variable < NIR_SEARCH_MAX_VARIABLES); if (var->is_constant && - instr->src[src].src.ssa->parent_instr->type != nir_instr_type_load_const) + !nir_src_is_const(instr->src[src].src)) return false; if (var->cond_index != -1 && !table->variable_cond[var->cond_index](state->state, instr, @@ -508,7 +508,7 @@ construct_value(nir_builder *build, assert(def->index == util_dynarray_num_elements(state->states, uint16_t)); util_dynarray_append_typed(state->states, uint16_t, 0); - nir_algebraic_automaton(def->parent_instr, state->states, state->pass_op_table); + nir_algebraic_automaton(nir_def_instr(def), state->states, state->pass_op_table); nir_alu_src val; val.src = nir_src_for_ssa(def); @@ -560,7 +560,7 @@ construct_value(nir_builder *build, assert(cval->index == util_dynarray_num_elements(state->states, uint16_t)); util_dynarray_append_typed(state->states, uint16_t, 0); - nir_algebraic_automaton(cval->parent_instr, state->states, + nir_algebraic_automaton(nir_def_instr(cval), state->states, state->pass_op_table); nir_alu_src val; @@ -758,7 +758,7 @@ nir_replace_instr(nir_builder *build, nir_alu_instr *instr, * keeping algebraic optimizations and code motion optimizations separate * seems safest. */ - nir_alu_instr *const src_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *const src_instr = nir_src_as_alu(instr->src[0].src); if (src_instr != NULL && (instr->op == nir_op_fneg || instr->op == nir_op_fabs || instr->op == nir_op_ineg || instr->op == nir_op_iabs || @@ -791,14 +791,14 @@ nir_replace_instr(nir_builder *build, nir_alu_instr *instr, nir_mov_alu(build, val, instr->def.num_components); if (ssa_val->index == util_dynarray_num_elements(states, uint16_t)) { util_dynarray_append_typed(states, uint16_t, 0); - nir_algebraic_automaton(ssa_val->parent_instr, states, table->pass_op_table); + nir_algebraic_automaton(nir_def_instr(ssa_val), states, table->pass_op_table); } /* Rewrite the uses of the old SSA value to the new one, and recurse * through the uses updating the automaton's state. */ nir_def_rewrite_uses(&instr->def, ssa_val); - nir_algebraic_update_automaton(ssa_val->parent_instr, algebraic_worklist, + nir_algebraic_update_automaton(nir_def_instr(ssa_val), algebraic_worklist, states, table->pass_op_table); /* Nothing uses the instr any more, so drop it out of the program. Note diff --git a/src/compiler/nir/nir_search_helpers.h b/src/compiler/nir/nir_search_helpers.h index fd032a256c1..ea21eb72d83 100644 --- a/src/compiler/nir/nir_search_helpers.h +++ b/src/compiler/nir/nir_search_helpers.h @@ -444,7 +444,7 @@ is_not_fmul(const nir_search_state *state, const nir_alu_instr *instr, unsigned UNUSED unsigned num_components, UNUSED const uint8_t *swizzle) { nir_alu_instr *src_alu = - nir_src_as_alu_instr(instr->src[src].src); + nir_src_as_alu(instr->src[src].src); if (src_alu == NULL) return true; @@ -460,7 +460,7 @@ is_fmul(const nir_search_state *state, const nir_alu_instr *instr, unsigned src, UNUSED unsigned num_components, UNUSED const uint8_t *swizzle) { nir_alu_instr *src_alu = - nir_src_as_alu_instr(instr->src[src].src); + nir_src_as_alu(instr->src[src].src); if (src_alu == NULL) return false; @@ -476,13 +476,13 @@ is_fsign(const nir_alu_instr *instr, unsigned src, UNUSED unsigned num_components, UNUSED const uint8_t *swizzle) { nir_alu_instr *src_alu = - nir_src_as_alu_instr(instr->src[src].src); + nir_src_as_alu(instr->src[src].src); if (src_alu == NULL) return false; if (src_alu->op == nir_op_fneg) - src_alu = nir_src_as_alu_instr(src_alu->src[0].src); + src_alu = nir_src_as_alu(src_alu->src[0].src); return src_alu != NULL && src_alu->op == nir_op_fsign; } diff --git a/src/compiler/nir/nir_split_vars.c b/src/compiler/nir/nir_split_vars.c index 8ff28cbeac7..10547eba90b 100644 --- a/src/compiler/nir/nir_split_vars.c +++ b/src/compiler/nir/nir_split_vars.c @@ -1258,7 +1258,7 @@ get_non_self_referential_store_comps(nir_intrinsic_instr *store) { nir_component_mask_t comps = nir_intrinsic_write_mask(store); - nir_instr *src_instr = store->src[1].ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(store->src[1].ssa); if (src_instr->type != nir_instr_type_alu) return comps; diff --git a/src/compiler/nir/nir_to_lcssa.c b/src/compiler/nir/nir_to_lcssa.c index afeb59359f5..be6d7c5fadd 100644 --- a/src/compiler/nir/nir_to_lcssa.c +++ b/src/compiler/nir/nir_to_lcssa.c @@ -92,7 +92,7 @@ is_use_inside_loop(nir_src *use, nir_loop *loop) static bool is_defined_before_loop(nir_def *def, nir_loop *loop) { - nir_instr *instr = def->parent_instr; + nir_instr *instr = nir_def_instr(def); nir_block *block_before_loop = nir_cf_node_as_block(nir_cf_node_prev(&loop->cf_node)); @@ -114,10 +114,12 @@ def_is_invariant(nir_def *def, nir_loop *loop) if (is_defined_before_loop(def, loop)) return invariant; - if (def->parent_instr->pass_flags == undefined) - def->parent_instr->pass_flags = instr_is_invariant(def->parent_instr, loop); + nir_instr *instr = nir_def_instr(def); - return def->parent_instr->pass_flags == invariant; + if (instr->pass_flags == undefined) + instr->pass_flags = instr_is_invariant(instr, loop); + + return instr->pass_flags == invariant; } static bool @@ -196,8 +198,8 @@ convert_loop_exit_for_ssa(nir_def *def, void *void_state) /* Don't create LCSSA-Phis for loop-invariant variables */ if (state->skip_invariants && (def->bit_size != 1 || state->skip_bool_invariants)) { - assert(def->parent_instr->pass_flags != undefined); - if (def->parent_instr->pass_flags == invariant) + assert(nir_def_instr(def)->pass_flags != undefined); + if (nir_def_instr(def)->pass_flags == invariant) return true; } @@ -223,7 +225,7 @@ convert_loop_exit_for_ssa(nir_def *def, void *void_state) if (all_uses_inside_loop) return true; - if (def->parent_instr->type == nir_instr_type_deref) { + if (nir_def_is_deref(def)) { nir_rematerialize_deref_in_use_blocks(nir_def_as_deref(def)); return true; } diff --git a/src/compiler/nir/nir_trivialize_registers.c b/src/compiler/nir/nir_trivialize_registers.c index 49ed608ab88..d839ccff6b3 100644 --- a/src/compiler/nir/nir_trivialize_registers.c +++ b/src/compiler/nir/nir_trivialize_registers.c @@ -116,7 +116,7 @@ trivialize_src(nir_src *src, void *state_) { struct trivialize_src_state *state = state_; - nir_instr *parent = src->ssa->parent_instr; + nir_instr *parent = nir_def_instr(src->ssa); if (parent->type != nir_instr_type_intrinsic) return true; @@ -429,7 +429,7 @@ trivialize_stores(nir_function_impl *impl, nir_block *block) nontrivial |= !list_is_singular(&value->uses); /* SSA-only instruction types */ - nir_instr *parent = value->parent_instr; + nir_instr *parent = nir_def_instr(value); nontrivial |= (parent->type == nir_instr_type_load_const) || (parent->type == nir_instr_type_undef); diff --git a/src/compiler/nir/nir_unlower_io_to_vars.c b/src/compiler/nir/nir_unlower_io_to_vars.c index acf3d0b4c51..8202fd7e841 100644 --- a/src/compiler/nir/nir_unlower_io_to_vars.c +++ b/src/compiler/nir/nir_unlower_io_to_vars.c @@ -140,7 +140,7 @@ parse_intrinsic(nir_shader *nir, nir_intrinsic_instr *intr, } if (intr->intrinsic == nir_intrinsic_load_interpolated_input && - intr->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic) + nir_src_is_intrinsic(intr->src[0])) desc->baryc = nir_def_as_intrinsic(intr->src[0].ssa); /* Find the variable if it exists. */ diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c index 54dd8d6bcbe..f2d5ec0f414 100644 --- a/src/compiler/nir/nir_validate.c +++ b/src/compiler/nir/nir_validate.c @@ -227,7 +227,6 @@ validate_def(nir_def *def, validate_state *state) validate_assert(state, !BITSET_TEST(state->ssa_defs_found, def->index)); BITSET_SET(state->ssa_defs_found, def->index); - validate_assert(state, def->parent_instr == state->instr); validate_num_components(state, def->num_components); list_validate(&def->uses); @@ -353,7 +352,7 @@ validate_deref_instr(nir_deref_instr *instr, validate_state *state) validate_sized_src(&instr->parent, state, instr->def.bit_size, instr->def.num_components); - nir_instr *parent_instr = instr->parent.ssa->parent_instr; + nir_instr *parent_instr = nir_def_instr(instr->parent.ssa); /* The parent must come from another deref instruction */ validate_assert(state, parent_instr->type == nir_instr_type_deref); @@ -483,7 +482,7 @@ validate_register_handle(nir_src handle_src, validate_state *state) { nir_def *handle = handle_src.ssa; - nir_instr *parent = handle->parent_instr; + nir_instr *parent = nir_def_instr(handle); if (!validate_assert(state, parent->type == nir_instr_type_intrinsic)) return; @@ -892,7 +891,7 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state) validate_assert(state, (nir_src_is_const(*offset_src) && nir_src_as_uint(*offset_src) == 0) || - offset_src->ssa->parent_instr->type == nir_instr_type_phi); + nir_def_is_phi(offset_src->ssa)); } } } diff --git a/src/compiler/nir/nir_worklist.c b/src/compiler/nir/nir_worklist.c index 31b7a03b28a..a22add5971f 100644 --- a/src/compiler/nir/nir_worklist.c +++ b/src/compiler/nir/nir_worklist.c @@ -36,7 +36,7 @@ static bool nir_instr_worklist_add_srcs_cb(nir_src *src, void *state) { nir_instr_worklist *wl = state; - nir_instr_worklist_push_tail(wl, src->ssa->parent_instr); + nir_instr_worklist_push_tail(wl, nir_def_instr(src->ssa)); return true; } diff --git a/src/compiler/nir/tests/core_tests.cpp b/src/compiler/nir/tests/core_tests.cpp index 27a8395b8c2..0bf22bd4e61 100644 --- a/src/compiler/nir/tests/core_tests.cpp +++ b/src/compiler/nir/tests/core_tests.cpp @@ -73,13 +73,13 @@ TEST_F(nir_core_test, nir_instr_free_and_dce_test) nir_def *add01 = nir_iadd(b, zero, one); nir_def *add11 = nir_iadd(b, one, one); - nir_cursor c = nir_instr_free_and_dce(add01->parent_instr); + nir_cursor c = nir_instr_free_and_dce(nir_def_instr(add01)); ASSERT_FALSE(shader_contains_def(add01)); ASSERT_TRUE(shader_contains_def(add11)); ASSERT_FALSE(shader_contains_def(zero)); ASSERT_TRUE(shader_contains_def(one)); - ASSERT_TRUE(nir_cursors_equal(c, nir_before_instr(add11->parent_instr))); + ASSERT_TRUE(nir_cursors_equal(c, nir_before_def(add11))); nir_validate_shader(b->shader, "after remove_and_dce"); } @@ -89,11 +89,11 @@ TEST_F(nir_core_test, nir_instr_free_and_dce_all_test) nir_def *one = nir_imm_int(b, 1); nir_def *add = nir_iadd(b, one, one); - nir_cursor c = nir_instr_free_and_dce(add->parent_instr); + nir_cursor c = nir_instr_free_and_dce(nir_def_instr(add)); ASSERT_FALSE(shader_contains_def(add)); ASSERT_FALSE(shader_contains_def(one)); - ASSERT_TRUE(nir_cursors_equal(c, nir_before_block(nir_start_block(b->impl)))); + ASSERT_TRUE(nir_cursors_equal(c, nir_before_impl(b->impl))); nir_validate_shader(b->shader, "after remove_and_dce"); } @@ -107,12 +107,12 @@ TEST_F(nir_core_test, nir_instr_free_and_dce_multiple_src_test) * nir_instr_remove for instructions with srcs. */ nir_def *add2 = nir_iadd(b, add, add); - nir_cursor c = nir_instr_free_and_dce(add2->parent_instr); + nir_cursor c = nir_instr_free_and_dce(nir_def_instr(add2)); ASSERT_FALSE(shader_contains_def(add2)); ASSERT_FALSE(shader_contains_def(add)); ASSERT_FALSE(shader_contains_def(one)); - ASSERT_TRUE(nir_cursors_equal(c, nir_before_block(nir_start_block(b->impl)))); + ASSERT_TRUE(nir_cursors_equal(c, nir_before_impl(b->impl))); nir_validate_shader(b->shader, "after remove_and_dce"); } diff --git a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp index ced3da44878..d49cdad94df 100644 --- a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp +++ b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp @@ -21,6 +21,7 @@ * DEALINGS IN THE SOFTWARE. */ +#include "nir.h" #include "nir_test.h" /* This is a macro so you get good line numbers */ @@ -66,8 +67,8 @@ protected: void create_shared_store(nir_deref_instr *deref, uint32_t id, unsigned bit_size=32, unsigned components=1, unsigned wrmask=0xf); - bool test_alu(nir_instr *instr, nir_op op); - bool test_alu_def(nir_instr *instr, unsigned index, nir_def *def, unsigned swizzle=0); + bool test_alu(nir_def *def, nir_op op); + bool test_alu_def(nir_def *def1, unsigned index, nir_def *def2, unsigned swizzle=0); static bool mem_vectorize_callback(unsigned align_mul, unsigned align_offset, unsigned bit_size, @@ -321,22 +322,23 @@ void nir_load_store_vectorize_test::create_shared_store( nir_store_deref(b, deref, value, wrmask & ((1 << components) - 1)); } -bool nir_load_store_vectorize_test::test_alu(nir_instr *instr, nir_op op) +bool nir_load_store_vectorize_test::test_alu(nir_def *def, nir_op op) { - return instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->op == op; + return nir_def_instr(def)->type == nir_instr_type_alu && + nir_instr_as_alu(nir_def_instr(def))->op == op; } bool nir_load_store_vectorize_test::test_alu_def( - nir_instr *instr, unsigned index, nir_def *def, unsigned swizzle) + nir_def *def1, unsigned index, nir_def *def2, unsigned swizzle) { - if (instr->type != nir_instr_type_alu) + if (nir_def_instr(def1)->type != nir_instr_type_alu) return false; - nir_alu_instr *alu = nir_instr_as_alu(instr); + nir_alu_instr *alu = nir_instr_as_alu(nir_def_instr(def1)); if (index >= nir_op_infos[alu->op].num_inputs) return false; - if (alu->src[index].src.ssa != def) + if (alu->src[index].src.ssa != def2) return false; if (alu->src[index].swizzle[0] != swizzle) return false; @@ -615,9 +617,9 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_indirect_neg_stride) EXPECT_INSTR_SWIZZLES(movs[0x2], load, "y"); /* nir_opt_algebraic optimizes the imul */ - ASSERT_TRUE(test_alu(load->src[1].ssa->parent_instr, nir_op_ineg)); + ASSERT_TRUE(test_alu(load->src[1].ssa, nir_op_ineg)); nir_def *offset = nir_def_as_alu(load->src[1].ssa)->src[0].src.ssa; - ASSERT_TRUE(test_alu(offset->parent_instr, nir_op_ishl)); + ASSERT_TRUE(test_alu(offset, nir_op_ishl)); nir_alu_instr *shl = nir_def_as_alu(offset); ASSERT_EQ(shl->src[0].src.ssa, inv_plus_one); ASSERT_EQ(nir_src_as_uint(shl->src[1].src), 2); @@ -957,15 +959,15 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_8_8_16) nir_def *val = loads[0x3]->src.ssa; ASSERT_EQ(val->bit_size, 16); ASSERT_EQ(val->num_components, 1); - ASSERT_TRUE(test_alu(val->parent_instr, nir_op_ior)); + ASSERT_TRUE(test_alu(val, nir_op_ior)); nir_def *low = nir_def_as_alu(val)->src[0].src.ssa; nir_def *high = nir_def_as_alu(val)->src[1].src.ssa; - ASSERT_TRUE(test_alu(high->parent_instr, nir_op_ishl)); + ASSERT_TRUE(test_alu(high, nir_op_ishl)); high = nir_def_as_alu(high)->src[0].src.ssa; - ASSERT_TRUE(test_alu(low->parent_instr, nir_op_u2u16)); - ASSERT_TRUE(test_alu(high->parent_instr, nir_op_u2u16)); - ASSERT_TRUE(test_alu_def(low->parent_instr, 0, &load->def, 2)); - ASSERT_TRUE(test_alu_def(high->parent_instr, 0, &load->def, 3)); + ASSERT_TRUE(test_alu(low, nir_op_u2u16)); + ASSERT_TRUE(test_alu(high, nir_op_u2u16)); + ASSERT_TRUE(test_alu_def(low, 0, &load->def, 2)); + ASSERT_TRUE(test_alu_def(high, 0, &load->def, 3)); } TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_32_32_64) @@ -989,7 +991,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_32_32_64) nir_def *val = loads[0x2]->src.ssa; ASSERT_EQ(val->bit_size, 64); ASSERT_EQ(val->num_components, 1); - ASSERT_TRUE(test_alu(val->parent_instr, nir_op_pack_64_2x32)); + ASSERT_TRUE(test_alu(val, nir_op_pack_64_2x32)); nir_alu_instr *pack = nir_def_as_alu(val); EXPECT_INSTR_SWIZZLES(pack, load, "zw"); } @@ -1016,14 +1018,14 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_adjacent_32_32_64_64) nir_def *val = loads[0x2]->src.ssa; ASSERT_EQ(val->bit_size, 64); ASSERT_EQ(val->num_components, 1); - ASSERT_TRUE(test_alu(val->parent_instr, nir_op_mov)); + ASSERT_TRUE(test_alu(val, nir_op_mov)); nir_alu_instr *mov = nir_def_as_alu(val); EXPECT_INSTR_SWIZZLES(mov, load, "y"); val = loads[0x1]->src.ssa; ASSERT_EQ(val->bit_size, 32); ASSERT_EQ(val->num_components, 2); - ASSERT_TRUE(test_alu(val->parent_instr, nir_op_unpack_64_2x32)); + ASSERT_TRUE(test_alu(val, nir_op_unpack_64_2x32)); nir_alu_instr *unpack = nir_def_as_alu(val); EXPECT_INSTR_SWIZZLES(unpack, load, "x"); } @@ -1049,7 +1051,7 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_intersecting_32_32_64) nir_def *val = loads[0x2]->src.ssa; ASSERT_EQ(val->bit_size, 64); ASSERT_EQ(val->num_components, 1); - ASSERT_TRUE(test_alu(val->parent_instr, nir_op_pack_64_2x32)); + ASSERT_TRUE(test_alu(val, nir_op_pack_64_2x32)); nir_alu_instr *pack = nir_def_as_alu(val); EXPECT_INSTR_SWIZZLES(pack, load, "yz"); } @@ -1470,10 +1472,10 @@ TEST_F(nir_load_store_vectorize_test, shared_load_bool) ASSERT_EQ(deref->var, var); /* The loaded value is converted to Boolean by (loaded != 0). */ - ASSERT_TRUE(test_alu(loads[0x1]->src.ssa->parent_instr, nir_op_ine)); - ASSERT_TRUE(test_alu(loads[0x2]->src.ssa->parent_instr, nir_op_ine)); - ASSERT_TRUE(test_alu_def(loads[0x1]->src.ssa->parent_instr, 0, &load->def, 0)); - ASSERT_TRUE(test_alu_def(loads[0x2]->src.ssa->parent_instr, 0, &load->def, 1)); + ASSERT_TRUE(test_alu(loads[0x1]->src.ssa, nir_op_ine)); + ASSERT_TRUE(test_alu(loads[0x2]->src.ssa, nir_op_ine)); + ASSERT_TRUE(test_alu_def(loads[0x1]->src.ssa, 0, &load->def, 0)); + ASSERT_TRUE(test_alu_def(loads[0x2]->src.ssa, 0, &load->def, 1)); } TEST_F(nir_load_store_vectorize_test, shared_load_bool_mixed) @@ -1510,8 +1512,8 @@ TEST_F(nir_load_store_vectorize_test, shared_load_bool_mixed) ASSERT_EQ(deref->var, var); /* The loaded value is converted to Boolean by (loaded != 0). */ - ASSERT_TRUE(test_alu(loads[0x1]->src.ssa->parent_instr, nir_op_ine)); - ASSERT_TRUE(test_alu_def(loads[0x1]->src.ssa->parent_instr, 0, &load->def, 0)); + ASSERT_TRUE(test_alu(loads[0x1]->src.ssa, nir_op_ine)); + ASSERT_TRUE(test_alu_def(loads[0x1]->src.ssa, 0, &load->def, 0)); EXPECT_INSTR_SWIZZLES(movs[0x2], load, "y"); } @@ -2363,8 +2365,8 @@ TEST_F(nir_load_store_vectorize_test, ssbo_shifted_different_bit_size_adjacent) ASSERT_EQ(nir_def_components_read(&load->def), 0xf); ASSERT_EQ(nir_src_as_uint(load->src[1]), 0); EXPECT_INSTR_SWIZZLES(movs[0x1], load, "xy"); - nir_instr *mov2_src = movs[0x2]->src[0].src.ssa->parent_instr; + nir_def *mov2_src = movs[0x2]->src[0].src.ssa; ASSERT_TRUE(test_alu(mov2_src, nir_op_pack_32_2x16)); - nir_alu_instr *pack = nir_instr_as_alu(mov2_src); + nir_alu_instr *pack = nir_def_as_alu(mov2_src); EXPECT_INSTR_SWIZZLES(pack, load, "zw"); } diff --git a/src/compiler/nir/tests/nir_opt_varyings_test.h b/src/compiler/nir/tests/nir_opt_varyings_test.h index 1e6020ac6f4..c9940d02cea 100644 --- a/src/compiler/nir/tests/nir_opt_varyings_test.h +++ b/src/compiler/nir/tests/nir_opt_varyings_test.h @@ -325,7 +325,7 @@ shader_contains_instr(nir_builder *b, nir_instr *i) static inline bool shader_contains_def(nir_builder *b, nir_def *def) { - return shader_contains_instr(b, def->parent_instr); + return shader_contains_instr(b, nir_def_instr(def)); } static inline bool diff --git a/src/compiler/nir/tests/range_analysis_tests.cpp b/src/compiler/nir/tests/range_analysis_tests.cpp index e223c7cd8b9..44ead2d3825 100644 --- a/src/compiler/nir/tests/range_analysis_tests.cpp +++ b/src/compiler/nir/tests/range_analysis_tests.cpp @@ -287,7 +287,7 @@ TEST_F(unsigned_upper_bound_test, loop_phi_bcsel) nir_phi_instr_add_src(phi, nir_def_block(zero), zero); nir_phi_instr_add_src(phi, nir_def_block(sel), sel); - b->cursor = nir_before_instr(sel->parent_instr); + b->cursor = nir_before_instr(nir_def_instr(sel)); nir_builder_instr_insert(b, &phi->instr); nir_validate_shader(b->shader, NULL); diff --git a/src/compiler/nir/tests/vars_tests.cpp b/src/compiler/nir/tests/vars_tests.cpp index e7235b20d69..f0faa7c0bbe 100644 --- a/src/compiler/nir/tests/vars_tests.cpp +++ b/src/compiler/nir/tests/vars_tests.cpp @@ -1085,7 +1085,7 @@ TEST_F(nir_copy_prop_vars_test, load_direct_array_deref_on_vector_reuses_previou nir_intrinsic_instr *store = get_intrinsic(nir_intrinsic_store_deref, 2); /* NOTE: The ALU instruction is how we get the vec.y. */ - ASSERT_TRUE(nir_src_as_alu_instr(store->src[1])); + ASSERT_TRUE(nir_src_as_alu(store->src[1])); } TEST_F(nir_copy_prop_vars_test, load_direct_array_deref_on_vector_reuses_previous_copy) @@ -1142,7 +1142,7 @@ TEST_F(nir_copy_prop_vars_test, load_direct_array_deref_on_vector_gets_reused) ASSERT_EQ(count_intrinsics(nir_intrinsic_store_deref), 2); nir_intrinsic_instr *store = get_intrinsic(nir_intrinsic_store_deref, 1); - ASSERT_TRUE(nir_src_as_alu_instr(store->src[1])); + ASSERT_TRUE(nir_src_as_alu(store->src[1])); } TEST_F(nir_copy_prop_vars_test, store_load_direct_array_deref_on_vector) @@ -1185,7 +1185,7 @@ TEST_F(nir_copy_prop_vars_test, store_load_direct_array_deref_on_vector) /* Fourth store will compose first and second store values. */ nir_intrinsic_instr *fourth_store = get_intrinsic(nir_intrinsic_store_deref, 3); - EXPECT_TRUE(nir_src_as_alu_instr(fourth_store->src[1])); + EXPECT_TRUE(nir_src_as_alu(fourth_store->src[1])); } TEST_F(nir_copy_prop_vars_test, store_load_indirect_array_deref_on_vector) @@ -1807,7 +1807,7 @@ TEST_F(nir_combine_stores_test, non_overlapping_stores) ASSERT_EQ(nir_intrinsic_write_mask(combined), 0xf); ASSERT_EQ(nir_intrinsic_get_var(combined, 0), out); - nir_alu_instr *vec = nir_src_as_alu_instr(combined->src[1]); + nir_alu_instr *vec = nir_src_as_alu(combined->src[1]); ASSERT_TRUE(vec); for (int i = 0; i < 4; i++) { nir_intrinsic_instr *load = nir_src_as_intrinsic(vec->src[i].src); @@ -1846,7 +1846,7 @@ TEST_F(nir_combine_stores_test, overlapping_stores) ASSERT_EQ(nir_intrinsic_write_mask(combined), 0xf); ASSERT_EQ(nir_intrinsic_get_var(combined, 0), out); - nir_alu_instr *vec = nir_src_as_alu_instr(combined->src[1]); + nir_alu_instr *vec = nir_src_as_alu(combined->src[1]); ASSERT_TRUE(vec); /* Component x comes from v[0]. */ @@ -1912,7 +1912,7 @@ TEST_F(nir_combine_stores_test, direct_array_derefs) ASSERT_EQ(nir_intrinsic_write_mask(combined), 0xf); ASSERT_EQ(nir_intrinsic_get_var(combined, 0), out); - nir_alu_instr *vec = nir_src_as_alu_instr(combined->src[1]); + nir_alu_instr *vec = nir_src_as_alu(combined->src[1]); ASSERT_TRUE(vec); /* Component x comes from v[0]. */ diff --git a/src/compiler/rust/nir.rs b/src/compiler/rust/nir.rs index b519e6b2abe..13c82d545d5 100644 --- a/src/compiler/rust/nir.rs +++ b/src/compiler/rust/nir.rs @@ -106,7 +106,7 @@ impl ALUType { impl nir_def { pub fn parent_instr(&self) -> &nir_instr { - unsafe { self.parent_instr.as_ref() }.unwrap() + unsafe { &*nir_def_instr_noninline(self as *const _) } } pub fn components_read(&self) -> nir_component_mask_t { diff --git a/src/compiler/spirv/tests/non_semantic.cpp b/src/compiler/spirv/tests/non_semantic.cpp index 6f0efad2bd1..3a1676936e2 100644 --- a/src/compiler/spirv/tests/non_semantic.cpp +++ b/src/compiler/spirv/tests/non_semantic.cpp @@ -116,5 +116,5 @@ TEST_F(NonSemantic, printf) nir_intrinsic_instr *intrinsic = find_intrinsic(nir_intrinsic_printf, 0); ASSERT_NE(intrinsic, nullptr); - ASSERT_TRUE(intrinsic->src[0].ssa->parent_instr->type == nir_instr_type_deref); + ASSERT_TRUE(nir_def_instr(intrinsic->src[0].ssa)->type == nir_instr_type_deref); } diff --git a/src/compiler/spirv/vtn_opencl.c b/src/compiler/spirv/vtn_opencl.c index 103d4742009..e9850ec477e 100644 --- a/src/compiler/spirv/vtn_opencl.c +++ b/src/compiler/spirv/vtn_opencl.c @@ -894,7 +894,7 @@ vtn_add_printf_string(struct vtn_builder *b, uint32_t id, u_printf_info *info) while (deref->deref_type != nir_deref_type_var) { nir_scalar parent = nir_scalar_resolved(deref->parent.ssa, 0); - if (parent.def->parent_instr->type != nir_instr_type_deref) { + if (!nir_def_is_deref(parent.def)) { deref = NULL; break; } diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index 1b4549e2902..78f1d4dc805 100644 --- a/src/compiler/spirv/vtn_variables.c +++ b/src/compiler/spirv/vtn_variables.c @@ -598,7 +598,7 @@ get_deref_tail(nir_deref_instr *deref) nir_def_as_deref(deref->parent.ssa); if (parent->deref_type == nir_deref_type_cast && - parent->parent.ssa->parent_instr->type == nir_instr_type_deref) { + nir_def_is_deref(parent->parent.ssa)) { nir_deref_instr *grandparent = nir_def_as_deref(parent->parent.ssa); diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 99554cf6ce3..e274c83f57a 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -4190,7 +4190,7 @@ read_phi_src(struct ir3_context *ctx, struct ir3_block *blk, nir_foreach_phi_src (nsrc, nphi) { if (blk->nblock == nsrc->pred) { - if (nsrc->src.ssa->parent_instr->type == nir_instr_type_undef) { + if (nir_src_is_undef(nsrc->src)) { /* Create an ir3 undef */ return NULL; } else { @@ -4397,7 +4397,7 @@ get_branch_condition(struct ir3_context *ctx, nir_src *src, unsigned comp, { struct ir3_instruction *condition = ir3_get_src(ctx, src)[comp]; - if (src->ssa->parent_instr->type == nir_instr_type_alu) { + if (nir_def_is_alu(src->ssa)) { nir_alu_instr *nir_cond = nir_def_as_alu(src->ssa); if (nir_cond->op == nir_op_inot) { @@ -4420,7 +4420,7 @@ fold_conditional_branch(struct ir3_context *ctx, struct nir_src *nir_cond) if (!ctx->compiler->has_branch_and_or) return NULL; - if (nir_cond->ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_def_is_alu(nir_cond->ssa)) return NULL; nir_alu_instr *alu_cond = nir_def_as_alu(nir_cond->ssa); diff --git a/src/freedreno/ir3/ir3_nir.h b/src/freedreno/ir3/ir3_nir.h index b1b8761b083..491a030af63 100644 --- a/src/freedreno/ir3/ir3_nir.h +++ b/src/freedreno/ir3/ir3_nir.h @@ -153,7 +153,7 @@ bool ir3_get_driver_param_info(const nir_shader *shader, static inline nir_intrinsic_instr * ir3_bindless_resource(nir_src src) { - if (src.ssa->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_src_is_intrinsic(src)) return NULL; nir_intrinsic_instr *intrin = nir_def_as_intrinsic(src.ssa); diff --git a/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c b/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c index d15ee24776c..6e3a77909c8 100644 --- a/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c +++ b/src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c @@ -214,7 +214,7 @@ gather_ubo_ranges(nir_shader *nir, nir_intrinsic_instr *instr, static void handle_partial_const(nir_builder *b, nir_def **srcp, int *offp) { - if ((*srcp)->parent_instr->type != nir_instr_type_alu) + if (!nir_def_is_alu(*srcp)) return; nir_alu_instr *alu = nir_def_as_alu((*srcp)); diff --git a/src/freedreno/ir3/ir3_nir_lower_io_offsets.c b/src/freedreno/ir3/ir3_nir_lower_io_offsets.c index 7143d1d5909..228e7bae03b 100644 --- a/src/freedreno/ir3/ir3_nir_lower_io_offsets.c +++ b/src/freedreno/ir3/ir3_nir_lower_io_offsets.c @@ -89,7 +89,7 @@ nir_def * ir3_nir_try_propagate_bit_shift(nir_builder *b, nir_def *offset, int32_t shift) { - nir_instr *offset_instr = offset->parent_instr; + nir_instr *offset_instr = nir_def_instr(offset); if (offset_instr->type != nir_instr_type_alu) return NULL; diff --git a/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c b/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c index a1dac6cbacb..169865e9db6 100644 --- a/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c +++ b/src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c @@ -25,7 +25,7 @@ typedef struct { static int coord_offset(nir_def *ssa, gl_system_value *bary_type) { - nir_instr *parent_instr = ssa->parent_instr; + nir_instr *parent_instr = nir_def_instr(ssa); /* The coordinate of a texture sampling instruction eligible for * pre-fetch is either going to be a load_interpolated_input/ @@ -68,7 +68,7 @@ coord_offset(nir_def *ssa, gl_system_value *bary_type) return -1; /* Happens with lowered load_barycentric_at_offset */ - if (input->src[0].ssa->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_src_is_intrinsic(input->src[0])) return -1; nir_intrinsic_instr *interp = @@ -220,7 +220,7 @@ lower_tex_prefetch_func(nir_function_impl *impl, ir3_prefetch_state *state) nir_if *nif = nir_block_get_following_if(block); if (nif) { - nir_instr *cond = nif->condition.ssa->parent_instr; + nir_instr *cond = nir_def_instr(nif->condition.ssa); if (cond->type == nir_instr_type_intrinsic && nir_instr_as_intrinsic(cond)->intrinsic == nir_intrinsic_preamble_start_ir3) { diff --git a/src/freedreno/ir3/ir3_nir_move_varying_inputs.c b/src/freedreno/ir3/ir3_nir_move_varying_inputs.c index 370788e90e9..db4e7efaa6d 100644 --- a/src/freedreno/ir3/ir3_nir_move_varying_inputs.c +++ b/src/freedreno/ir3/ir3_nir_move_varying_inputs.c @@ -42,7 +42,7 @@ static void move_instruction_to_start_block(state *state, nir_instr *instr); static bool check_precondition_src(nir_src *src, void *state) { - check_precondition_instr(state, src->ssa->parent_instr); + check_precondition_instr(state, nir_def_instr(src->ssa)); return true; } @@ -105,7 +105,7 @@ check_precondition_block(precond_state *state, nir_block *block) static bool move_src(nir_src *src, void *state) { - move_instruction_to_start_block(state, src->ssa->parent_instr); + move_instruction_to_start_block(state, nir_def_instr(src->ssa)); return true; } diff --git a/src/freedreno/ir3/ir3_nir_opt_preamble.c b/src/freedreno/ir3/ir3_nir_opt_preamble.c index 7502e22912f..d80e0beb74d 100644 --- a/src/freedreno/ir3/ir3_nir_opt_preamble.c +++ b/src/freedreno/ir3/ir3_nir_opt_preamble.c @@ -359,7 +359,7 @@ bool ir3_def_is_rematerializable_for_preamble(nir_def *def, nir_def **preamble_defs) { - switch (def->parent_instr->type) { + switch (nir_def_instr_type(def)) { case nir_instr_type_load_const: return true; case nir_instr_type_intrinsic: { @@ -469,10 +469,10 @@ _rematerialize_def(nir_builder *b, struct hash_table *remap_ht, struct set *instr_set, nir_def **preamble_defs, nir_def *def) { - if (_mesa_hash_table_search(remap_ht, def->parent_instr)) + if (_mesa_hash_table_search(remap_ht, nir_def_instr(def))) return NULL; - switch (def->parent_instr->type) { + switch (nir_def_instr_type(def)) { case nir_instr_type_load_const: break; case nir_instr_type_intrinsic: { @@ -500,7 +500,7 @@ _rematerialize_def(nir_builder *b, struct hash_table *remap_ht, UNREACHABLE("should not get here"); } - nir_instr *instr = nir_instr_clone_deep(b->shader, def->parent_instr, + nir_instr *instr = nir_instr_clone_deep(b->shader, nir_def_instr(def), remap_ht); /* Find a legal place to insert the new instruction. We cannot simply put it diff --git a/src/freedreno/vulkan/tu_nir_lower_ray_query.cc b/src/freedreno/vulkan/tu_nir_lower_ray_query.cc index 11705b8ab45..28f27a0e474 100644 --- a/src/freedreno/vulkan/tu_nir_lower_ray_query.cc +++ b/src/freedreno/vulkan/tu_nir_lower_ray_query.cc @@ -169,7 +169,7 @@ get_rq_deref(nir_builder *b, struct hash_table *ht, nir_def *def, static nir_def * get_rq_initialize_uav_index(nir_intrinsic_instr *intr, struct rq_var *var) { - if (intr->src[1].ssa->parent_instr->type == nir_instr_type_intrinsic && + if (nir_src_is_intrinsic(intr->src[1]) && nir_def_as_intrinsic(intr->src[1].ssa)->intrinsic == nir_intrinsic_load_vulkan_descriptor) { return intr->src[1].ssa; diff --git a/src/freedreno/vulkan/tu_shader.cc b/src/freedreno/vulkan/tu_shader.cc index c58484e3ea8..76f8ed30fad 100644 --- a/src/freedreno/vulkan/tu_shader.cc +++ b/src/freedreno/vulkan/tu_shader.cc @@ -634,7 +634,7 @@ lower_tex(nir_builder *b, nir_tex_instr *tex, struct tu_device *dev, tex->src[tex_src_idx].src_type = nir_tex_src_texture_handle; /* for the input attachment case: */ - if (bindless->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_def_is_intrinsic(bindless)) tex->src[tex_src_idx].src_type = nir_tex_src_texture_offset; } @@ -1118,7 +1118,7 @@ lower_ssbo_descriptor_instr(nir_builder *b, nir_intrinsic_instr *intrin, b->cursor = nir_before_instr(&intrin->instr); nir_def *buffer = intrin->src[buffer_src].ssa; - assert(buffer->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_def_is_intrinsic(buffer)); nir_intrinsic_instr *bindless = nir_def_as_intrinsic(buffer); assert(bindless->intrinsic == nir_intrinsic_bindless_resource_ir3); diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c index 2a9a5881a1a..749269a478d 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c @@ -2986,8 +2986,10 @@ assign_ssa_dest(struct lp_build_nir_soa_context *bld, const nir_def *ssa, struct gallivm_state *gallivm = bld->base.gallivm; LLVMBuilderRef builder = gallivm->builder; - if (gallivm->di_builder && ssa->parent_instr->has_debug_info) { - nir_instr_debug_info *debug_info = nir_instr_get_debug_info(ssa->parent_instr); + if (gallivm->di_builder && nir_def_instr(ssa)->has_debug_info) { + /* Cast away the constness */ + nir_instr_debug_info *debug_info = + nir_instr_get_debug_info((void *) nir_def_instr(ssa)); /* Use "ssa_%u" because GDB cannot handle "%%%u" */ char name[16]; diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c index fa1a3ce0d35..c96d7e92160 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.c +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c @@ -1223,7 +1223,7 @@ static struct ureg_src ntt_get_chased_src(struct ntt_compile *c, nir_legacy_src *src) { if (src->is_ssa) { - if (src->ssa->parent_instr->type == nir_instr_type_load_const) + if (nir_def_is_const(src->ssa)) return ntt_get_load_const_src(c, nir_def_as_load_const(src->ssa)); return c->ssa_temp[src->ssa->index]; @@ -1267,7 +1267,7 @@ ntt_get_alu_src(struct ntt_compile *c, nir_alu_instr *instr, int i) * the specific swizzles from an undef don't matter) */ if (nir_src_bit_size(instr->src[i].src) == 64 && - !(src.src.is_ssa && src.src.ssa->parent_instr->type == nir_instr_type_undef)) { + !(src.src.is_ssa && nir_def_is_undef(src.src.ssa))) { int chan1 = 1; if (nir_op_infos[instr->op].input_sizes[i] == 0) { chan1 = instr->def.num_components > 1 ? 1 : 0; diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c index 398ca81de6e..a5319cc6c1f 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c @@ -361,7 +361,7 @@ ra_src(struct etna_compile *c, nir_src *src) static hw_src get_src(struct etna_compile *c, nir_src *src) { - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); if (instr->pass_flags & BYPASS_SRC) { assert(instr->type == nir_instr_type_alu); @@ -821,7 +821,7 @@ static nir_const_value *get_alu_cv(nir_alu_src *src) nir_const_value *cv = nir_src_as_const_value(src->src); if (!cv && - (src->src.ssa->parent_instr->type == nir_instr_type_alu)) { + (nir_src_is_alu(src->src))) { nir_alu_instr *parent = nir_def_as_alu(src->src.ssa); if ((parent->op == nir_op_fabs) || @@ -971,7 +971,7 @@ lower_alu(struct etna_compile *c, nir_alu_instr *alu) need_mov = true; } - nir_instr *instr = ssa->parent_instr; + nir_instr *instr = nir_def_instr(ssa); switch (instr->type) { case nir_instr_type_alu: case nir_instr_type_tex: @@ -1072,10 +1072,10 @@ emit_shader(struct etna_compile *c, unsigned *num_temps, unsigned *num_consts) case nir_intrinsic_store_deref: { nir_deref_instr *deref = nir_src_as_deref(intr->src[0]); nir_src *src = &intr->src[1]; - if (nir_src_is_const(*src) || is_sysval(src->ssa->parent_instr) || + if (nir_src_is_const(*src) || is_sysval(nir_def_instr(src->ssa)) || (shader->info.stage == MESA_SHADER_FRAGMENT && deref->var->data.location == FRAG_RESULT_DEPTH && - src->ssa->parent_instr->type != nir_instr_type_alu)) { + !nir_def_is_alu(src->ssa))) { b.cursor = nir_before_instr(instr); nir_src_rewrite(src, nir_mov(&b, src->ssa)); } diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.h b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.h index 1365d63d6a7..4b4a810a01a 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.h +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.h @@ -205,7 +205,7 @@ real_def(nir_def *def, unsigned *swiz, unsigned *mask) return def; bool can_bypass_src = !nir_def_used_by_if(def); - nir_instr *p_instr = def->parent_instr; + nir_instr *p_instr = nir_def_instr(def); /* if used by a vecN, the "real" destination becomes the vecN destination * lower_alu guarantees that values used by a vecN are only used by that vecN @@ -245,7 +245,7 @@ real_def(nir_def *def, unsigned *swiz, unsigned *mask) update_swiz_mask(alu, def, swiz, mask); break; case nir_op_mov: { - switch (def->parent_instr->type) { + switch (nir_def_instr_type(def)) { case nir_instr_type_alu: case nir_instr_type_tex: break; diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_liveness.c b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_liveness.c index 8f16fa56c13..7b3cebfe939 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_liveness.c +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_liveness.c @@ -67,7 +67,7 @@ set_src_live(nir_src *src, void *void_state) { struct live_defs_state *state = void_state; - nir_instr *instr = src->ssa->parent_instr; + nir_instr *instr = nir_def_instr(src->ssa); if (is_sysval(instr) || instr->type == nir_instr_type_deref) return true; diff --git a/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c b/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c index 6a45f3cb797..3705e7059da 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c +++ b/src/gallium/drivers/etnaviv/etnaviv_nir_lower_source_mods.c @@ -56,7 +56,7 @@ nir_lower_to_source_mods_instr(nir_builder *b, nir_instr *instr, nir_alu_instr *alu = nir_instr_as_alu(instr); for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - if (alu->src[i].src.ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_src_is_alu(alu->src[i].src)) continue; nir_alu_instr *parent = nir_def_as_alu(alu->src[i].src.ssa); diff --git a/src/gallium/drivers/lima/ir/lima_nir_duplicate.c b/src/gallium/drivers/lima/ir/lima_nir_duplicate.c index 7e5f446d486..cf62cacc759 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_duplicate.c +++ b/src/gallium/drivers/lima/ir/lima_nir_duplicate.c @@ -42,7 +42,7 @@ duplicate_def_at_use(nir_builder *b, nir_def *def, bool duplicate_for_ffma) * if 'if use', clone where it is */ if (nir_src_is_if(use_src)) { - b->cursor = nir_before_instr(def->parent_instr); + b->cursor = nir_before_def(def); } else { b->cursor = nir_before_instr(nir_src_parent_instr(use_src)); last_parent_instr = nir_src_parent_instr(use_src); @@ -54,17 +54,17 @@ duplicate_def_at_use(nir_builder *b, nir_def *def, bool duplicate_for_ffma) } } - dupl = nir_instr_def(nir_instr_clone(b->shader, def->parent_instr)); - dupl->parent_instr->pass_flags = 1; + dupl = nir_instr_def(nir_instr_clone(b->shader, nir_def_instr(def))); + nir_def_instr(dupl)->pass_flags = 1; - nir_builder_instr_insert(b, dupl->parent_instr); + nir_builder_instr_insert(b, nir_def_instr(dupl)); } nir_src_rewrite(use_src, dupl); last_dupl = dupl; } - nir_instr_remove(def->parent_instr); + nir_instr_remove(nir_def_instr(def)); return true; } diff --git a/src/gallium/drivers/lima/ir/lima_nir_lower_txp.c b/src/gallium/drivers/lima/ir/lima_nir_lower_txp.c index 4a77190b130..451a7f2ab76 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_lower_txp.c +++ b/src/gallium/drivers/lima/ir/lima_nir_lower_txp.c @@ -47,7 +47,7 @@ get_proj_index(nir_instr *coord_instr, nir_instr *proj_instr, if (coord_src_ssa != proj_src_ssa) return NULL; - if (coord_src_ssa->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_def_is_intrinsic(coord_src_ssa)) return NULL; nir_intrinsic_instr *intrin = nir_def_as_intrinsic(coord_src_ssa); @@ -105,10 +105,10 @@ lima_nir_lower_txp_instr(nir_builder *b, nir_instr *instr, nir_def *coords_ssa = tex->src[coords_idx].src.ssa; int proj_idx_in_vec = -1; - nir_def *load_input = get_proj_index(coords_ssa->parent_instr, - proj_ssa->parent_instr, - tex->coord_components, - &proj_idx_in_vec); + nir_def *load_input = get_proj_index(nir_def_instr(coords_ssa), + nir_def_instr(proj_ssa), + tex->coord_components, + &proj_idx_in_vec); nir_def *combined; if (load_input && proj_idx_in_vec == 3) { unsigned xyzw[] = { 0, 1, 2, 3 }; diff --git a/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c b/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c index c5261ace068..8881c5c90a7 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c +++ b/src/gallium/drivers/lima/ir/lima_nir_split_load_input.c @@ -39,7 +39,7 @@ lima_nir_split_load_input_instr(nir_builder *b, return false; nir_def *ssa = alu->src[0].src.ssa; - if (ssa->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_def_is_intrinsic(ssa)) return false; nir_intrinsic_instr *intrin = nir_def_as_intrinsic(ssa); diff --git a/src/gallium/drivers/lima/ir/lima_nir_split_loads.c b/src/gallium/drivers/lima/ir/lima_nir_split_loads.c index 089746a5241..cb77f4c7f60 100644 --- a/src/gallium/drivers/lima/ir/lima_nir_split_loads.c +++ b/src/gallium/drivers/lima/ir/lima_nir_split_loads.c @@ -54,7 +54,7 @@ replace_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin) intrin->intrinsic != nir_intrinsic_load_uniform) return false; - if (intrin->src[0].ssa->parent_instr->type == nir_instr_type_load_const) + if (nir_src_is_const(intrin->src[0])) return false; struct hash_table *visited_instrs = _mesa_pointer_hash_table_create(NULL); diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c b/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c index 3bd8f8e8741..610f83e7ec6 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c +++ b/src/gallium/drivers/llvmpipe/lp_state_fs_analysis.c @@ -38,7 +38,7 @@ static bool is_fs_input(const nir_src *src) { - const nir_instr *parent = src->ssa[0].parent_instr; + const nir_instr *parent = nir_def_instr(&src->ssa[0]); if (!parent) { return false; } @@ -89,7 +89,7 @@ get_nir_input_info(const nir_alu_src *src, int *input_component) { // The parent instr should be a nir_intrinsic_load_deref. - const nir_instr *parent = src->src.ssa[0].parent_instr; + const nir_instr *parent = nir_def_instr(&src->src.ssa[0]); if (!parent || parent->type != nir_instr_type_intrinsic) { return false; } @@ -100,7 +100,7 @@ get_nir_input_info(const nir_alu_src *src, } // The parent of the load should be a type_deref. - parent = intrin->src->ssa->parent_instr; + parent = nir_def_instr(intrin->src->ssa); if (!parent || parent->type != nir_instr_type_deref) { return false; } @@ -153,7 +153,7 @@ get_texcoord_provenance(const nir_tex_src *texcoord, assert(texcoord->src_type == nir_tex_src_coord); // The parent instr of the coord should be an nir_op_vec2 alu op - const nir_instr *parent = texcoord->src.ssa->parent_instr; + const nir_instr *parent = nir_def_instr(texcoord->src.ssa); if (!parent || parent->type != nir_instr_type_alu) { return false; } diff --git a/src/gallium/drivers/r300/compiler/nir_to_rc.c b/src/gallium/drivers/r300/compiler/nir_to_rc.c index 79a9d6e11d7..325d9292a3f 100644 --- a/src/gallium/drivers/r300/compiler/nir_to_rc.c +++ b/src/gallium/drivers/r300/compiler/nir_to_rc.c @@ -625,7 +625,7 @@ static struct ureg_src ntr_get_chased_src(struct ntr_compile *c, nir_legacy_src *src) { if (src->is_ssa) { - if (src->ssa->parent_instr->type == nir_instr_type_load_const) + if (nir_def_is_const(src->ssa)) return ntr_get_load_const_src(c, nir_def_as_load_const(src->ssa)); return c->ssa_temp[src->ssa->index]; @@ -691,7 +691,7 @@ ntr_get_ssa_def_decl(struct ntr_compile *c, nir_def *ssa) { uint32_t writemask; /* Fix writemask for nir_intrinsic_load_ubo_vec4 according to uses. */ - if (ssa->parent_instr->type == nir_instr_type_intrinsic && + if (nir_def_is_intrinsic(ssa) && nir_def_as_intrinsic(ssa)->intrinsic == nir_intrinsic_load_ubo_vec4) writemask = nir_def_components_read(ssa); else diff --git a/src/gallium/drivers/r300/compiler/r300_nir.h b/src/gallium/drivers/r300/compiler/r300_nir.h index 18e8797e62e..f2c76bdcf83 100644 --- a/src/gallium/drivers/r300/compiler/r300_nir.h +++ b/src/gallium/drivers/r300/compiler/r300_nir.h @@ -17,7 +17,7 @@ static inline bool is_ubo_or_input(UNUSED const nir_search_state *state, const nir_alu_instr *instr, unsigned src, unsigned num_components, const uint8_t *swizzle) { - nir_instr *parent = instr->src[src].src.ssa->parent_instr; + nir_instr *parent = nir_def_instr(instr->src[src].src.ssa); if (parent->type != nir_instr_type_intrinsic) return false; @@ -103,7 +103,7 @@ check_instr_and_src_value(nir_op op, nir_instr **instr, double value) } } } - *instr = alu->src[1 - i].src.ssa->parent_instr; + *instr = nir_def_instr(alu->src[1 - i].src.ssa); return true; } @@ -115,7 +115,7 @@ needs_vs_trig_input_fixup(UNUSED const nir_search_state *state, const nir_alu_in * emitted by us and also some wined3d shaders. * Start with check for fadd(a, -pi). */ - nir_instr *parent = instr->src[src].src.ssa->parent_instr; + nir_instr *parent = nir_def_instr(instr->src[src].src.ssa); if (!check_instr_and_src_value(nir_op_fadd, &parent, -3.141592)) return true; /* Now check for fmul(a, 2 * pi). */ diff --git a/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c b/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c index 1d9b38bec7e..4e22ddc3c7b 100644 --- a/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c +++ b/src/gallium/drivers/r300/compiler/r500_nir_lower_fcsel.c @@ -40,7 +40,7 @@ follow_modifiers(nir_instr *instr) nir_alu_instr *alu = nir_instr_as_alu(instr); if (alu->op == nir_op_fneg || alu->op == nir_op_fabs) { - return follow_modifiers(alu->src[0].src.ssa->parent_instr); + return follow_modifiers(nir_def_instr(alu->src[0].src.ssa)); } return alu->def.index; } @@ -50,7 +50,7 @@ has_three_different_tmp_sources(nir_alu_instr *fcsel) { unsigned src_def_index[3]; for (unsigned i = 0; i < 3; i++) { - int index = follow_modifiers(fcsel->src[i].src.ssa->parent_instr); + int index = follow_modifiers(nir_def_instr(fcsel->src[i].src.ssa)); if (index == -1) return false; else @@ -93,7 +93,7 @@ r300_nir_lower_fcsel_instr(nir_builder *b, nir_alu_instr *alu, void *data) * fcsel_gt by nir_lower_bool_to_float, however we can save on the slt * even for nir_op_fcsel_gt if the source is 0 or 1 anyway. */ - nir_instr *src0_instr = alu->src[0].src.ssa->parent_instr; + nir_instr *src0_instr = nir_def_instr(alu->src[0].src.ssa); if (alu->op == nir_op_fcsel || (alu->op == nir_op_fcsel_gt && is_comparison(src0_instr))) { lrp = nir_flrp(b, nir_ssa_for_alu_src(b, alu, 2), nir_ssa_for_alu_src(b, alu, 1), nir_ssa_for_alu_src(b, alu, 0)); diff --git a/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/src/gallium/drivers/r600/sfn/sfn_nir.cpp index 5de179e319e..b91ac85b777 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir.cpp @@ -246,7 +246,7 @@ private: auto intr = nir_instr_as_intrinsic(instr); assert(intr->intrinsic == nir_intrinsic_load_ubo_vec4); - auto parent = intr->src[0].ssa->parent_instr; + auto parent = nir_def_instr(intr->src[0].ssa); if (parent->type != nir_instr_type_alu) return nullptr; diff --git a/src/gallium/drivers/radeonsi/si_nir_optim.c b/src/gallium/drivers/radeonsi/si_nir_optim.c index e29bc55010b..1fbbbddc581 100644 --- a/src/gallium/drivers/radeonsi/si_nir_optim.c +++ b/src/gallium/drivers/radeonsi/si_nir_optim.c @@ -13,7 +13,7 @@ static bool add_src_instr_to_worklist(nir_src *src, void *wl) { - nir_instr_worklist_push_tail(wl, src->ssa->parent_instr); + nir_instr_worklist_push_tail(wl, nir_def_instr(src->ssa)); return true; } diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 2377c0843a0..ad012c82a24 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -828,7 +828,7 @@ ntq_emit_pack_unorm_4x8(struct vc4_compile *c, nir_alu_instr *instr) /* If packing from a vec4 op (as expected), identify it so that we can * peek back at what generated its sources. */ - if (instr->src[0].src.ssa->parent_instr->type == nir_instr_type_alu && + if (nir_src_is_alu(instr->src[0].src) && nir_def_as_alu(instr->src[0].src.ssa)->op == nir_op_vec4) { vec4 = nir_def_as_alu(instr->src[0].src.ssa); @@ -997,7 +997,7 @@ static struct qreg ntq_emit_bcsel(struct vc4_compile *c, nir_alu_instr *instr, { if (nir_load_reg_for_def(instr->src[0].src.ssa)) goto out; - if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu) + if (!nir_src_is_alu(instr->src[0].src)) goto out; nir_alu_instr *compare = nir_def_as_alu(instr->src[0].src.ssa); diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index 41304d1718e..7cd71a9229f 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -5979,7 +5979,7 @@ trivial_revectorize_scan(struct nir_builder *b, nir_intrinsic_instr *intr, void /* detect if the merged instr loaded multiple components and use swizzle mask for rewrite */ unsigned use_components = merge_intr == base ? orig_components : merge_intr->def.num_components; nir_def *swiz = nir_channels(b, &base->def, BITFIELD_RANGE(j, use_components)); - nir_def_rewrite_uses_after_instr(&merge_intr->def, swiz, merge_intr == base ? swiz->parent_instr : &merge_intr->instr); + nir_def_rewrite_uses_after_instr(&merge_intr->def, swiz, merge_intr == base ? nir_def_instr(swiz) : &merge_intr->instr); j += use_components - 1; } } else { diff --git a/src/gallium/drivers/zink/zink_lower_cubemap_to_array.c b/src/gallium/drivers/zink/zink_lower_cubemap_to_array.c index 029dcb22c80..15ac63a0501 100644 --- a/src/gallium/drivers/zink/zink_lower_cubemap_to_array.c +++ b/src/gallium/drivers/zink/zink_lower_cubemap_to_array.c @@ -310,7 +310,7 @@ handle_cube_gather(nir_builder *b, nir_tex_instr *tex, nir_def *coord) nir_def *tex_size = nir_get_texture_size(b, tex); /* nir_get_texture_size puts the cursor before the tex op */ - b->cursor = nir_after_instr(coord->parent_instr); + b->cursor = nir_after_def(coord); nir_def *const_05 = nir_imm_float(b, 0.5f); nir_def *texel_coords = nir_fmul(b, nir_trim_vector(b, coord, 2), diff --git a/src/gallium/frontends/rusticl/rusticl_nir.c b/src/gallium/frontends/rusticl/rusticl_nir.c index 83444fbd134..319e19d137d 100644 --- a/src/gallium/frontends/rusticl/rusticl_nir.c +++ b/src/gallium/frontends/rusticl/rusticl_nir.c @@ -44,7 +44,7 @@ rusticl_lower_intrinsics_instr( val = intrins->src[0].ssa; - if (val->parent_instr->type == nir_instr_type_deref) { + if (nir_def_is_deref(val)) { nir_deref_instr *deref = nir_def_as_deref(val); nir_variable *var = nir_deref_instr_get_variable(deref); assert(var); diff --git a/src/imagination/pco/pco_nir_lower_null_descriptors.c b/src/imagination/pco/pco_nir_lower_null_descriptors.c index a60889ecca2..881415e9423 100644 --- a/src/imagination/pco/pco_nir_lower_null_descriptors.c +++ b/src/imagination/pco/pco_nir_lower_null_descriptors.c @@ -124,7 +124,7 @@ static bool lower(nir_builder *b, nir_instr *instr, void *data) */ nir_def_rewrite_uses(def, phi); - nir_instr *phi_instr = phi->parent_instr; + nir_instr *phi_instr = nir_def_instr(phi); nir_phi_instr *phi_as_phi = nir_instr_as_phi(phi_instr); nir_phi_src *phi_src = nir_phi_get_src_from_block(phi_as_phi, instr->block); diff --git a/src/imagination/pco/pco_nir_pvfio.c b/src/imagination/pco/pco_nir_pvfio.c index 0ea1e1b5798..2bc20384144 100644 --- a/src/imagination/pco/pco_nir_pvfio.c +++ b/src/imagination/pco/pco_nir_pvfio.c @@ -418,7 +418,7 @@ static nir_def *lower_pfo_load(nir_builder *b, .io_semantics = io_semantics); nir_intrinsic_instr *load = - nir_instr_as_intrinsic(packed_comps[c]->parent_instr); + nir_def_as_intrinsic(packed_comps[c]); util_dynarray_append(&state->loads, load); } diff --git a/src/imagination/pco/pco_nir_tex.c b/src/imagination/pco/pco_nir_tex.c index 3ffd26f39f1..c46e34b3ee7 100644 --- a/src/imagination/pco/pco_nir_tex.c +++ b/src/imagination/pco/pco_nir_tex.c @@ -355,7 +355,7 @@ nir_intrinsic_instr *pco_emit_nir_smp(nir_builder *b, pco_smp_params *params) .smp_flags_pco = smp_flags._, .range = count); - return nir_instr_as_intrinsic(def->parent_instr); + return nir_def_as_intrinsic(def); } if (params->sample_raw) { @@ -370,7 +370,7 @@ nir_intrinsic_instr *pco_emit_nir_smp(nir_builder *b, pco_smp_params *params) .smp_flags_pco = smp_flags._, .range = count); - return nir_instr_as_intrinsic(def->parent_instr); + return nir_def_as_intrinsic(def); } if (params->write_data) { @@ -401,7 +401,7 @@ nir_intrinsic_instr *pco_emit_nir_smp(nir_builder *b, pco_smp_params *params) .smp_flags_pco = smp_flags._, .range = count); - return nir_instr_as_intrinsic(def->parent_instr); + return nir_def_as_intrinsic(def); } static nir_def * @@ -1129,7 +1129,7 @@ static nir_def *lower_image(nir_builder *b, nir_instr *instr, void *cb_data) if (ia) { assert(!is_array); nir_load_const_instr *load = - nir_instr_as_load_const(intr->src[0].ssa->parent_instr); + nir_def_as_load_const(intr->src[0].ssa); bool onchip = load->def.num_components == 4; if (onchip) { diff --git a/src/imagination/pco/pco_nir_vk.c b/src/imagination/pco/pco_nir_vk.c index 42585bfb317..1cd7910bb48 100644 --- a/src/imagination/pco/pco_nir_vk.c +++ b/src/imagination/pco/pco_nir_vk.c @@ -95,7 +95,7 @@ static void lower_tex_deref_to_binding(nir_builder *b, { nir_tex_src *deref_src = &tex->src[deref_index]; nir_deref_instr *deref = - nir_instr_as_deref(deref_src->src.ssa->parent_instr); + nir_def_as_deref(deref_src->src.ssa); b->cursor = nir_before_instr(&tex->instr); diff --git a/src/intel/compiler/brw/brw_from_nir.cpp b/src/intel/compiler/brw/brw_from_nir.cpp index d86ad66920f..d3806bfb56c 100644 --- a/src/intel/compiler/brw/brw_from_nir.cpp +++ b/src/intel/compiler/brw/brw_from_nir.cpp @@ -385,7 +385,7 @@ brw_from_nir_emit_if(nir_to_brw_state &ntb, nir_if *if_stmt) /* If the condition has the form !other_condition, use other_condition as * the source, but invert the predicate on the if instruction. */ - nir_alu_instr *cond = nir_src_as_alu_instr(if_stmt->condition); + nir_alu_instr *cond = nir_src_as_alu(if_stmt->condition); if (cond != NULL && cond->op == nir_op_inot) { invert = true; cond_reg = get_nir_src(ntb, cond->src[0].src, cond->src[0].swizzle[0]); @@ -481,15 +481,10 @@ optimize_extract_to_float(nir_to_brw_state &ntb, const brw_builder &bld, /* No fast path for f16 (yet) or f64. */ assert(instr->op == nir_op_i2f32 || instr->op == nir_op_u2f32); - if (!instr->src[0].src.ssa->parent_instr) + nir_alu_instr *src0 = nir_src_as_alu(instr->src[0].src); + if (!src0) return false; - if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu) - return false; - - nir_alu_instr *src0 = - nir_def_as_alu(instr->src[0].src.ssa); - unsigned bytes; bool is_signed; @@ -820,7 +815,7 @@ resolve_inot_sources(nir_to_brw_state &ntb, const brw_builder &bld, nir_alu_inst brw_reg *op) { for (unsigned i = 0; i < 2; i++) { - nir_alu_instr *inot_instr = nir_src_as_alu_instr(instr->src[i].src); + nir_alu_instr *inot_instr = nir_src_as_alu(instr->src[i].src); if (inot_instr != NULL && inot_instr->op == nir_op_inot) { /* The source of the inot is now the source of instr. */ @@ -839,7 +834,7 @@ try_emit_b2fi_of_inot(nir_to_brw_state &ntb, const brw_builder &bld, brw_reg result, nir_alu_instr *instr) { - nir_alu_instr *inot_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *inot_instr = nir_src_as_alu(instr->src[0].src); if (inot_instr == NULL || inot_instr->op != nir_op_inot) return false; @@ -1081,7 +1076,7 @@ brw_from_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr, * that won't be propagated. By handling both instructions here, a * single MOV is emitted. */ - nir_alu_instr *extract_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *extract_instr = nir_src_as_alu(instr->src[0].src); if (extract_instr != NULL) { if (extract_instr->op == nir_op_extract_u8 || extract_instr->op == nir_op_extract_i8) { @@ -1399,7 +1394,7 @@ brw_from_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr, } case nir_op_inot: { - nir_alu_instr *inot_src_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *inot_src_instr = nir_src_as_alu(instr->src[0].src); if (inot_src_instr != NULL && (inot_src_instr->op == nir_op_ior || @@ -1977,10 +1972,8 @@ get_nir_def(nir_to_brw_state &ntb, const nir_def &def, bool all_sources_uniform) nir_intrinsic_instr *store_reg = nir_store_reg_for_def(&def); bool is_scalar = false; - if (def.parent_instr->type == nir_instr_type_intrinsic && - store_reg == NULL) { - const nir_intrinsic_instr *instr = - nir_instr_as_intrinsic(def.parent_instr); + if (nir_def_is_intrinsic(&def) && store_reg == NULL) { + const nir_intrinsic_instr *instr = nir_def_as_intrinsic(&def); switch (instr->intrinsic) { case nir_intrinsic_load_btd_global_arg_addr_intel: @@ -2015,7 +2008,7 @@ get_nir_def(nir_to_brw_state &ntb, const nir_def &def, bool all_sources_uniform) /* This cannot be is_scalar if NIR thought it was divergent. */ assert(!(is_scalar && def.divergent)); - } else if (def.parent_instr->type == nir_instr_type_alu) { + } else if (nir_def_is_alu(&def)) { is_scalar = store_reg == NULL && all_sources_uniform && !def.divergent; } @@ -2034,8 +2027,7 @@ get_nir_def(nir_to_brw_state &ntb, const nir_def &def, bool all_sources_uniform) return ntb.ssa_values[def.index]; } else { - nir_intrinsic_instr *decl_reg = - nir_reg_get_decl(store_reg->src[1].ssa); + nir_intrinsic_instr *decl_reg = nir_reg_get_decl(store_reg->src[1].ssa); /* We don't handle indirects on locals */ assert(nir_intrinsic_base(store_reg) == 0); assert(store_reg->intrinsic != nir_intrinsic_store_reg_indirect); @@ -4186,7 +4178,7 @@ brw_from_nir_emit_fs_intrinsic(nir_to_brw_state &ntb, brw_inst *cmp = NULL; if (instr->intrinsic == nir_intrinsic_demote_if || instr->intrinsic == nir_intrinsic_terminate_if) { - nir_alu_instr *alu = nir_src_as_alu_instr(instr->src[0]); + nir_alu_instr *alu = nir_src_as_alu(instr->src[0]); if (alu != NULL && alu->op != nir_op_bcsel) { @@ -4458,9 +4450,8 @@ brw_from_nir_emit_fs_intrinsic(nir_to_brw_state &ntb, } case nir_intrinsic_load_interpolated_input: { - assert(instr->src[0].ssa && - instr->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic); - nir_intrinsic_instr *bary_intrinsic = nir_def_as_intrinsic(instr->src[0].ssa); + assert(nir_src_is_intrinsic(instr->src[0])); + nir_intrinsic_instr *bary_intrinsic = nir_src_as_intrinsic(instr->src[0]); nir_intrinsic_op bary_intrin = bary_intrinsic->intrinsic; brw_reg dst_xy; diff --git a/src/intel/compiler/brw/brw_nir.c b/src/intel/compiler/brw/brw_nir.c index 4b5326bc4f5..5c95b4f04b0 100644 --- a/src/intel/compiler/brw/brw_nir.c +++ b/src/intel/compiler/brw/brw_nir.c @@ -2944,7 +2944,7 @@ brw_nir_move_interpolation_to_top(nir_shader *nir) nir_instr *move[3] = { &bary_intrinsic->instr, - intrin->src[1].ssa->parent_instr, + nir_def_instr(intrin->src[1].ssa), instr }; @@ -3050,14 +3050,14 @@ record_def_size(nir_def *def, void *v_state) unsigned num_components = def->num_components; /* Texturing has return length reduction */ - if (def->parent_instr->type == nir_instr_type_tex) + if (nir_def_is_tex(def)) num_components = util_last_bit(nir_def_components_read(def)); /* Assume tightly packed */ unsigned size = DIV_ROUND_UP(num_components * def->bit_size, 32); nir_op alu_op = - def->parent_instr->type == nir_instr_type_alu ? + nir_def_is_alu(def) ? nir_def_as_alu(def)->op : nir_num_opcodes; /* Assume these are handled via source modifiers */ diff --git a/src/intel/compiler/brw/brw_nir.h b/src/intel/compiler/brw/brw_nir.h index 329046d1135..9069ba6a7a3 100644 --- a/src/intel/compiler/brw/brw_nir.h +++ b/src/intel/compiler/brw/brw_nir.h @@ -83,9 +83,7 @@ struct brw_nir_compiler_opts { static inline bool brw_nir_ubo_surface_index_is_pushable(nir_src src) { - nir_intrinsic_instr *intrin = - src.ssa->parent_instr->type == nir_instr_type_intrinsic ? - nir_def_as_intrinsic(src.ssa) : NULL; + nir_intrinsic_instr *intrin = nir_src_as_intrinsic(src); if (intrin && intrin->intrinsic == nir_intrinsic_resource_intel) { return (nir_intrinsic_resource_access_intel(intrin) & @@ -104,7 +102,7 @@ brw_nir_ubo_surface_index_get_push_block(nir_src src) if (!brw_nir_ubo_surface_index_is_pushable(src)) return UINT32_MAX; - assert(src.ssa->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_src_is_intrinsic(src)); nir_intrinsic_instr *intrin = nir_def_as_intrinsic(src.ssa); assert(intrin->intrinsic == nir_intrinsic_resource_intel); @@ -126,7 +124,7 @@ brw_nir_ubo_surface_index_get_bti(nir_src src) if (nir_src_is_const(src)) return nir_src_as_uint(src); - assert(src.ssa->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_src_is_intrinsic(src)); nir_intrinsic_instr *intrin = nir_def_as_intrinsic(src.ssa); if (!intrin || intrin->intrinsic != nir_intrinsic_resource_intel) diff --git a/src/intel/compiler/brw/brw_nir_lower_immediate_offsets.c b/src/intel/compiler/brw/brw_nir_lower_immediate_offsets.c index c9999acfca7..e83a9e9da9d 100644 --- a/src/intel/compiler/brw/brw_nir_lower_immediate_offsets.c +++ b/src/intel/compiler/brw/brw_nir_lower_immediate_offsets.c @@ -29,7 +29,7 @@ lower_immediate_offsets(nir_builder *b, nir_intrinsic_instr *intrin, void *data) case nir_intrinsic_store_ssbo_block_intel: { nir_src *binding = nir_get_io_index_src(intrin); const bool has_resource = - binding->ssa->parent_instr->type == nir_instr_type_intrinsic && + nir_def_is_intrinsic(binding->ssa) && nir_def_as_intrinsic(binding->ssa)->intrinsic == nir_intrinsic_resource_intel; bool ss_binding = false; diff --git a/src/intel/compiler/brw/brw_nir_lower_storage_image.c b/src/intel/compiler/brw/brw_nir_lower_storage_image.c index 34b71226efc..8e783b5d9a9 100644 --- a/src/intel/compiler/brw/brw_nir_lower_storage_image.c +++ b/src/intel/compiler/brw/brw_nir_lower_storage_image.c @@ -229,9 +229,7 @@ lower_image_load_instr_without_format(nir_builder *b, nir_def *color = convert_color_for_load_format( b, state->compiler, &intrin->def, image_fmt); - nir_def_rewrite_uses(placeholder, color); - nir_instr_remove(placeholder->parent_instr); - + nir_def_replace(placeholder, color); return true; } @@ -290,9 +288,7 @@ lower_image_load_instr(nir_builder *b, color = nir_vec(b, sparse_color, dest_components + 1); } - nir_def_rewrite_uses(placeholder, color); - nir_instr_remove(placeholder->parent_instr); - + nir_def_replace(placeholder, color); return true; } diff --git a/src/intel/compiler/brw/brw_nir_opt_fsat.c b/src/intel/compiler/brw/brw_nir_opt_fsat.c index d385b97da11..eefcf25e1d7 100644 --- a/src/intel/compiler/brw/brw_nir_opt_fsat.c +++ b/src/intel/compiler/brw/brw_nir_opt_fsat.c @@ -96,9 +96,9 @@ collect_reaching_defs(nir_alu_instr *fsat, nir_instr_worklist *sources) * brw_opt_saturate_propagation will already have enough information to * do its job. Adding another fsat will not help. */ - if (def->parent_instr->type == nir_instr_type_alu && + if (nir_def_is_alu(def) && nir_def_block(def) != fsat->instr.block) { - nir_instr_worklist_push_tail(sources, def->parent_instr); + nir_instr_worklist_push_tail(sources, nir_def_instr(def)); } } diff --git a/src/intel/compiler/elk/elk_fs.cpp b/src/intel/compiler/elk/elk_fs.cpp index 87ce0467c40..948ca304550 100644 --- a/src/intel/compiler/elk/elk_fs.cpp +++ b/src/intel/compiler/elk/elk_fs.cpp @@ -6511,7 +6511,7 @@ elk_nir_move_interpolation_to_top(nir_shader *nir) nir_instr *move[3] = { &bary_intrinsic->instr, - intrin->src[1].ssa->parent_instr, + nir_def_instr(intrin->src[1].ssa), instr }; diff --git a/src/intel/compiler/elk/elk_fs_nir.cpp b/src/intel/compiler/elk/elk_fs_nir.cpp index e1ee27520e1..bdbee3d362d 100644 --- a/src/intel/compiler/elk/elk_fs_nir.cpp +++ b/src/intel/compiler/elk/elk_fs_nir.cpp @@ -395,7 +395,7 @@ fs_nir_emit_if(nir_to_elk_state &ntb, nir_if *if_stmt) /* If the condition has the form !other_condition, use other_condition as * the source, but invert the predicate on the if instruction. */ - nir_alu_instr *cond = nir_src_as_alu_instr(if_stmt->condition); + nir_alu_instr *cond = nir_src_as_alu(if_stmt->condition); if (cond != NULL && cond->op == nir_op_inot) { invert = true; cond_reg = get_nir_src(ntb, cond->src[0].src); @@ -481,10 +481,7 @@ optimize_extract_to_float(nir_to_elk_state &ntb, nir_alu_instr *instr, /* No fast path for f16 or f64. */ assert(instr->op == nir_op_i2f32 || instr->op == nir_op_u2f32); - if (!instr->src[0].src.ssa->parent_instr) - return false; - - if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu) + if (nir_def_instr(instr->src[0].src.ssa)->type != nir_instr_type_alu) return false; nir_alu_instr *src0 = nir_def_as_alu(instr->src[0].src.ssa); @@ -716,7 +713,7 @@ resolve_inot_sources(nir_to_elk_state &ntb, const fs_builder &bld, nir_alu_instr elk_fs_reg *op) { for (unsigned i = 0; i < 2; i++) { - nir_alu_instr *inot_instr = nir_src_as_alu_instr(instr->src[i].src); + nir_alu_instr *inot_instr = nir_src_as_alu(instr->src[i].src); if (inot_instr != NULL && inot_instr->op == nir_op_inot) { /* The source of the inot is now the source of instr. */ @@ -740,7 +737,7 @@ try_emit_b2fi_of_inot(nir_to_elk_state &ntb, const fs_builder &bld, if (devinfo->ver < 6) return false; - nir_alu_instr *inot_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *inot_instr = nir_src_as_alu(instr->src[0].src); if (inot_instr == NULL || inot_instr->op != nir_op_inot) return false; @@ -789,7 +786,7 @@ emit_fsign(nir_to_elk_state &ntb, const fs_builder &bld, const nir_alu_instr *in if (instr->op != nir_op_fsign) { const nir_alu_instr *const fsign_instr = - nir_src_as_alu_instr(instr->src[fsign_src].src); + nir_src_as_alu(instr->src[fsign_src].src); /* op[fsign_src] has the nominal result of the fsign, and op[1 - * fsign_src] has the other multiply source. This must be rearranged so @@ -882,7 +879,7 @@ can_fuse_fmul_fsign(nir_alu_instr *instr, unsigned fsign_src) assert(instr->op == nir_op_fmul); nir_alu_instr *const fsign_instr = - nir_src_as_alu_instr(instr->src[fsign_src].src); + nir_src_as_alu(instr->src[fsign_src].src); /* Rules: * @@ -1096,7 +1093,7 @@ fs_nir_emit_alu(nir_to_elk_state &ntb, nir_alu_instr *instr, * that won't be propagated. By handling both instructions here, a * single MOV is emitted. */ - nir_alu_instr *extract_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *extract_instr = nir_src_as_alu(instr->src[0].src); if (extract_instr != NULL) { if (extract_instr->op == nir_op_extract_u8 || extract_instr->op == nir_op_extract_i8) { @@ -1411,7 +1408,7 @@ fs_nir_emit_alu(nir_to_elk_state &ntb, nir_alu_instr *instr, case nir_op_inot: if (devinfo->ver >= 8) { - nir_alu_instr *inot_src_instr = nir_src_as_alu_instr(instr->src[0].src); + nir_alu_instr *inot_src_instr = nir_src_as_alu(instr->src[0].src); if (inot_src_instr != NULL && (inot_src_instr->op == nir_op_ior || @@ -1879,7 +1876,7 @@ get_nir_src_bindless(nir_to_elk_state &ntb, const nir_src &src) static bool is_resource_src(nir_src src) { - return src.ssa->parent_instr->type == nir_instr_type_intrinsic && + return nir_src_is_intrinsic(src) && nir_def_as_intrinsic(src.ssa)->intrinsic == nir_intrinsic_resource_intel; } @@ -3692,7 +3689,7 @@ fs_nir_emit_fs_intrinsic(nir_to_elk_state &ntb, elk_fs_inst *cmp = NULL; if (instr->intrinsic == nir_intrinsic_demote_if || instr->intrinsic == nir_intrinsic_terminate_if) { - nir_alu_instr *alu = nir_src_as_alu_instr(instr->src[0]); + nir_alu_instr *alu = nir_src_as_alu(instr->src[0]); if (alu != NULL && alu->op != nir_op_bcsel && @@ -3935,8 +3932,7 @@ fs_nir_emit_fs_intrinsic(nir_to_elk_state &ntb, break; case nir_intrinsic_load_interpolated_input: { - assert(instr->src[0].ssa && - instr->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_def_instr(instr->src[0].ssa)->type == nir_instr_type_intrinsic); nir_intrinsic_instr *bary_intrinsic = nir_def_as_intrinsic(instr->src[0].ssa); nir_intrinsic_op bary_intrin = bary_intrinsic->intrinsic; elk_fs_reg dst_xy; @@ -4237,7 +4233,7 @@ add_rebuild_src(nir_src *src, void *state) return true; } - nir_foreach_src(src->ssa->parent_instr, add_rebuild_src, state); + nir_foreach_src(nir_def_instr(src->ssa), add_rebuild_src, state); res->array.push_back(src->ssa); return true; } @@ -4251,7 +4247,7 @@ try_rebuild_resource(nir_to_elk_state &ntb, const elk::fs_builder &bld, nir_def struct rebuild_resource resources = {}; resources.idx = 0; - if (!nir_foreach_src(resource_def->parent_instr, + if (!nir_foreach_src(nir_def_instr(resource_def), add_rebuild_src, &resources)) return elk_fs_reg(); resources.array.push_back(resource_def); @@ -4259,12 +4255,12 @@ try_rebuild_resource(nir_to_elk_state &ntb, const elk::fs_builder &bld, nir_def if (resources.array.size() == 1) { nir_def *def = resources.array[0]; - if (def->parent_instr->type == nir_instr_type_load_const) { + if (nir_def_is_const(def)) { nir_load_const_instr *load_const = nir_def_as_load_const(def); return elk_imm_ud(load_const->value[0].i32); } else { - assert(def->parent_instr->type == nir_instr_type_intrinsic && + assert(nir_def_is_intrinsic(def) && (nir_def_as_intrinsic(def)->intrinsic == nir_intrinsic_load_uniform)); nir_intrinsic_instr *intrin = nir_def_as_intrinsic(def); @@ -4279,7 +4275,7 @@ try_rebuild_resource(nir_to_elk_state &ntb, const elk::fs_builder &bld, nir_def for (unsigned i = 0; i < resources.array.size(); i++) { nir_def *def = resources.array[i]; - nir_instr *instr = def->parent_instr; + nir_instr *instr = nir_def_instr(def); switch (instr->type) { case nir_instr_type_load_const: { nir_load_const_instr *load_const = diff --git a/src/intel/compiler/elk/elk_nir.h b/src/intel/compiler/elk/elk_nir.h index b33e4f03cb3..26cfc2529b1 100644 --- a/src/intel/compiler/elk/elk_nir.h +++ b/src/intel/compiler/elk/elk_nir.h @@ -115,8 +115,7 @@ static inline bool elk_nir_ubo_surface_index_is_pushable(nir_src src) { nir_intrinsic_instr *intrin = - src.ssa->parent_instr->type == nir_instr_type_intrinsic ? - nir_def_as_intrinsic(src.ssa) : NULL; + nir_src_as_intrinsic(src); if (intrin && intrin->intrinsic == nir_intrinsic_resource_intel) { return (nir_intrinsic_resource_access_intel(intrin) & @@ -135,7 +134,7 @@ elk_nir_ubo_surface_index_get_push_block(nir_src src) if (!elk_nir_ubo_surface_index_is_pushable(src)) return UINT32_MAX; - assert(src.ssa->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_src_is_intrinsic(src)); nir_intrinsic_instr *intrin = nir_def_as_intrinsic(src.ssa); assert(intrin->intrinsic == nir_intrinsic_resource_intel); @@ -157,7 +156,7 @@ elk_nir_ubo_surface_index_get_bti(nir_src src) if (nir_src_is_const(src)) return nir_src_as_uint(src); - assert(src.ssa->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_src_is_intrinsic(src)); nir_intrinsic_instr *intrin = nir_def_as_intrinsic(src.ssa); if (!intrin || intrin->intrinsic != nir_intrinsic_resource_intel) diff --git a/src/intel/compiler/elk/elk_nir_analyze_boolean_resolves.c b/src/intel/compiler/elk/elk_nir_analyze_boolean_resolves.c index c99162480dc..07962dba013 100644 --- a/src/intel/compiler/elk/elk_nir_analyze_boolean_resolves.c +++ b/src/intel/compiler/elk/elk_nir_analyze_boolean_resolves.c @@ -40,7 +40,7 @@ static uint8_t get_resolve_status_for_src(nir_src *src) { - nir_instr *src_instr = src->ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(src->ssa); uint8_t resolve_status = src_instr->pass_flags & ELK_NIR_BOOLEAN_MASK; /* If the source instruction needs resolve, then from the perspective @@ -59,7 +59,7 @@ get_resolve_status_for_src(nir_src *src) static bool src_mark_needs_resolve(nir_src *src, void *void_state) { - nir_instr *src_instr = src->ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(src->ssa); uint8_t resolve_status = src_instr->pass_flags & ELK_NIR_BOOLEAN_MASK; /* If the source instruction is unresolved, then mark it as needing diff --git a/src/intel/compiler/elk/elk_nir_lower_storage_image.c b/src/intel/compiler/elk/elk_nir_lower_storage_image.c index 7b2d447f790..ab8f7505a08 100644 --- a/src/intel/compiler/elk/elk_nir_lower_storage_image.c +++ b/src/intel/compiler/elk/elk_nir_lower_storage_image.c @@ -412,8 +412,7 @@ lower_image_load_instr(nir_builder *b, color = nir_vec(b, sparse_color, dest_components + 1); } - nir_def_rewrite_uses(placeholder, color); - nir_instr_remove(placeholder->parent_instr); + nir_def_replace(placeholder, color); } else { /* This code part is only useful prior to Gfx9, we do not have plans to * enable sparse there. diff --git a/src/intel/compiler/elk/elk_vec4_nir.cpp b/src/intel/compiler/elk/elk_vec4_nir.cpp index 1ad9fdaae5e..1ec2443366d 100644 --- a/src/intel/compiler/elk/elk_vec4_nir.cpp +++ b/src/intel/compiler/elk/elk_vec4_nir.cpp @@ -794,7 +794,7 @@ bool vec4_visitor::optimize_predicate(nir_alu_instr *instr, enum elk_predicate *predicate) { - if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu) + if (nir_def_instr(instr->src[0].src.ssa)->type != nir_instr_type_alu) return false; nir_alu_instr *cmp_instr = nir_def_as_alu(instr->src[0].src.ssa); diff --git a/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c b/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c index 0269aa15836..140632f1b2e 100644 --- a/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c +++ b/src/intel/compiler/intel_nir_lower_non_uniform_barycentric_at_sample.c @@ -48,7 +48,7 @@ intel_nir_lower_non_uniform_barycentric_at_sample_instr(nir_builder *b, !nir_src_is_divergent(&intrin->src[0])) return false; - if (intrin->def.parent_instr->pass_flags != 0) + if (nir_def_instr(&intrin->def)->pass_flags != 0) return false; nir_def *sample_id = intrin->src[0].ssa; @@ -62,7 +62,7 @@ intel_nir_lower_non_uniform_barycentric_at_sample_instr(nir_builder *b, nir_push_if(b, nir_ieq(b, sample_id, first_sample_id)); { nir_builder_instr_insert(b, &intrin->instr); - intrin->def.parent_instr->pass_flags = 1; + nir_def_instr(&intrin->def)->pass_flags = 1; nir_src_rewrite(&intrin->src[0], first_sample_id); @@ -85,7 +85,7 @@ intel_nir_lower_non_uniform_interpolated_input_instr(nir_builder *b, if (load_ii->intrinsic != nir_intrinsic_load_interpolated_input) return false; - assert(load_ii->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic); + assert(nir_src_is_intrinsic(load_ii->src[0])); nir_intrinsic_instr *bary = nir_def_as_intrinsic(load_ii->src[0].ssa); @@ -113,7 +113,7 @@ intel_nir_lower_non_uniform_interpolated_input_instr(nir_builder *b, /* Set pass_flags so that the other lowering pass won't try to also * lower this new load_barycentric_at_sample. */ - new_bary->parent_instr->pass_flags = 1; + nir_def_instr(new_bary)->pass_flags = 1; nir_builder_instr_insert(b, &load_ii->instr); diff --git a/src/intel/compiler/intel_nir_lower_non_uniform_resource_intel.c b/src/intel/compiler/intel_nir_lower_non_uniform_resource_intel.c index b0191014566..4e5e5b48815 100644 --- a/src/intel/compiler/intel_nir_lower_non_uniform_resource_intel.c +++ b/src/intel/compiler/intel_nir_lower_non_uniform_resource_intel.c @@ -38,11 +38,11 @@ add_src_instr(nir_src *src, void *state) { struct util_dynarray *inst_array = state; util_dynarray_foreach(inst_array, nir_instr *, instr_ptr) { - if (*instr_ptr == src->ssa->parent_instr) + if (*instr_ptr == nir_def_instr(src->ssa)) return true; } - util_dynarray_append(inst_array, src->ssa->parent_instr); + util_dynarray_append(inst_array, nir_def_instr(src->ssa)); return true; } @@ -54,10 +54,10 @@ find_resource_intel(struct util_dynarray *inst_array, /* If resouce_intel is already directly in front of the instruction, there * is nothing to do. */ - if (nir_instr_is_resource_intel(def->parent_instr)) + if (nir_instr_is_resource_intel(nir_def_instr(def))) return NULL; - util_dynarray_append(inst_array, def->parent_instr); + util_dynarray_append(inst_array, nir_def_instr(def)); unsigned idx = 0, scan_index = 0; while (idx < util_dynarray_num_elements(inst_array, nir_instr *)) { diff --git a/src/intel/compiler/intel_nir_opt_peephole_ffma.c b/src/intel/compiler/intel_nir_opt_peephole_ffma.c index 988a3b317a7..5781c694eb1 100644 --- a/src/intel/compiler/intel_nir_opt_peephole_ffma.c +++ b/src/intel/compiler/intel_nir_opt_peephole_ffma.c @@ -65,12 +65,7 @@ get_mul_for_src(nir_alu_src *src, unsigned num_components, uint8_t *swizzle, bool *negate, bool *abs) { uint8_t swizzle_tmp[NIR_MAX_VEC_COMPONENTS]; - - nir_instr *instr = src->src.ssa->parent_instr; - if (instr->type != nir_instr_type_alu) - return NULL; - - nir_alu_instr *alu = nir_instr_as_alu(instr); + nir_alu_instr *alu = nir_src_as_alu(src->src); /* We want to bail if any of the other ALU operations involved is labeled * exact. One reason for this is that, while the value that is changing is @@ -79,7 +74,7 @@ get_mul_for_src(nir_alu_src *src, unsigned num_components, * value and what they don't care about is the add. Another reason is that * SPIR-V explicitly requires this behaviour. */ - if (alu->exact) + if (!alu || alu->exact) return NULL; switch (alu->op) { @@ -141,7 +136,7 @@ static bool any_alu_src_is_a_constant(nir_alu_src srcs[]) { for (unsigned i = 0; i < 2; i++) { - if (srcs[i].src.ssa->parent_instr->type == nir_instr_type_load_const) { + if (nir_src_is_const(srcs[i].src)) { nir_load_const_instr *load_const = nir_def_as_load_const(srcs[i].src.ssa); diff --git a/src/intel/compiler/intel_nir_opt_peephole_imul32x16.c b/src/intel/compiler/intel_nir_opt_peephole_imul32x16.c index 14739dfd33b..3595086f2f2 100644 --- a/src/intel/compiler/intel_nir_opt_peephole_imul32x16.c +++ b/src/intel/compiler/intel_nir_opt_peephole_imul32x16.c @@ -245,7 +245,7 @@ intel_nir_opt_peephole_imul32x16_instr(nir_builder *b, /* All constants were previously processed. There is nothing more to * learn from a constant here. */ - if (imul->src[i].src.ssa->parent_instr->type == nir_instr_type_load_const) + if (nir_src_is_const(imul->src[i].src)) continue; nir_scalar scalar = nir_scalar_chase_alu_src(imul_scalar, i); diff --git a/src/intel/vulkan/anv_nir_lower_multiview.c b/src/intel/vulkan/anv_nir_lower_multiview.c index 2fda13a5a61..5c4d0829a24 100644 --- a/src/intel/vulkan/anv_nir_lower_multiview.c +++ b/src/intel/vulkan/anv_nir_lower_multiview.c @@ -54,9 +54,7 @@ build_instance_id(struct lower_multiview_state *state) if (state->instance_id == NULL) { nir_builder *b = &state->builder; - - b->cursor = - nir_after_instr(state->instance_id_with_views->parent_instr); + b->cursor = nir_after_def(state->instance_id_with_views); /* We use instancing for implementing multiview. The actual instance id * is given by dividing instance_id by the number of views in this @@ -77,9 +75,7 @@ build_view_index(struct lower_multiview_state *state) if (state->view_index == NULL) { nir_builder *b = &state->builder; - - b->cursor = - nir_after_instr(state->instance_id_with_views->parent_instr); + b->cursor = nir_after_def(state->instance_id_with_views); assert(state->view_mask != 0); if (util_bitcount(state->view_mask) == 1) { @@ -245,7 +241,7 @@ anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask, nir_def *view_index = build_view_index(&state); assert(nir_def_block(view_index) == nir_start_block(entrypoint)); - b->cursor = nir_after_instr(view_index->parent_instr); + b->cursor = nir_after_def(view_index); /* Unless there is only one possible view index (that would be set * directly), pass it to the next stage. diff --git a/src/intel/vulkan/anv_nir_push_descriptor_analysis.c b/src/intel/vulkan/anv_nir_push_descriptor_analysis.c index 1b0252fd56a..7ccac17a6bc 100644 --- a/src/intel/vulkan/anv_nir_push_descriptor_analysis.c +++ b/src/intel/vulkan/anv_nir_push_descriptor_analysis.c @@ -196,8 +196,7 @@ anv_nir_push_desc_ubo_fully_promoted(nir_shader *nir, /* Don't check the load_ubo from descriptor buffers */ nir_intrinsic_instr *resource = - intrin->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic ? - nir_def_as_intrinsic(intrin->src[0].ssa) : NULL; + nir_src_as_intrinsic(intrin->src[0]); if (resource == NULL || resource->intrinsic != nir_intrinsic_resource_intel) continue; diff --git a/src/intel/vulkan/anv_shader_compile.c b/src/intel/vulkan/anv_shader_compile.c index 0f8c516f3f0..db1f5f15bdb 100644 --- a/src/intel/vulkan/anv_shader_compile.c +++ b/src/intel/vulkan/anv_shader_compile.c @@ -1226,13 +1226,13 @@ fixup_large_workgroup_image_coherency(nir_shader *nir) if (array_deref->deref_type != nir_deref_type_array) continue; - nir_alu_instr *alu = nir_src_as_alu_instr(intr->src[1]); + nir_alu_instr *alu = nir_src_as_alu(intr->src[1]); if (!alu || !nir_op_is_vec(alu->op)) return; /* Check if any src is from @load_local_invocation_id. */ for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - nir_instr *parent = alu->src[i].src.ssa->parent_instr; + nir_instr *parent = nir_def_instr(alu->src[i].src.ssa); if (parent->type != nir_instr_type_intrinsic) continue; diff --git a/src/intel/vulkan_hasvk/anv_nir_lower_multiview.c b/src/intel/vulkan_hasvk/anv_nir_lower_multiview.c index 9c9b3fdbe4e..6b80bef201b 100644 --- a/src/intel/vulkan_hasvk/anv_nir_lower_multiview.c +++ b/src/intel/vulkan_hasvk/anv_nir_lower_multiview.c @@ -56,7 +56,7 @@ build_instance_id(struct lower_multiview_state *state) nir_builder *b = &state->builder; b->cursor = - nir_after_instr(state->instance_id_with_views->parent_instr); + nir_after_def(state->instance_id_with_views); /* We use instancing for implementing multiview. The actual instance id * is given by dividing instance_id by the number of views in this @@ -79,7 +79,7 @@ build_view_index(struct lower_multiview_state *state) nir_builder *b = &state->builder; b->cursor = - nir_after_instr(state->instance_id_with_views->parent_instr); + nir_after_def(state->instance_id_with_views); assert(state->view_mask != 0); if (util_bitcount(state->view_mask) == 1) { @@ -216,7 +216,7 @@ anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask) nir_def *view_index = build_view_index(&state); assert(nir_def_block(view_index) == nir_start_block(entrypoint)); - b->cursor = nir_after_instr(view_index->parent_instr); + b->cursor = nir_after_def(view_index); /* Unless there is only one possible view index (that would be set * directly), pass it to the next stage. diff --git a/src/kosmickrisp/compiler/msl_type_inference.c b/src/kosmickrisp/compiler/msl_type_inference.c index c10d90c3481..34eb59b74aa 100644 --- a/src/kosmickrisp/compiler/msl_type_inference.c +++ b/src/kosmickrisp/compiler/msl_type_inference.c @@ -560,7 +560,7 @@ propagate_types(struct hash_table *types, nir_instr *instr) ti_type src_type = get_type(types, &alu->src[i].src); ti_type def_type = get_type(types, alu->src[i].src.ssa); ti_type unified_type = unify_types(src_type, def_type); - nir_instr *parent_instr = alu->src[i].src.ssa->parent_instr; + nir_instr *parent_instr = nir_def_instr(alu->src[i].src.ssa); if (unified_type > src_type) { progress |= update_instr_type(types, instr, unified_type); } else if (unified_type > def_type) { @@ -576,7 +576,7 @@ propagate_types(struct hash_table *types, nir_instr *instr) ti_type src_type = get_type(types, &intr->src[i]); ti_type def_type = get_type(types, intr->src[i].ssa); ti_type unified_type = unify_types(src_type, def_type); - nir_instr *parent_instr = intr->src[i].ssa->parent_instr; + nir_instr *parent_instr = nir_def_instr(intr->src[i].ssa); if (unified_type > src_type) { progress |= update_instr_type(types, instr, unified_type); } else if (unified_type > def_type) { @@ -593,7 +593,7 @@ propagate_types(struct hash_table *types, nir_instr *instr) ti_type unified_type = unify_types(src_type, def_type); if (src_type == 0) continue; - nir_instr *parent_instr = tex->src[i].src.ssa->parent_instr; + nir_instr *parent_instr = nir_def_instr(tex->src[i].src.ssa); if (unified_type > def_type) { progress |= update_instr_type(types, parent_instr, unified_type); } diff --git a/src/kosmickrisp/compiler/nir_to_msl.c b/src/kosmickrisp/compiler/nir_to_msl.c index 6f6198a73dd..adda9dbaf46 100644 --- a/src/kosmickrisp/compiler/nir_to_msl.c +++ b/src/kosmickrisp/compiler/nir_to_msl.c @@ -123,8 +123,8 @@ emit_local_vars(struct nir_to_msl_ctx *ctx, nir_shader *shader) static bool is_register(nir_def *def) { - return ((def->parent_instr->type == nir_instr_type_intrinsic) && - (nir_instr_as_intrinsic(def->parent_instr)->intrinsic == + return ((nir_def_is_intrinsic(def)) && + (nir_def_as_intrinsic(def)->intrinsic == nir_intrinsic_load_reg)); } @@ -168,7 +168,7 @@ src_to_msl(struct nir_to_msl_ctx *ctx, nir_src *src) P(ctx, "as_type<%s>(", bitcast); if (is_register(src->ssa)) { nir_intrinsic_instr *instr = - nir_instr_as_intrinsic(src->ssa->parent_instr); + nir_def_as_intrinsic(src->ssa); if (src->ssa->bit_size != 1u) { P(ctx, "as_type<%s>(r%d)", msl_type_for_def(ctx->types, src->ssa), instr->src[0].ssa->index); diff --git a/src/kosmickrisp/vulkan/kk_nir_lower_textures.c b/src/kosmickrisp/vulkan/kk_nir_lower_textures.c index 85339be414c..dd767fa57fc 100644 --- a/src/kosmickrisp/vulkan/kk_nir_lower_textures.c +++ b/src/kosmickrisp/vulkan/kk_nir_lower_textures.c @@ -84,7 +84,7 @@ txs_for_image(nir_builder *b, nir_intrinsic_instr *intr, static void lower_cube_load_handle_to_2d_array(nir_def *handle) { - nir_instr *handle_parent = handle->parent_instr; + nir_instr *handle_parent = nir_def_instr(handle); assert(handle_parent->type == nir_instr_type_intrinsic); nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(handle_parent); assert(intrin->intrinsic == nir_intrinsic_load_texture_handle_kk); diff --git a/src/microsoft/clc/clc_compiler.c b/src/microsoft/clc/clc_compiler.c index e687951f509..e985e6d6ba6 100644 --- a/src/microsoft/clc/clc_compiler.c +++ b/src/microsoft/clc/clc_compiler.c @@ -367,7 +367,7 @@ clc_lower_nonnormalized_samplers(nir_shader *nir, continue; nir_src *sampler_src = &tex->src[sampler_src_idx].src; - assert(sampler_src->ssa->parent_instr->type == nir_instr_type_deref); + assert(nir_def_is_deref(sampler_src->ssa)); nir_variable *sampler = nir_deref_instr_get_variable(nir_def_as_deref(sampler_src->ssa)); // If the sampler returns ints, we'll handle this in the int lowering pass diff --git a/src/microsoft/clc/clc_nir.c b/src/microsoft/clc/clc_nir.c index 1aba48e57fb..b945ec4dad9 100644 --- a/src/microsoft/clc/clc_nir.c +++ b/src/microsoft/clc/clc_nir.c @@ -226,7 +226,7 @@ lower_deref_base_to_constant(nir_builder *b, nir_intrinsic_instr *intr, void *co if (!nir_deref_mode_must_be(path.path[0], nir_var_mem_global | nir_var_mem_constant)) goto done; - nir_instr *cast_src = path.path[0]->parent.ssa->parent_instr; + nir_instr *cast_src = nir_def_instr(path.path[0]->parent.ssa); if (cast_src->type != nir_instr_type_intrinsic) goto done; diff --git a/src/microsoft/compiler/dxil_nir.c b/src/microsoft/compiler/dxil_nir.c index 5c1ffb2cb1d..5cfe45ebe61 100644 --- a/src/microsoft/compiler/dxil_nir.c +++ b/src/microsoft/compiler/dxil_nir.c @@ -732,7 +732,7 @@ cast_phi(nir_builder *b, nir_phi_instr *phi, unsigned new_bit_size) assert(num_components == 0 || num_components == src->src.ssa->num_components); num_components = src->src.ssa->num_components; - b->cursor = nir_after_instr_and_phis(src->src.ssa->parent_instr); + b->cursor = nir_after_instr_and_phis(nir_def_instr(src->src.ssa)); nir_def *cast = nir_u2uN(b, src->src.ssa, new_bit_size); diff --git a/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c b/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c index 1b34fadddb5..1b7219f620f 100644 --- a/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c +++ b/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c @@ -319,7 +319,7 @@ handle_cube_gather(nir_builder *b, nir_tex_instr *tex, nir_def *coord) nir_def *tex_size = nir_get_texture_size(b, tex); /* nir_get_texture_size puts the cursor before the tex op */ - b->cursor = nir_after_instr(coord->parent_instr); + b->cursor = nir_after_def(coord); nir_def *const_05 = nir_imm_float(b, 0.5f); nir_def *texel_coords = nir_fmul(b, nir_trim_vector(b, coord, 2), diff --git a/src/microsoft/compiler/dxil_nir_tess.c b/src/microsoft/compiler/dxil_nir_tess.c index 4489ba859ea..684193d50ae 100644 --- a/src/microsoft/compiler/dxil_nir_tess.c +++ b/src/microsoft/compiler/dxil_nir_tess.c @@ -67,7 +67,7 @@ add_instr_and_srcs_to_set(struct set *instr_set, nir_instr *instr); static bool add_srcs_to_set(nir_src *src, void *state) { - add_instr_and_srcs_to_set(state, src->ssa->parent_instr); + add_instr_and_srcs_to_set(state, nir_def_instr(src->ssa)); return true; } @@ -93,7 +93,7 @@ prune_patch_function_to_intrinsic_and_srcs(nir_function_impl *impl) nir_foreach_block(block, impl) { nir_if *following_if = nir_block_get_following_if(block); if (following_if) { - add_instr_and_srcs_to_set(instr_set, following_if->condition.ssa->parent_instr); + add_instr_and_srcs_to_set(instr_set, nir_def_instr(following_if->condition.ssa)); } nir_foreach_instr_safe(instr, block) { if (instr->type == nir_instr_type_intrinsic) { diff --git a/src/nouveau/compiler/nak_nir_lower_cmat.c b/src/nouveau/compiler/nak_nir_lower_cmat.c index 1e4c1e267bf..998b2b38fec 100644 --- a/src/nouveau/compiler/nak_nir_lower_cmat.c +++ b/src/nouveau/compiler/nak_nir_lower_cmat.c @@ -579,7 +579,7 @@ try_lower_cmat_load_to_ldsm(nir_builder *b, nir_intrinsic_instr *intr) const struct glsl_cmat_description desc = cmat_src_desc(intr->src[0]); const unsigned length = get_cmat_length(desc); - nir_deref_instr *deref = nir_instr_as_deref(intr->src[1].ssa->parent_instr); + nir_deref_instr *deref = nir_def_as_deref(intr->src[1].ssa); const unsigned ptr_bit_size = glsl_get_bit_size(deref->type); const unsigned vec = glsl_get_vector_elements(deref->type); nir_src stride = intr->src[2]; diff --git a/src/nouveau/compiler/nak_nir_lower_non_uniform_ldcx.c b/src/nouveau/compiler/nak_nir_lower_non_uniform_ldcx.c index dd939107ecf..9f7841dd3cb 100644 --- a/src/nouveau/compiler/nak_nir_lower_non_uniform_ldcx.c +++ b/src/nouveau/compiler/nak_nir_lower_non_uniform_ldcx.c @@ -132,7 +132,7 @@ can_hoist_def(nir_def *def, nir_block *target) if (!def_needs_hoist(def, target)) return true; - nir_instr *instr = def->parent_instr; + nir_instr *instr = nir_def_instr(def); switch (instr->type) { case nir_instr_type_alu: { nir_alu_instr *alu = nir_instr_as_alu(instr); @@ -171,7 +171,7 @@ hoist_def(nir_def *def, nir_block *target) if (!def_needs_hoist(def, target)) return false; - nir_instr *instr = def->parent_instr; + nir_instr *instr = nir_def_instr(def); switch (instr->type) { case nir_instr_type_alu: { nir_alu_instr *alu = nir_instr_as_alu(instr); @@ -217,7 +217,7 @@ try_hoist_ldcx_handles_block(nir_block *block, struct non_uniform_section *nus) */ nir_alu_instr *alu = nir_instr_as_alu(instr); for (uint8_t i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { - nir_instr *src_instr = alu->src[i].src.ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(alu->src[i].src.ssa); if (src_instr->type != nir_instr_type_intrinsic) continue; @@ -331,7 +331,7 @@ static bool try_remat_ldcx_alu_use(nir_builder *b, nir_alu_instr *alu, uint8_t src_idx, struct non_uniform_section *nus) { - nir_instr *src_instr = alu->src[src_idx].src.ssa->parent_instr; + nir_instr *src_instr = nir_def_instr(alu->src[src_idx].src.ssa); if (src_instr->type != nir_instr_type_intrinsic) return false; diff --git a/src/nouveau/compiler/nak_nir_lower_tex.c b/src/nouveau/compiler/nak_nir_lower_tex.c index d63b6b4b602..298a6ea328b 100644 --- a/src/nouveau/compiler/nak_nir_lower_tex.c +++ b/src/nouveau/compiler/nak_nir_lower_tex.c @@ -24,7 +24,7 @@ has_cbuf_tex(const struct nak_compiler *nak) { static bool tex_handle_as_cbuf(nir_def *tex_h, uint32_t *cbuf_out) { - if (tex_h->parent_instr->type != nir_instr_type_intrinsic) + if (!nir_def_is_intrinsic(tex_h)) return false; nir_intrinsic_instr *intrin = nir_def_as_intrinsic(tex_h); diff --git a/src/panfrost/compiler/bifrost_compile.c b/src/panfrost/compiler/bifrost_compile.c index 40f3a71c93f..a2e13440c35 100644 --- a/src/panfrost/compiler/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost_compile.c @@ -5827,7 +5827,7 @@ bi_gather_texcoords(nir_builder *b, nir_instr *instr, void *data) if (x.def != y.def) return false; - nir_instr *parent = x.def->parent_instr; + nir_instr *parent = nir_def_instr(x.def); if (parent->type != nir_instr_type_intrinsic) return false; diff --git a/src/panfrost/util/pan_lower_noperspective.c b/src/panfrost/util/pan_lower_noperspective.c index bc46317739b..3c9930d0ebb 100644 --- a/src/panfrost/util/pan_lower_noperspective.c +++ b/src/panfrost/util/pan_lower_noperspective.c @@ -264,7 +264,7 @@ pan_nir_lower_noperspective_vs(nir_shader *shader) nir_def *pos_w = nir_frcp(&b, pos_w_recip); /* Reorder stores to ensure pos_w def is available */ - move_output_stores_after(pos_w->parent_instr); + move_output_stores_after(nir_def_instr(pos_w)); nir_def *noperspective_outputs = nir_load_noperspective_varyings_pan(&b); struct lower_noperspective_vs_state state = {