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add some chip ids

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This commit is contained in:
Roland Scheidegger 2004-11-10 01:49:01 +00:00
parent b12594d2a0
commit de08b0d7ed
2 changed files with 21 additions and 3 deletions
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19
src/mesa/drivers/dri/r200/r200_screen.c
View file

@ -92,7 +92,8 @@ static const GLuint __driNConfigOptions = 14;
#define PCI_CHIP_R200_QG 0x5147
#define PCI_CHIP_R200_QY 0x5159
#define PCI_CHIP_R200_QZ 0x515A
#define PCI_CHIP_R200_LW 0x4C57
#define PCI_CHIP_R200_LW 0x4C57
#define PCI_CHIP_R200_LX 0x4C58
#define PCI_CHIP_R200_LY 0x4C59
#define PCI_CHIP_R200_LZ 0x4C5A
#define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
@ -117,8 +118,14 @@ static const GLuint __driNConfigOptions = 14;
#define PCI_CHIP_R200_QM 0x514D
#define PCI_CHIP_R200_QN 0x514E
#define PCI_CHIP_R200_QO 0x514F /* r200 (non-derived) end */
/* are the R200 Qh (0x5168) and following needed too? They are not in xf86PciInfo.h
but in the pci database. Maybe just secondary ports or something ? */
/* are the R200 Qh (0x5168) and following needed too? They are not in
xf86PciInfo.h but in the pci database. Maybe just secondary ports or
something ? Ah well, better be safe than sorry */
#define PCI_CHIP_R200_Qh 0x5168
#define PCI_CHIP_R200_Qi 0x5169
#define PCI_CHIP_R200_Qj 0x516A
#define PCI_CHIP_R200_Qk 0x516B
#define PCI_CHIP_R200_Ql 0x516C
#endif
@ -242,6 +249,7 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_RV200_QW:
case PCI_CHIP_RV200_QX:
case PCI_CHIP_R200_LW:
case PCI_CHIP_R200_LX:
case PCI_CHIP_R200_LY:
case PCI_CHIP_R200_LZ:
case PCI_CHIP_RS100_4136:
@ -270,6 +278,11 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_R200_QM:
case PCI_CHIP_R200_QN:
case PCI_CHIP_R200_QO:
case PCI_CHIP_R200_Qh:
case PCI_CHIP_R200_Qi:
case PCI_CHIP_R200_Qj:
case PCI_CHIP_R200_Qk:
case PCI_CHIP_R200_Ql:
screen->chipset |= R200_CHIPSET_REAL_R200;
/* fallthrough */
default:

5
src/mesa/drivers/dri/radeon/radeon_screen.c
View file

@ -88,11 +88,14 @@ static const GLuint __driNConfigOptions = 11;
#define PCI_CHIP_RADEON_QZ 0x515A
#define PCI_CHIP_RADEON_LW 0x4C57 /* mobility 7 - has tcl */
#define PCI_CHIP_RADEON_LX 0x4C58 /* mobility FireGL 7800 m7 */
#define PCI_CHIP_RADEON_LY 0x4C59
#define PCI_CHIP_RADEON_LZ 0x4C5A
#define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
#define PCI_CHIP_RV200_QX 0x5158
/* IGP Chipsets */
#define PCI_CHIP_RS100_4136 0x4136
#define PCI_CHIP_RS200_4137 0x4137
@ -310,7 +313,9 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
case PCI_CHIP_RADEON_QF:
case PCI_CHIP_RADEON_QG:
case PCI_CHIP_RV200_QW:
case PCI_CHIP_RV200_QX:
case PCI_CHIP_RADEON_LW:
case PCI_CHIP_RADEON_LX:
screen->chipset |= RADEON_CHIPSET_TCL;
case PCI_CHIP_RADEON_QY:
case PCI_CHIP_RADEON_QZ: