From ddd9e043dc8e4f644fcdb4aef88ce431597eadf3 Mon Sep 17 00:00:00 2001 From: Sushma Venkatesh Reddy Date: Tue, 30 Jul 2024 19:27:31 -0700 Subject: [PATCH] intel/brw: Move get_nir_def() higher to avoid UNDEF While extending our backend to handle 16-bit sampler return payloads, we found that in piglit's arb_texture_view-rendering-formats, the SIMD8 FS was missing the sampling operation altogether. This was because we were first emitting the texturing instruction, and then calling get_nir_def(), which adds an UNDEF instruction when the destination is smaller than the 32-bit. So the texturing was dead code elimated. Fix this by calling get_nir_def() earlier. Thank you to Kenneth Graunke for suggesting and guiding me throughout this implementation. Signed-off-by: Sushma Venkatesh Reddy Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index c548ce2ba0e..93669ba4042 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -8621,6 +8621,8 @@ fs_nir_emit_texture(nir_to_brw_state &ntb, header_bits |= instr->component << 16; } + brw_reg nir_def_reg = get_nir_def(ntb, instr->def); + brw_reg dst = bld.vgrf(brw_type_for_nir_type(devinfo, instr->dest_type), 4 + instr->is_sparse); fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs)); inst->offset = header_bits; @@ -8664,8 +8666,6 @@ fs_nir_emit_texture(nir_to_brw_state &ntb, inst->keep_payload_trailing_zeros = true; } - brw_reg nir_def_reg = get_nir_def(ntb, instr->def); - if (instr->op != nir_texop_query_levels && !instr->is_sparse) { /* In most cases we can write directly to the result. */ inst->dst = nir_def_reg;